NXP Semiconductors A2V09H400-04SR3
- Part No.:
- A2V09H400-04SR3
- Manufacturer:
- NXP Semiconductors
- Category:
- Single FETs, MOSFETs
- Package:
- NI-780S-4L
- Datasheet:
-
A2V09H400-04SR3.pdf
- Description:
- RF MOSFET LDMOS 48V NI780
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
A2V09H400-04SR3 from NXP Semiconductors is a 102 W asymmetrical Doherty RF power LDMOS transistor designed for cellular base station amplifiers operating in the 720–960 MHz band. It delivers 18.7 dB power gain, 53.5% drain efficiency, and –29.5 dBc ACPR at 920 MHz under W-CDMA single-carrier conditions (48 Vdc, 750 mA IDQA, 102 W avg. output, 9.9 dB PAR). Its dual-gate architecture supports carrier-peaking operation in macrocell and massive MIMO remote radio heads.
For engineers reviewing the A2V09H400-04SR3 datasheet, A2V09H400-04SR3 pinout, A2V09H400-04SR3 application, or A2V09H400-04SR3 equivalent, key selection criteria include Doherty efficiency at 48 V, thermal resistance of 0.51 °C/W, gate voltage range (–6.0 to +10 V), ruggedness under 10 dB PAR AWGN stress, and NI-780S-4L package compatibility with high-power RF PCB layouts.
Technical Context
The A2V09H400-04SR3 implements an integrated asymmetrical Doherty architecture with separate carrier (Side A) and peaking (Side B) transistors in a monolithic Ni-780S-4L air-cavity package. Carrier-side VGS(th) is 1.3–2.3 Vdc (ID = 137 µAdc), peaking-side VGS(th) is 1.3–2.3 Vdc (ID = 211 µAdc), and both sides support independent gate biasing (VGSA(Q): 2.0–2.8 Vdc; VGSB: 0.8 Vdc typical).
It operates with 48 Vdc drain supply and achieves P3dB compression at 56.9 dBm (478 W CW) on carrier side and 56.5 dBm (447 W CW) on peaking side across 758–821 MHz. AM/PM distortion is limited to –16° max across 920–960 MHz, and VBW resonance is centered at 80 MHz - enabling stable digital predistortion (DPD) linearization in LTE and 5G NR TDD systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Frequency Range | 720–960 MHz - Covers LTE Band 12/13/14/17/20 and 5G NR n1/n3/n8/n20/n28 uplink/downlink bands. |
| Avg. Output Power | 102 W @ 920–960 MHz - Enables 2×20 W per antenna in 4T4R macro base stations with headroom for crest factor reduction. |
| Drain Efficiency | 53.5% @ 920 MHz - Reduces thermal load and cooling requirements compared to legacy LDMOS (typically 42–48%). |
| Power Gain | 18.7 dB @ 920 MHz - Allows simplified driver stage design with lower gain pre-driver ICs (e.g., MMICs with 20–25 dB gain). |
| ACPR | –29.5 dBc @ ±5 MHz offset - Meets 3GPP ACLR mask for 20 MHz LTE channels without excessive DPD complexity. |
| Thermal Resistance | 0.51 °C/W (Junction-to-Case) - Supports continuous 107 W avg. operation at TC = 81°C with standard copper baseplate heatsinking. |
| ESD Rating | HBM Class 2 (2 kV), CDM Class C3 - Compatible with automated SMT assembly and field-replaceable module handling. |
Pinout & Package
The A2V09H400-04SR3 is housed in the NI-780S-4L air-cavity ceramic package (15.24 × 15.24 × 4.57 mm), optimized for high-power RF thermal dissipation and impedance-controlled RF routing. The 4-pin top-view layout features isolated gate and drain terminals for carrier and peaking paths.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - RFinA/VGSA | Carrier amplifier gate input | Bias-controlled RF input node for main amplifier path; requires DC blocking and gate bias network (2.4 V typical quiescent). |
| 2 - RFinB/VGSB | Peaking amplifier gate input | Class-C biased gate input; 0.8 Vdc typical enables precise turn-on timing alignment with carrier path for Doherty efficiency peak. |
| 3 - RFoutA/VDSA | Carrier amplifier drain output | High-current RF output node; internally matched to ~2.8 Ω real part at 940 MHz for simplified external output matching. |
| 4 - RFoutB/VDSB | Peaking amplifier drain output | Asymmetrical output node; presents higher impedance (~1.9 Ω) than carrier side to enable optimal power combining via asymmetric coupler (e.g., CMX09Q02). |
Key Features
| Feature | Design Value |
|---|---|
| Integrated asymmetrical Doherty topology | Monolithic carrier-peaking integration eliminates inter-device phase/timing mismatch and reduces board area by >30% vs. discrete solutions. |
| Extended negative VGS range (–6.0 V) | Enables deep Class-C peaking bias for improved back-off efficiency and reduced gate drive power consumption. |
| Internal input matching | Eliminates need for external 50 Ω input matching networks - simplifies PCB layout and improves repeatability across production lots. |
| Ruggedness under 10 dB PAR AWGN | Sustains 239 W avg. modulated output at 55 Vdc with no degradation - validated for long-term reliability in high-PAR 5G NR deployments. |
| Low AM/PM distortion (–16° max) | Minimizes DPD convergence time and residual EVM - critical for maintaining <1.5% RMS EVM in 256-QAM 5G NR UL signals. |
Applications
| Macrocell Base Station PA | Massive MIMO Active Antenna Unit |
|---|---|
|
Use Scenario: 4G LTE and 5G NR downlink power amplification in outdoor macrocell sites with 20–40 W per channel output requirement. IC Role / Device Role / Timing Role: Primary final-stage Doherty PA delivering 102 W avg. output across 720–960 MHz with digital predistortion support. Use Value: Achieves 53.5% efficiency at 102 W avg., reducing system power draw by 12–15% versus prior-generation LDMOS and lowering OPEX in energy-constrained deployments. |
Use Scenario: Integrated PA module in 64T64R active antenna units requiring compact, thermally robust RF power stages per TRX chain. IC Role / Device Role / Timing Role: Dual-path Doherty transistor enabling per-element amplification with shared thermal management and synchronized DPD calibration. Use Value: NI-780S-4L package allows direct copper baseplate mounting and supports >100 W/cm² power density - essential for space-constrained AAU RF front-end modules. |
| CBRS Private Network Base Station | Public Safety LTE eNodeB |
|
Use Scenario: Indoor/outdoor private LTE networks operating in 3.5 GHz CBRS band - adapted via harmonic tuning and external filtering for 3550–3700 MHz use. IC Role / Device Role / Timing Role: Re-tuned final-stage PA leveraging same Doherty architecture and gate control flexibility for mid-band operation. Use Value: Proven 720–960 MHz linearity and ruggedness translate directly to stable 3.5 GHz operation with <–30 dBc ACLR after harmonic suppression. |
Use Scenario: Mission-critical LTE infrastructure for first responders requiring high reliability, wide temperature operation, and rapid fault recovery. IC Role / Device Role / Timing Role: High-reliability RF power transistor rated for –40°C to +150°C case temperature and 225°C junction limit. Use Value: HBM Class 2 / CDM Class C3 ESD rating and 150°C max TC rating ensure uninterrupted operation in uncontrolled environmental enclosures and mobile command vehicles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar RF power transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MRF6VP2600HR5 | 600 W CW GaN HEMT, 1.8–2.2 GHz band, higher P3dB but narrower bandwidth and no integrated Doherty structure. | Targets 2.1 GHz macrocells; requires external Doherty combiner and more complex gate bias sequencing. | Select when >300 W CW output is required at 2 GHz and board space permits discrete Doherty implementation. |
| AFM905S | 90 W avg. LDMOS Doherty, 720–960 MHz, same NI-780S-4L package but lower peak power and 46 V max VDD rating. | Optimized for cost-sensitive 4G-only deployments where 102 W headroom is not required. | Select for legacy LTE upgrades with existing 46 V power supplies and thermal budgets below 100 W avg. |
Compared with MRF6VP2600HR5 and AFM905S, the A2V09H400-04SR3 uniquely balances 102 W avg. output, integrated asymmetrical Doherty architecture, and 48 V operation in a drop-in-compatible NI-780S-4L package - making it the optimal choice for new 5G NR 700–960 MHz base station designs requiring DPD-ready linearity and thermal efficiency.
Availability
A2V09H400-04SR3 is available at Aetrix Electronics and suitable for macrocell base stations, massive MIMO active antenna units, and public safety LTE eNodeB systems requiring stable component supply, high-volume RF power transistor availability, and full traceability through NXP's Airfast product line.
Supply support for A2V09H400-04SR3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and communications markets, with over 20 years of RF power innovation.
The A2V09H400-04SR3 belongs to NXP's Airfast RF Power portfolio, engineered specifically for energy-efficient, digitally linearized cellular infrastructure amplifiers - targeting 4G LTE Advanced and 5G NR base station applications demanding high efficiency at signal back-off.
FAQ
What is the maximum continuous drain voltage rating for the A2V09H400-04SR3?
The A2V09H400-04SR3 has a maximum drain-source voltage (VDSS) rating of +105 Vdc and a minimum of –0.5 Vdc, allowing safe operation up to 48 Vdc nominal drain supply with margin for transient voltage spikes. This rating is confirmed in Table 1 of the official NXP datasheet (Rev. 2, Feb. 2021) and supports standard 48 V telecom power architectures without additional clamping circuitry.
Does the A2V09H400-04SR3 require external input matching networks?
No, the A2V09H400-04SR3 is internally input-matched, as explicitly stated in Table 6 footnote and Figure 1 layout notes. This eliminates discrete input matching components for 50 Ω systems, reducing insertion loss, board area, and tuning sensitivity - a key differentiator versus non-matched RF transistors like the MRF6VP2600HR5, which require full external input network design.
What is the thermal resistance (RθJC) of the A2V09H400-04SR3 under typical operating conditions?
The A2V09H400-04SR3 has a measured junction-to-case thermal resistance of 0.51 °C/W when operated at 107 W avg. output, 48 Vdc, 940 MHz, with case temperature maintained at 81°C - per Table 2 in the NXP datasheet. This value is validated using NXP's AN1955 thermal measurement methodology and enables accurate heatsink sizing for continuous macrocell deployment.
Can the A2V09H400-04SR3 be used in 5G NR TDD applications within the 720–960 MHz band?
Yes, the A2V09H400-04SR3 is qualified for 5G NR TDD operation in the 720–960 MHz band, as demonstrated by its –29.5 dBc ACPR at 920 MHz under W-CDMA-modulated 9.9 dB PAR excitation - a stress condition exceeding typical 5G NR UL signal characteristics. Its low AM/PM (–16° max) and 80 MHz VBW resonance further support stable DPD convergence in TDD frame structures.
What does the "R3" suffix indicate in the A2V09H400-04SR3 part number?
The "R3" suffix in A2V09H400-04SR3 denotes tape-and-reel packaging: 250 units per reel, 32 mm tape width, and 13-inch reel diameter - as defined in Table 5 of the NXP datasheet. This packaging format is optimized for high-volume SMT assembly and ensures consistent orientation and feeding reliability during automated placement of the NI-780S-4L package.
A2V09H400-04SR3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- NI-780S-4L
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- LDMOS
- Configuration:
- Dual
- Frequency:
- 720MHz ~ 960MHz
- Gain:
- 18.7dB
- Voltage - Test:
- 48 V
- Current Rating (Amps):
- 10µA
- Noise Figure:
- -
- Current - Test:
- 750 mA
- Power - Output:
- 102W
- Voltage - Rated:
- 105 V
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- NI-780S-4L
A2V09H400-04SR3 FAQ
1.How can I place an order for A2V09H400-04SR3 through Aetrix?
Please submit a Request for Quotation (RFQ) for A2V09H400-04SR3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A2V09H400-04SR3 reliable?
The price and inventory of A2V09H400-04SR3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A2V09H400-04SR3 is usually 5 days.
3.What payment methods are accepted for A2V09H400-04SR3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A2V09H400-04SR3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A2V09H400-04SR3?
A2V09H400-04SR3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A2V09H400-04SR3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A2V09H400-04SR3?
For technical support, including A2V09H400-04SR3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A2V09H400-04SR3 requirements.
6.How does Aetrix verify that A2V09H400-04SR3 is sourced from the original manufacturer or authorized distributors?
All A2V09H400-04SR3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A2V09H400-04SR3 meets industry standards.
7.What is the process for return or replacement of A2V09H400-04SR3?
All A2V09H400-04SR3 units undergo pre-shipment inspection (PSI). If there is an issue with A2V09H400-04SR3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A2V09H400-04SR3 part is unused and in its original packaging.
Return procedure for A2V09H400-04SR3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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