Allegro MicroSystems A3935KEDTR-T
- Part No.:
- A3935KEDTR-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 44-LCC (J-Lead)
- Datasheet:
-
A3935KEDTR-T.pdf
- Description:
- IC MTR DRIVER 4.75V-5.25V 44PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:4,630
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
A3935KEDTR-T from Allegro MicroSystems is a three-phase power MOSFET controller designed for automotive high-power motor drives. It integrates six TTL-compatible gate drivers, a PFM boost converter (VBOOST ≈ 16 V), internal LDO-regulated VREG (12.7–14 V), bootstrap circuits for n-channel high-side FETs, and a differential current-sense amplifier (gain = 19.2 V/V) - enabling precise phase-current monitoring in electric power steering (EPS) and HVAC blower systems.
For engineers reviewing the A3935KEDTR-T datasheet, A3935KEDTR-T pinout, A3935KEDTR-T application, or A3935KEDTR-T equivalent, this page delivers verified technical context, package-specific terminal mapping, fault-diagnostic behavior, thermal shutdown thresholds (TJ = 160–180 °C), and validated alternatives for automotive-grade motor control designs requiring -40 °C to +150 °C junction operation.
Technical Context
The A3935KEDTR-T implements a pulse-frequency modulated (PFM) boost converter to sustain VREG at 12.7–14 V across VBAT = 7–40 V, enabling robust high-side gate drive for n-channel MOSFETs via external bootstrap capacitors (CA/CB/CC). Its integrated differential current-sense amplifier accepts Kelvin-connected shunts with ±200 mV input differential range and delivers CSOUT with 0.075–VDD−0.25 V dynamic output swing.
Fault protection includes real-time short-to-battery detection (via VDSTH threshold on VSX during GLx active), short-to-ground detection (during GHx active), bridge-open monitoring (VDRAIN < 1.0–3.0 V), and dual-level VBAT overvoltage (19.4–40 V, adjustable via OVSET) and undervoltage (5.0–5.5 V) supervision - all reported through active-low FAULT, OVFLT, and UVFLT outputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Temp. Range | Junction temperature TJ = −40 °C to +150 °C - qualified for under-hood automotive environments. |
| Battery Input Range | VBAT = 7.0 V to 40 V - supports 12 V and 24 V battery systems with cold-crank and load-dump tolerance. |
| VREG Output | 12.7–14 V at up to 40 mA - powers high-side gate drivers; dropout voltage ≤ 0.9 V ensures stability at low VBOOST. |
| Gate Drive Capability | GHx source: 400–800 mA (pulsed, TJ = 25–135 °C); GLx sink: 550–850 mA - drives large n-channel MOSFETs with controlled di/dt. |
| Current Sense Gain | 18.6–19.8 V/V with ±25 mV low-input error - enables accurate torque/current regulation using sub-mΩ shunts. |
| Dead Time | 75–180 ns between GHx/GLx transitions - prevents shoot-through in 3-phase inverter bridges. |
| Fault Response Latency | Short-to-ground/short-to-battery detection active within blanking time (100–220 ns) - ensures fast MOSFET protection. |
Pinout & Package
Package: 44-lead PLCC with copper batwing thermal tabs (suffix ED); body dimensions 16.5 × 16.5 mm, 3.5 mm height; thermal pad on underside connected to GND pins (1, 2, 11, 12, 22, 23, 34, 35) for enhanced heat dissipation in automotive PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GHA/GHB/GHC | High-side gate driver outputs | Drive n-channel MOSFET gates above VBAT; require external bootstrap caps (CA/CB/CC) and series resistors for dv/dt control. |
| GLA/GLB/GLC | Low-side gate driver outputs | Sink current to ground; directly interface with low-side MOSFET gates without level-shifting. |
| SA/SB/SC | Motor phase connections | Kelvin-sense nodes for bootstrap capacitor negative terminals and drain-source voltage monitoring (VDRAIN referenced). |
| CSP/CSN | Differential current sense inputs | Kelvin connection across low-side shunt resistor; CSP = positive, CSN = negative - rejects common-mode noise up to 4 V. |
| VDSTH | Drain-to-source fault threshold | Analog input (0.5–3.0 V) setting short-circuit trip point; used with VDRAIN to detect open-drain or shorted MOSFETs. |
| FAULT/OVFLT/UVFLT | Diagnostic outputs | Open-drain, active-low (FAULT) or high-impedance (OVFLT/UVFLT) signals - require external pull-ups for microcontroller interfacing. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated PFM boost converter | Generates stable ~16 V VBOOST from 7–40 V VBAT - eliminates need for external high-voltage supply in 12/24 V automotive systems. |
| Bootstrap circuitry | Supports n-channel high-side FETs via CA/CB/CC terminals - enables efficient 3-phase inverter topologies without p-channel devices. |
| Differential current sensing | 19.2 V/V gain, ±200 mV input range, 1.6 MHz bandwidth - provides real-time motor phase current feedback for closed-loop torque control. |
| Comprehensive fault coverage | Detects short-to-battery, short-to-ground, bridge-open, VBAT over/undervoltage, VDD undervoltage, and thermal shutdown - reduces external protection IC count. |
| Automotive temperature grade | Rated for TJ = −40 °C to +150 °C - meets AEC-Q100 stress test requirements for engine compartment deployment. |
Applications
| Electric Power Steering (EPS) | HVAC Blower Motor Control |
|---|---|
Use Scenario: High-torque, safety-critical steering assist in passenger vehicles with variable road load and temperature extremes. IC Role / Device Role / Timing Role: Three-phase gate driver controlling 6 n-channel MOSFETs in inverter bridge; regulates motor current via CSOUT feedback loop synchronized to vehicle CAN bus commands. Use Value: Integrated VDSTH/VDRAIN monitoring detects MOSFET failures before loss of assist; thermal shutdown (TJ = 160–180 °C) prevents runaway in sealed EPS housings. |
Use Scenario: Variable-speed cabin air circulation in commercial trucks with wide ambient temperature swings (−40 °C to +85 °C). IC Role / Device Role / Timing Role: Direct TTL-level phase control of 3-phase BLDC fan motor; ENABLE pin enables PWM current limiting during startup surge. Use Value: Bootstrap architecture sustains gate drive at low VBAT (7 V cold crank); VBAT undervoltage lockout (5.0–5.5 V) prevents erratic operation during battery recovery. |
| Onboard Charger (OBC) Cooling Fan | Hybrid/EV Auxiliary Compressor |
Use Scenario: Forced-air cooling for silicon carbide power modules in 6.6 kW OBC units operating continuously at elevated ambient temperatures. IC Role / Device Role / Timing Role: High-efficiency 3-phase motor driver with diagnostic outputs tied to OBC system controller for predictive maintenance alerts. Use Value: CSOUT analog output enables real-time fan current trending; OVFLT/UVFLT flags grid voltage anomalies affecting charger thermal management. |
Use Scenario: Oil-cooled compressor in 48 V mild-hybrid climate systems requiring silent, vibration-free operation. IC Role / Device Role / Timing Role: Low-noise gate driver with programmable dead time (75–180 ns) minimizing EMI while maintaining inverter efficiency. Use Value: Adjustable VBAT overvoltage threshold (via OVSET) accommodates 48 V nominal + 20 % transients; LSS return path minimizes ground bounce in high-di/dt switching. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar three-phase gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP6532GQ-Z | Monolithic 3-phase driver with integrated MOSFETs (60 V, 2.5 A); no external bootstrap required; lacks VDRAIN Kelvin sense and VBAT overvoltage adjustability. | Targeted at lower-power fans (< 200 W); unsuitable for high-voltage traction auxiliary loads due to limited breakdown rating. | Select MP6532GQ-Z only for space-constrained, low-power HVAC applications where integrated FETs reduce BOM count and diagnostics are handled externally. |
| DRV8305PWP | 3-phase smart gate driver with SPI interface, cycle-by-cycle current limiting, and 10-bit ADC; requires external boost converter; no PFM architecture. | Designed for closed-loop servo systems needing real-time register access; not AEC-Q100 qualified; max TJ = +125 °C. | Choose DRV8305PWP when digital configurability and embedded protection algorithms outweigh automotive qualification and integrated boost needs. |
Compared with MP6532GQ-Z and DRV8305PWP, the A3935KEDTR-T uniquely combines automotive-grade temperature operation (TJ = +150 °C), integrated PFM boost, and Kelvin-based motor lead diagnostics - making it the only option among the three qualified for EPS and high-reliability 24 V/48 V auxiliary drives.
Availability
A3935KEDTR-T is available at Aetrix Electronics and suitable for electric power steering (EPS), HVAC blower control, onboard charger cooling, and hybrid auxiliary compressor applications requiring stable component supply across extended temperature and voltage ranges.
Supply support for A3935KEDTR-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer of high-performance magnetic sensors and power ICs, specializing in automotive and industrial motion control solutions since 1989.
The A3935 product line delivers integrated three-phase gate drivers with embedded diagnostics and thermal resilience - engineered specifically for automotive electrification subsystems demanding functional safety and long-term reliability.
FAQ
What is the maximum VBAT voltage the A3935KEDTR-T can withstand without damage?
The A3935KEDTR-T has an absolute maximum VBAT rating of 40 V, with operational range specified from 7.0 V to 40 V. Sustained operation above 40 V risks permanent damage to internal structures including the boost switch and VREG LDO. The device includes VBAT overvoltage protection that triggers at 19.4–40 V (adjustable via OVSET), but this fault response does not extend the absolute maximum rating - external clamping remains essential for load-dump transients exceeding 40 V. Always verify layout parasitics and transient suppression when deploying A3935KEDTR-T in 24 V or 48 V systems.
How does the A3935KEDTR-T implement short-to-ground detection?
The A3935KEDTR-T detects short-to-ground faults by monitoring the VSX voltage (at SA/SB/SC) relative to VDSTH when a high-side gate driver (GHA/GHB/GHC) is actively driven high. If VSX drops below VDSTH − 0.3 V while GHx is on, the FAULT output asserts low. This mechanism relies on Kelvin connection of VDRAIN to the MOSFET drains to eliminate PCB trace resistance errors. Detection is disabled when ENABLE = 0 or when the corresponding GHx is inactive - ensuring accurate diagnosis only during active high-side conduction. The VDSTH input must be set between 0.5 V and 3.0 V for valid operation.
Can the A3935KEDTR-T drive p-channel high-side MOSFETs?
No, the A3935KEDTR-T is explicitly designed for n-channel high-side MOSFETs using bootstrap gate drive architecture. Its GHA/GHB/GHC outputs are sourced from VREG and require external bootstrap capacitors (CA/CB/CC) to generate gate voltages above VBAT. Driving p-channel devices would invert logic polarity, violate the internal level-shifting design, and disable critical protections like short-to-ground detection - which assumes n-channel topology with source-connected motor phases. Allegro does not characterize or guarantee operation with p-channel FETs; use only n-channel devices per datasheet specifications.
What is the purpose of the VDRAIN pin on the A3935KEDTR-T?
The VDRAIN pin on the A3935KEDTR-T provides a Kelvin connection to the high-side MOSFET drains for accurate drain-to-source voltage monitoring. It feeds the internal comparator that evaluates VSX against VDSTH during high-side conduction to detect short-to-ground faults. Unlike standard sense pins, VDRAIN must be routed with minimal impedance directly to the MOSFET drain pads - bypassing power plane drops - to ensure reliable fault detection. When left unconnected, VDRAIN floats high-impedance and registers as a bridge-open fault across all phases, forcing FAULT low. Its dedicated routing is mandatory for functional safety compliance in automotive applications.
Does the A3935KEDTR-T support PWM control of motor speed?
Yes, the A3935KEDTR-T supports PWM-based motor speed control through two complementary methods: (1) Direct PWM applied to the AHI/ALO, BHI/BLO, and CHI/CLO logic inputs to modulate individual phase conduction; and (2) Global PWM via the ENABLE pin, which disables all gate drivers simultaneously to achieve "coast" braking or current limiting. The internal 75–180 ns dead-time generator prevents shoot-through during PWM transitions. For closed-loop speed regulation, the CSOUT current feedback signal must be processed externally - the A3935KEDTR-T itself does not include integrated PWM generation or PID control logic.
A3935KEDTR-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 44-LCC (J-Lead)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Motor Type - Stepper:
- -
- Motor Type - AC, DC:
- -
- Function:
- Controller - Commutation, Direction Management
- Output Configuration:
- Pre-Driver - Half Bridge (3)
- Interface:
- Parallel
- Technology:
- Power MOSFET
- Step Resolution:
- -
- Applications:
- -
- Current - Output:
- -
- Voltage - Supply:
- 4.75V ~ 5.25V
- Voltage - Load:
- 7V ~ 40V
- Operating Temperature:
- -40°C ~ 135°C (TA)
- Grade:
- Automotive
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 44-PLCC (16.59x16.59)
A3935KEDTR-T FAQ
1.How can I place an order for A3935KEDTR-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A3935KEDTR-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A3935KEDTR-T reliable?
The price and inventory of A3935KEDTR-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3935KEDTR-T is usually 5 days.
3.What payment methods are accepted for A3935KEDTR-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3935KEDTR-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A3935KEDTR-T?
A3935KEDTR-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A3935KEDTR-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A3935KEDTR-T?
For technical support, including A3935KEDTR-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3935KEDTR-T requirements.
6.How does Aetrix verify that A3935KEDTR-T is sourced from the original manufacturer or authorized distributors?
All A3935KEDTR-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3935KEDTR-T meets industry standards.
7.What is the process for return or replacement of A3935KEDTR-T?
All A3935KEDTR-T units undergo pre-shipment inspection (PSI). If there is an issue with A3935KEDTR-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A3935KEDTR-T part is unused and in its original packaging.
Return procedure for A3935KEDTR-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
A3935KEDTR-T Tags
-
DRV2603RUNR
Texas Instruments

-
DRV8837CDSGR
Texas Instruments

-
DRV8837DSGR
Texas Instruments

-
DRV8838DSGR
Texas Instruments

-
DRV8839DSSR
Texas Instruments

-
EMC2301-1-ACZL-TR
Microchip Technology

-
DRV8231ADSGR
Texas Instruments

-
EMC2302-2-AIZL-TR
Microchip Technology

-
DRV8800PWPR
Texas Instruments

-
DRV8835DSSR
Texas Instruments

-
EMC2303-1-KP-TR
Microchip Technology

-
DRV8876PWPR
Texas Instruments
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

.jpg)