Allegro MicroSystems A3946KLB-T
- Part No.:
- A3946KLB-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 16-PowerSOIC (0.295", 7.50mm Width)
- Datasheet:
-
A3946KLB-T.pdf
- Description:
- IC MOTOR DRIVER 7V-60V 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,011
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
A3946KLB-T from Allegro MicroSystems is a half-bridge power MOSFET controller designed to drive high-current N-channel MOSFETs in unidirectional DC motor and three-phase BLDC motor applications. It features dual gate drivers (GH and GL), integrated top-off charge pump enabling 100% duty cycle operation, and operates across VBB = 7–60 V with –40°C to +135°C ambient range.
For engineers reviewing the A3946KLB-T datasheet, A3946KLB-T pinout, A3946KLB-T application, or A3946KLB-T equivalent, key selection criteria include bootstrap-enabled high-side drive capability, programmable dead time via DT pin, thermal shutdown at 170°C, and fault diagnostics via open-drain ~FAULT output.
Technical Context
The A3946KLB-T implements independent high-side and low-side N-channel MOSFET control using a bootstrap architecture augmented by an internal top-off charge pump that sustains gate voltage during continuous conduction. Its control logic supports both single-pin PWM (via DT resistor) and independent IN1/IN2 modes, with dead time adjustable from 350 ns to 6 µs.
Protection circuitry includes latched overtemperature shutdown (TJ = 170°C), VREG and BOOT undervoltage detection, and non-latched VREF undervoltage monitoring. The device uses separate PGND and LGND pins, requires external bootstrap and VREG capacitors, and delivers gate drive currents with RDS(ON) of 4 Ω (pull-up) and 2 Ω (pull-down) at Tj = 25°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VBB Range | 7 V to 60 V - supports wide automotive and industrial battery input rails without external regulation |
| VREG Output | 13 V nominal - powers low-side driver and charges bootstrap capacitor; regulated down to VBB = 7 V |
| Dead Time Range | 350 ns to 6 µs - programmable via external RDEAD resistor to prevent shoot-through in half-bridge switching |
| Thermal Shutdown | 170°C junction temperature - latched fault requiring RESET pulse; provides robust overtemperature protection |
| Gate Drive Rise/Fall | 60 ns / 40 ns typical - enables fast switching of high-Qg MOSFETs while maintaining EMI control via external RGATE |
| Operating Temp | –40°C to +135°C ambient - qualified for under-hood automotive and industrial motor control environments |
| Charge Pump Freq | 62.5 kHz - ensures stable VREG regulation across full VBB range with efficiency from 80% (7 V) to 20% (50 V) |
Pinout & Package
Package: 16-lead TSSOP with exposed thermal pad (LP suffix), lead-free, 100% matte tin plated leadframe.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VREG (1) | Regulated gate drive supply | 13 V output powering low-side driver and bootstrap charging path; requires 10 µF decoupling |
| CP2 (2), CP1 (3) | Charge pump capacitor terminals | Connect external 0.47 µF X7R capacitor between CP2 and CP1 to stabilize VREG regulation |
| PGND (4) | Power ground reference | Must be externally connected to system power ground; not internally tied to LGND |
| GL (5) | Low-side gate driver output | Drives N-MOSFET source-connected to S pin; slew rate controlled by external series resistor |
| S (6) | Load terminal / bootstrap return | Direct connection point to motor/load; serves as floating ground for high-side driver and negative side of CBOOT |
| GH (7) | High-side gate driver output | Drives N-MOSFET drain-connected to VBB; requires bootstrap capacitor (CBOOT) referenced to S |
| BOOT (8) | Bootstrap capacitor positive node | Supplies gate voltage > VBB to GH; voltage must stay ≥7.8 V to avoid UVBOOT fault |
| ~FAULT (9) | Open-drain fault indicator | Pulled low on latched faults (VREG UV, OVERTEMP); non-latched during UVBOOT or UVREF |
| IN1, IN2 (10–11) | Digital control inputs | Define gate states per logic table; support PWM, brake, and independent high/low control modes |
| RESET (12) | Active-low sleep enable | Pulling low disables all outputs and reduces IVBB to ≤10 µA; required to clear latched faults |
| LGND (13) | Logic ground reference | Separate from PGND; must be externally grounded to ensure proper digital input thresholds |
| DT (14) | Dead time programming input | Resistor-to-ground sets tDEAD; tying to VREF disables dead time for direct gate control |
| VREF (15) | Internal 5 V reference | Decoupled with 0.1 µF capacitor; sources up to 4 mA for external circuitry or logic bias |
| VBB (16) | Main power supply input | Accepts 7–60 V; powers charge pump, logic, and gate drivers; quiescent current 3–6 mA |
| PAD | Exposed thermal pad | Not electrically connected; must be soldered to PCB ground plane with thermal vias for RθJA = 34°C/W |
Key Features
| Feature | Design Value |
|---|---|
| Top-off charge pump | Enables true 100% duty cycle high-side N-MOSFET operation without external boost supply |
| Programmable dead time | Adjustable 350 ns–6 µs via single external resistor (DT pin), eliminating shoot-through risk |
| Dual independent gate drives | GH and GL outputs support asymmetric PWM, braking, and independent control of high/low FETs |
| Latched thermal protection | 170°C junction shutdown with 15°C hysteresis prevents thermal runaway in sustained overload |
| Multi-level fault reporting | ~FAULT pin distinguishes latched (VREG UV, OVERTEMP) vs. transient (UVBOOT, UVREF) faults |
Applications
| Automotive Power Seats | Industrial Conveyor Drives |
|---|---|
Use Scenario: Bidirectional actuation of seat positioners using 12 V/24 V DC motors with soft-start and stall detection. IC Role / Device Role / Timing Role: Half-bridge controller managing high-side and low-side N-MOSFETs to reverse motor polarity and implement PWM speed control. Use Value: Integrated VREG and top-off charge pump eliminate need for external high-voltage gate drivers, reducing BOM count and layout area. | Use Scenario: Speed-regulated conveyor belt control in factory automation systems with 24–48 V DC bus. IC Role / Device Role / Timing Role: Gate driver for parallel N-MOSFET half-bridge delivering >10 A motor current with programmable dead time. Use Value: 135°C ambient rating and thermal shutdown allow reliable operation in enclosed enclosures without forced air cooling. |
| Medical Infusion Pumps | Robotics Joint Actuators |
Use Scenario: Precision micro-stepped peristaltic pump motor control requiring smooth acceleration/deceleration and current limiting. IC Role / Device Role / Timing Role: High-accuracy gate timing controller with <150 ns propagation delay and configurable dead time for low-noise commutation. Use Value: Fault diagnostics via ~FAULT pin enable real-time motor stall detection and safe shutdown before mechanical damage occurs. | Use Scenario: Compact joint motor drivers in collaborative robots where space-constrained PCBs require integrated gate drive and protection. IC Role / Device Role / Timing Role: Dual N-MOSFET gate driver supporting independent high/low control for regenerative braking and torque vectoring. Use Value: Exposed thermal pad and 34°C/W JEDEC 4-layer thermal resistance enable >2 W dissipation in 16-pin TSSOP footprint. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar half-bridge gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP6542GQ-Z | Integrated current sense amplifier; no top-off charge pump; max VBB = 45 V | Lacks 100% duty cycle capability; requires external bootstrap refresh for sustained high-side conduction | Choose when current monitoring is critical and duty cycle <95%; avoid for continuous conduction motor hold applications |
| TBD62783AFWG,EL | High-side driver only; no low-side output; bipolar transistor output; max VBB = 50 V | Cannot implement synchronous rectification; limited to low-frequency switching (<100 kHz) | Use only for simple high-side switch applications; not suitable as drop-in replacement for A3946KLB-T half-bridge topology |
Compared with MP6542GQ-Z and TBD62783AFWG,EL, the A3946KLB-T uniquely combines bootstrap-based high-side drive with top-off charge pump for true DC operation, dual independent gate outputs, and automotive-grade thermal protection-making it optimal for high-reliability motor control where sustained high-side conduction and fault resilience are mandatory.
Availability
A3946KLB-T is available at Aetrix Electronics and suitable for automotive power seats, industrial conveyor drives, medical infusion pumps, robotics joint actuators, and precision DC motor control requiring stable component supply across extended temperature ranges.
Supply support for A3946KLB-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based semiconductor company specializing in magnetic sensing, power ICs, and motor control solutions, with design centers in North America and Asia.
The A3946 product line delivers high-voltage, high-current gate drivers for automotive and industrial motor systems, emphasizing robustness, integrated protection, and simplified layout through bootstrap architecture and thermal management.
FAQ
What is the maximum VBB voltage rating for the A3946KLB-T?
The A3946KLB-T has an absolute maximum VBB rating of 60 V, with guaranteed operation across 7 V to 60 V. This allows direct use with 12 V, 24 V, and 48 V industrial and automotive battery systems without external pre-regulation. Operation above 60 V risks permanent damage to internal charge pump and gate drivers.
How does the top-off charge pump in the A3946KLB-T enable 100% duty cycle operation?
The top-off charge pump in the A3946KLB-T supplies a small trickle current to the BOOT node during high-side conduction, compensating for gate leakage and sustaining VGH above threshold even when the bootstrap capacitor would otherwise discharge. This eliminates the need for alternating low-side conduction to recharge CBOOT, allowing indefinite high-side-on states-critical for holding torque in motor brakes and solenoid drivers.
Can the A3946KLB-T drive both high-side and low-side N-channel MOSFETs simultaneously?
No-the A3946KLB-T implements strict shoot-through prevention: its control logic and dead time circuitry ensure GH and GL are never active simultaneously. The Control Logic Table explicitly defines "CAUTION: High-side and low-side FETs ON" only when IN1=IN2=VREF and DT=VREF, which is an invalid configuration. Real-world operation always enforces minimum dead time via DT resistor or internal delay.
What capacitor values are required for stable operation of the A3946KLB-T?
The A3946KLB-T requires three critical capacitors: (1) 10 µF X7R ceramic or electrolytic at VREG for gate drive current supply; (2) 0.1 µF X7R at VREF for logic decoupling; and (3) 0.22–0.47 µF X7R at BOOT, sized per QGATE × 20 / VBOOT. CREG must be rated ≥25 V; CBOOT must withstand ≥12 V; all must be placed within 5 mm of respective pins.
How is the latched fault condition cleared on the A3946KLB-T?
A latched fault (e.g., VREG undervoltage or overtemperature) on the A3946KLB-T is cleared by applying a 1–10 µs low pulse to the RESET pin. During this pulse, ~FAULT goes high and the latch resets immediately. If VREG and VREF are restored and no overtemperature condition persists, the A3946KLB-T resumes normal operation upon RESET returning high-without requiring power cycle.
A3946KLB-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 16-PowerSOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Motor Type - Stepper:
- -
- Motor Type - AC, DC:
- Brushless DC (BLDC)
- Function:
- Controller - Commutation, Direction Management
- Output Configuration:
- Pre-Driver - Half Bridge
- Interface:
- Parallel
- Technology:
- Power MOSFET
- Step Resolution:
- -
- Applications:
- General Purpose
- Current - Output:
- -
- Voltage - Supply:
- 7V ~ 60V
- Voltage - Load:
- -
- Operating Temperature:
- -40°C ~ 135°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
A3946KLB-T FAQ
1.How can I place an order for A3946KLB-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A3946KLB-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A3946KLB-T reliable?
The price and inventory of A3946KLB-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3946KLB-T is usually 5 days.
3.What payment methods are accepted for A3946KLB-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3946KLB-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A3946KLB-T?
A3946KLB-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A3946KLB-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A3946KLB-T?
For technical support, including A3946KLB-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3946KLB-T requirements.
6.How does Aetrix verify that A3946KLB-T is sourced from the original manufacturer or authorized distributors?
All A3946KLB-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3946KLB-T meets industry standards.
7.What is the process for return or replacement of A3946KLB-T?
All A3946KLB-T units undergo pre-shipment inspection (PSI). If there is an issue with A3946KLB-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A3946KLB-T part is unused and in its original packaging.
Return procedure for A3946KLB-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
A3946KLB-T Tags
-
DRV2603RUNR
Texas Instruments

-
DRV8837CDSGR
Texas Instruments

-
DRV8837DSGR
Texas Instruments

-
DRV8838DSGR
Texas Instruments

-
DRV8839DSSR
Texas Instruments

-
EMC2301-1-ACZL-TR
Microchip Technology

-
DRV8231ADSGR
Texas Instruments

-
EMC2302-2-AIZL-TR
Microchip Technology

-
DRV8800PWPR
Texas Instruments

-
DRV8835DSSR
Texas Instruments

-
EMC2303-1-KP-TR
Microchip Technology

-
DRV8876PWPR
Texas Instruments
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

