Allegro MicroSystems A3946KLBTR-T
- Part No.:
- A3946KLBTR-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 16-PowerSOIC (0.295", 7.50mm Width)
- Datasheet:
-
A3946KLBTR-T.pdf
- Description:
- IC MOTOR DRIVER 7V-60V 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,659
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Product details
Overview
A3946KLBTR-T from Allegro MicroSystems is a half-bridge power MOSFET controller designed to drive high-current N-channel MOSFETs in unidirectional DC motor and three-phase BLDC motor applications. It features dual gate drivers (GH and GL), integrated top-off charge pump enabling 100% duty cycle operation, and operates across 7–60 V VBB with –40°C to +135°C ambient range. Used in automotive seat/mirror actuators and industrial valve control.
For engineers reviewing the A3946KLBTR-T datasheet, A3946KLBTR-T pinout, A3946KLBTR-T application, or A3946KLBTR-T equivalent, key selection criteria include bootstrap-enabled high-side drive capability, programmable dead time via DT pin, thermal shutdown at 170°C, and AEC-Q100-compliant protection features for automotive-grade reliability.
Technical Context
The A3946KLBTR-T implements a dual-output gate driver architecture with independent high-side (GH) and low-side (GL) outputs, each capable of sourcing/sinking ≥2 A peak current. Its internal top-off charge pump maintains VBOOT above 7.25 V during sustained high-side conduction, enabling true DC operation without external boost circuitry.
Control logic supports both single-pin PWM (IN1=IN2 with RDEAD on DT) and independent input modes (DT tied to VREF). Fault management includes latched overtemperature (170°C TJ), VREG undervoltage (8.3 V trip), and non-latched BOOT undervoltage detection - all reported via open-drain ~FAULT pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VBB Range | 7–60 V: Supports wide-input automotive and industrial battery systems without external regulators. |
| VREG Output | 13 V ±0.5 V: Powers low-side driver and bootstraps high-side; regulates down to 7 V input via charge pump doubler mode. |
| Dead Time Range | 350 ns–6 µs: Adjustable via RDEAD (5–100 kΩ) to prevent shoot-through in high-frequency PWM motor drives. |
| Thermal Shutdown | 170°C TJ with 15°C hysteresis: Protects against sustained overload while allowing recovery without reset pulse if fault clears. |
| Gate Drive Strength | RDS(ON) = 4 Ω (pull-up), 2 Ω (pull-down) at 25°C: Ensures fast 60 ns rise / 40 ns fall times into 3300 pF load for efficient MOSFET switching. |
| ESD Rating | 2000 V HBM, 1050 V CDM: Meets AEC-Q100-002/-011 for robustness in automotive assembly and field environments. |
| Ambient Temp | –40°C to +135°C: Qualified for under-hood and industrial control cabinet deployment without derating. |
Pinout & Package
Package: 16-lead TSSOP with exposed thermal pad (LP suffix), lead-free, 100% matte tin plating. Thermal pad must be externally soldered to PCB ground plane for optimal junction-to-board thermal resistance (34°C/W on 4-layer JEDEC board).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VBB (16) | Main power supply input | Accepts 7–60 V battery rail; powers internal charge pump and logic; requires local 10 µF decoupling. |
| GH (7) | High-side gate driver output | Drives N-MOSFET gate referenced to floating S node; requires external gate resistor for dv/dt control. |
| GL (5) | Low-side gate driver output | Drives N-MOSFET gate referenced to LGND; sources/sinks >2 A to switch 160 nC gate charge in <100 ns. |
| S (6) | Switch node / load return | Connects to motor phase terminal and bootstrap capacitor negative; forms floating reference for GH driver. |
| BOOT (8) | High-side bootstrap supply | Positive terminal of bootstrap capacitor; monitored for UVLO (7.8 V threshold) to disable GH during insufficient charge. |
| ~FAULT (9) | Open-drain fault indicator | Pulls low for latched faults (overtemp, VREG UVLO) or transient faults (BOOT UVLO); requires external pull-up. |
| DT (14) | Dead time programming input | Analog pin setting tDEAD = 50 + (RDEAD/16.7); grounded via resistor for PWM mode; tied to VREF to disable dead time. |
| RESET (12) | Logic enable / sleep control | Active-low input; forces ultra-low-power sleep (<10 µA) when held low >10 µs; clears latched faults with 1–10 µs pulse. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated top-off charge pump | Enables 100% duty cycle high-side conduction without external boost IC or diode-capacitor network. |
| Programmable dead time | Adjustable 350 ns–6 µs via single external resistor (DT pin), eliminating need for external timing ICs or complex layout. |
| Latched thermal protection | Shuts down GH/GL outputs at 170°C junction temperature but retains logic state; cleared only by RESET pulse. |
| Dual ground separation | Independent PGND (pin 4) and LGND (pin 13) pins minimize noise coupling between power and logic domains. |
| Bootstrap capacitor UVLO | Non-latched fault on VBOOT < 7.8 V prevents high-side turn-on with insufficient gate drive, avoiding shoot-through risk. |
Applications
| Automotive Seat Actuators | Industrial Valve Positioners |
|---|---|
Use Scenario: Bidirectional linear motion control of electric seat tracks using 24 V DC motors with regenerative braking. IC Role / Device Role / Timing Role: Half-bridge controller managing high-side/low-side MOSFET sequencing, dead time insertion, and fault-safe shutdown. Use Value: Enables compact, thermally robust motor drive with integrated 13 V VREG and 170°C thermal cutoff - eliminating discrete LDO and thermal sensor. |
Use Scenario: Precision positioning of pneumatic/hydraulic valves in factory automation systems powered from 48 V DC rails. IC Role / Device Role / Timing Role: Gate driver for N-channel MOSFET half-bridge delivering 100% duty cycle hold current to solenoid coils. Use Value: Top-off charge pump sustains gate voltage during continuous conduction, preventing coil dropout during long dwell periods. |
| BLDC Fan Controllers | Power Tool Motor Drives |
Use Scenario: Sensorless three-phase BLDC commutation in HVAC blowers operating from 12–48 V battery or PSU. IC Role / Device Role / Timing Role: High-current gate driver per phase leg with synchronized dead time and bootstrap management. Use Value: 60 ns rise time and 4 Ω pull-up resistance ensure clean switching at 20–50 kHz PWM frequencies, reducing EMI and MOSFET losses. |
Use Scenario: High-torque brushed DC motor control in cordless drills and impact drivers with 18–40 V Li-ion packs. IC Role / Device Role / Timing Role: Unidirectional half-bridge driver supporting forward/brake operation with current limiting and thermal foldback. Use Value: VBB range up to 60 V accommodates fully charged multi-cell packs; 135°C ambient rating ensures reliability in enclosed tool housings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar half-bridge gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP6612DQ | Single-chip dual-N half-bridge with integrated MOSFETs (30 V, 5 A); no external bootstrap required. | Better suited for space-constrained, lower-power (<100 W) applications where integrated FETs suffice. | Select MP6612DQ when board area and BOM count are prioritized over 60 V capability and discrete FET flexibility. |
| TBD62783AFG | High-side/low-side driver with built-in level shifters; supports up to 50 V but lacks top-off charge pump. | Requires external bootstrap diode/capacitor network and cannot sustain 100% duty cycle without design overhead. | Choose TBD62783AFG only if VBB ≤ 50 V and continuous high-side conduction is not required. |
Compared with MP6612DQ and TBD62783AFG, the A3946KLBTR-T uniquely delivers 60 V operation, integrated top-off charge pump for true DC high-side drive, and AEC-Q100 qualification - making it the only option qualified for automotive body electronics requiring sustained 100% duty cycle and thermal resilience to 135°C ambient.
Availability
A3946KLBTR-T is available at Aetrix Electronics and suitable for automotive seat actuation, industrial valve control, BLDC fan systems, and power tool motor drives requiring stable component supply across extended temperature and voltage ranges.
Supply support for A3946KLBTR-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based semiconductor company specializing in magnetic sensing and precision power ICs, with core expertise in motor control, current sensing, and automotive-grade analog solutions.
The A3946 product line delivers high-voltage, high-current gate drivers optimized for automotive and industrial motion control - emphasizing robust fault handling, thermal resilience, and bootstrap-based high-side drive without external components.
FAQ
What is the maximum VBB voltage rating for the A3946KLBTR-T?
The A3946KLBTR-T supports a maximum load supply voltage (VBB) of 60 V, as specified in its Absolute Maximum Ratings table. This allows direct integration into 48 V industrial systems and fully charged 12S Li-ion battery packs (up to ~54 V) without external step-down regulation. Operation beyond 60 V risks permanent damage to internal charge pump and gate drive circuits.
Does the A3946KLBTR-T support 100% duty cycle high-side operation?
Yes, the A3946KLBTR-T supports true 100% duty cycle high-side conduction via its internal top-off charge pump. Unlike basic bootstrap drivers that require periodic low-side conduction to recharge the bootstrap capacitor, the A3946KLBTR-T's trickle-charge pump replenishes gate drive voltage continuously - enabling sustained high-side MOSFET turn-on without interruption.
How is dead time configured on the A3946KLBTR-T?
Dead time on the A3946KLBTR-T is set by connecting an external resistor (RDEAD) between the DT pin (14) and LGND. The resulting tDEAD follows tDEAD = 50 + (RDEAD/16.7) ns, adjustable from 350 ns to 6 µs. Leaving DT open defaults to 12 µs; tying DT to VREF disables dead time entirely for direct logic-controlled gate timing.
What fault conditions cause a latched ~FAULT output on the A3946KLBTR-T?
The A3946KLBTR-T asserts a latched ~FAULT signal for overtemperature (TJ > 170°C) and VREG undervoltage (VREG < 8.3 V). These faults remain active until cleared by a 1–10 µs low pulse on the RESET pin. In contrast, BOOT undervoltage and VREF undervoltage generate non-latched faults that clear automatically when the condition resolves.
Can the A3946KLBTR-T drive both high-side and low-side N-channel MOSFETs simultaneously?
No - simultaneous high-side and low-side N-MOSFET conduction is explicitly prohibited by the A3946KLBTR-T's control logic and fault protection. The Functional Block Diagram and Control Logic Table show that GH = H and GL = H results in "CAUTION: High-side and low-side FETs ON", triggering immediate ~FAULT assertion to prevent shoot-through and device destruction.
A3946KLBTR-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 16-PowerSOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Motor Type - Stepper:
- -
- Motor Type - AC, DC:
- Brushless DC (BLDC)
- Function:
- Controller - Commutation, Direction Management
- Output Configuration:
- Pre-Driver - Half Bridge
- Interface:
- Parallel
- Technology:
- Power MOSFET
- Step Resolution:
- -
- Applications:
- General Purpose
- Current - Output:
- -
- Voltage - Supply:
- 7V ~ 60V
- Voltage - Load:
- -
- Operating Temperature:
- -40°C ~ 135°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
A3946KLBTR-T FAQ
1.How can I place an order for A3946KLBTR-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A3946KLBTR-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A3946KLBTR-T reliable?
The price and inventory of A3946KLBTR-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3946KLBTR-T is usually 5 days.
3.What payment methods are accepted for A3946KLBTR-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3946KLBTR-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A3946KLBTR-T?
A3946KLBTR-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A3946KLBTR-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A3946KLBTR-T?
For technical support, including A3946KLBTR-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3946KLBTR-T requirements.
6.How does Aetrix verify that A3946KLBTR-T is sourced from the original manufacturer or authorized distributors?
All A3946KLBTR-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3946KLBTR-T meets industry standards.
7.What is the process for return or replacement of A3946KLBTR-T?
All A3946KLBTR-T units undergo pre-shipment inspection (PSI). If there is an issue with A3946KLBTR-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A3946KLBTR-T part is unused and in its original packaging.
Return procedure for A3946KLBTR-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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