Allegro MicroSystems A3949SLB
- Part No.:
- A3949SLB
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 16-PowerSOIC (0.295", 7.50mm Width)
- Datasheet:
-
A3949SLB.pdf
- Description:
- IC MOTOR DRIVER 8V-36V 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
A3949SLB from Allegro MicroSystems is a discontinued DMOS full-bridge motor driver IC designed for PWM-controlled DC motors, delivering ±2.8 A peak output current at up to 36 V supply voltage, with PHASE/ENABLE control interface and internal synchronous rectification for reduced power dissipation in industrial actuator and automotive seat/mirror positioning systems.
For engineers reviewing the A3949SLB datasheet, A3949SLB pinout, A3949SLB application, or A3949SLB equivalent, key selection considerations include its 16-pin SOIC LB package with fused pins 4 (SLEEP) and 13 (VCP), thermal shutdown at 170°C, UVLO threshold of 6 V, sleep-mode quiescent current ≤10 μA, and RDS(ON) as low as 0.3 Ω (sink) at 25°C.
Technical Context
The A3949SLB implements a four-switch DMOS H-bridge with independent source/sink gate drive architecture, using an internal charge pump (CP1/CP2) to generate VCP > VBB for high-side NMOS control and a regulated VREG supply for low-side gate drive. It supports forward/reverse/brake/fast-decay SR operation via MODE, PHASE, and ENABLE logic inputs.
Protection features are tightly integrated: undervoltage lockout monitors both VBB (6 V threshold, 250 mV hysteresis) and VCP, thermal shutdown activates at 170°C with 15°C hysteresis, and crossover current protection prevents shoot-through during switching transitions with 500 ns delay.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Peak Output Current | ±2.8 A - supports medium-power DC motors up to ~100 W at 36 V with appropriate heatsinking |
| Supply Voltage Range | 8–36 V - compatible with 12 V and 24 V industrial and automotive battery rails |
| RDS(ON) (Sink, 25°C) | 0.3 Ω typ - limits conduction loss to <1.2 W per switch at 2 A continuous |
| RDS(ON) (Source, 25°C) | 0.4 Ω typ - enables efficient high-side drive without external bootstrap circuitry |
| UVLO Threshold | 6 V rising - prevents erratic operation during brown-out or cold-cranking conditions |
| Thermal Shutdown | 170°C junction - provides robust overtemperature protection with 15°C hysteresis for stable recovery |
| Sleep Current | ≤10 μA - reduces system standby power in battery-powered applications like power seats |
Pinout & Package
The A3949SLB is supplied in a 16-pin plastic SOIC wide-body package (suffix LB) with copper batwing tab for enhanced thermal performance. Pins 4 (SLEEP) and 13 (VCP) are internally fused per JEDEC MS-013AA outline.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (N/C) | No connect | Unused; must remain unconnected per datasheet |
| 2 (MODE) | Logic input | Selects slow/fast decay mode; determines braking behavior and SR timing |
| 3 (GND) | Power ground | Main return path for load current and internal logic; connects to PCB ground plane |
| 4 (SLEEP) | Logic input | Active-low enable for ultra-low-power sleep mode (≤10 μA IQ) |
| 5 (ENABLE) | Logic input | Global PWM gate; disables outputs when low, enabling fast brake or Hi-Z state |
| 6 (OUTA) | H-bridge output A | High-current source/sink terminal for one motor winding leg |
| 7 (SENSE) | Power return | Low-side current sense node; connects to external shunt resistor for closed-loop control |
| 8 (VBB) | Motor supply | Main 8–36 V power input; decoupled with ≥100 μF bulk capacitor |
| 9 (OUTB) | H-bridge output B | High-current source/sink terminal for second motor winding leg |
| 10 (CP1) | Charge pump | Connects to 0.1 μF ceramic cap for flying capacitor in charge pump oscillator |
| 11 (CP2) | Charge pump | Completes charge pump loop; requires 0.1 μF ceramic cap to CP1 |
| 12 (GND) | Power ground | Second ground pin; improves thermal and EMI performance via dual GND routing |
| 13 (VCP) | Charge pump reservoir | Stores boosted gate drive voltage; monitored for UVLO; requires 0.1 μF ceramic cap to VBB |
| 14 (VREG) | Regulated supply | Internal 5 V regulator output for low-side gate drive; requires 0.22 μF decoupling |
| 15 (N/C) | No connect | Unused; must remain unconnected |
| 16 (N/C) | No connect | Unused; must remain unconnected |
Key Features
| Feature | Design Value |
|---|---|
| Internal charge pump | Eliminates need for external bootstrap diode/capacitor; enables fully NMOS H-bridge with single supply |
| Synchronous rectification | Reduces power loss during PWM off-time by actively controlling body diode conduction paths |
| Fused SLEEP and VCP pins | Pins 4 and 13 are internally connected-reduces PCB routing complexity and improves layout reliability |
| Integrated UVLO on VBB and VCP | Prevents partial gate drive and shoot-through by disabling outputs if either supply falls below safe threshold |
| Thermal shutdown with hysteresis | 170°C trip point with 15°C hysteresis ensures stable re-enable after cooling, avoiding thermal oscillation |
Applications
| Automotive Power Seats | Industrial Linear Actuators |
|---|---|
Use Scenario: Precise bidirectional movement of seat positioners using 12 V DC motors under varying mechanical loads. IC Role / Device Role / Timing Role: Full-bridge motor driver executing PHASE/ENABLE-based direction and speed control with fast-decay braking for smooth stop. Use Value: Integrated synchronous rectification cuts conduction losses by ~30% vs. diode-based freewheeling, extending battery life and reducing heatsink size. | Use Scenario: Positioning heavy-duty valves or dampers in HVAC and process control systems powered from 24 V DC supplies. IC Role / Device Role / Timing Role: High-current H-bridge providing ±2.8 A peak drive with thermal shutdown and UVLO for reliable operation in unattended environments. Use Value: 52 °C/W θJA on 2-layer PCB allows operation up to 85°C ambient without forced air, simplifying enclosure design. |
| Medical Bed Adjusters | Robotic End-Effectors |
Use Scenario: Controlled lifting/lowering of patient support surfaces using low-noise, low-EMI DC motors in Class II medical equipment. IC Role / Device Role / Timing Role: Motor driver implementing slow-decay brake mode via MODE pin to minimize audible coil whine during motion stop. Use Value: Sleep mode (≤10 μA) enables energy-efficient standby between adjustments, meeting IEC 60601-1 leakage current requirements. | Use Scenario: Compact gripper or joint actuation in collaborative robots where board space and thermal density are constrained. IC Role / Device Role / Timing Role: Space-optimized full-bridge driver in 16-pin SOIC LB package delivering high current density with integrated protection. Use Value: Copper batwing tab improves thermal transfer to PCB, enabling 2.8 A peak current in 10 mm × 10 mm footprint without discrete heatsink. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar full-bridge motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| A3950SLPTR-T | Higher RDS(ON) (0.55 Ω sink), 3.5 A peak current, same LB package and pinout | Designed for higher-power motors; requires updated thermal design due to increased conduction loss | Drop-in replacement only if board layout and thermal margin accommodate higher power dissipation |
| TB6612FNG | Lower peak current (1.2 A), dual H-bridge, no internal charge pump, different pinout and control logic | Targeted at low-power dual-motor applications; lacks VCP/VREG monitoring and fused-pin integration | Requires PCB redesign and firmware adaptation; suitable only for cost-sensitive, lower-current designs |
Compared with A3949SLB, the A3950SLPTR-T offers higher current capability but increased conduction loss, while the TB6612FNG trades integration and protection for lower cost and dual-channel flexibility-neither is pin-compatible, and both require validation of thermal, control, and protection behavior in final application.
Availability
A3949SLB is available at Aetrix Electronics and suitable for legacy system repair, automotive aftermarket modules, and industrial equipment maintenance requiring stable component supply despite end-of-life status.
Supply support for A3949SLB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer and manufacturer of high-performance magnetic sensing and power IC solutions, headquartered in Worcester, Massachusetts.
The A3949 belongs to Allegro's DMOS full-bridge motor driver product line, engineered specifically for robust, integrated control of brushed DC motors in automotive and industrial motion systems.
FAQ
Is the A3949SLB still in production?
No, the A3949SLB is a discontinued product. Allegro MicroSystems ceased production on June 2, 2014. It is not recommended for new designs, and samples are no longer available. Aetrix Electronics maintains limited legacy stock for repair and maintenance use only.
What is the function of pins 4 and 13 on the A3949SLB?
Pins 4 (SLEEP) and 13 (VCP) are internally fused in the A3949SLB LB package. This means they share a common internal connection-no external jumper is required. The SLEEP pin controls ultra-low-power mode, while VCP serves as the charge pump reservoir node; their fusion simplifies PCB layout and improves reliability.
Can the A3949SLB drive a 24 V, 2 A DC motor continuously?
Yes, the A3949SLB can drive a 24 V, 2 A DC motor continuously under proper thermal conditions. With RDS(ON) ≈ 0.3 Ω (sink) and 0.4 Ω (source) at 25°C, total conduction loss is ~1.4 W. Using the specified 2-layer PCB (θJA = 52 °C/W), junction temperature rise is ~73°C-well within the 150°C max rating when ambient is ≤85°C.
Does the A3949SLB support current sensing?
Yes, the A3949SLB supports low-side current sensing via the SENSE pin (pin 7), which serves as the power return path. An external shunt resistor placed between SENSE and system ground enables closed-loop current control. The device does not include an integrated current amplifier or ADC; external signal conditioning is required.
What is the purpose of the VREG pin on the A3949SLB?
The VREG pin on the A3949SLB outputs a regulated ~5 V supply used to power the low-side DMOS gate drivers. It must be decoupled with a 0.22 μF ceramic capacitor to ground. VREG is internally monitored-if it falls out of regulation, the device disables outputs to prevent unreliable gate drive and potential shoot-through.
A3949SLB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 16-PowerSOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Motor Type - Stepper:
- -
- Motor Type - AC, DC:
- Brushed DC
- Function:
- Driver - Fully Integrated, Control and Power Stage
- Output Configuration:
- Half Bridge (2)
- Interface:
- Parallel
- Technology:
- DMOS
- Step Resolution:
- -
- Applications:
- General Purpose
- Current - Output:
- 2.8A
- Voltage - Supply:
- 8V ~ 36V
- Voltage - Load:
- 8V ~ 36V
- Operating Temperature:
- -20°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
A3949SLB FAQ
1.How can I place an order for A3949SLB through Aetrix?
Please submit a Request for Quotation (RFQ) for A3949SLB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A3949SLB reliable?
The price and inventory of A3949SLB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3949SLB is usually 5 days.
3.What payment methods are accepted for A3949SLB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3949SLB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A3949SLB?
A3949SLB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A3949SLB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A3949SLB?
For technical support, including A3949SLB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3949SLB requirements.
6.How does Aetrix verify that A3949SLB is sourced from the original manufacturer or authorized distributors?
All A3949SLB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3949SLB meets industry standards.
7.What is the process for return or replacement of A3949SLB?
All A3949SLB units undergo pre-shipment inspection (PSI). If there is an issue with A3949SLB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A3949SLB part is unused and in its original packaging.
Return procedure for A3949SLB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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