Allegro MicroSystems A3955SLB
- Part No.:
- A3955SLB
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 16-PowerSOIC (0.295", 7.50mm Width)
- Datasheet:
-
A3955SLB.pdf
- Description:
- IC MTR DRV BIPLR 4.5-5.5V 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,589
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Product details
Overview
A3955SLB from Allegro MicroSystems is a discontinued 16-pin SOICW full-bridge PWM microstepping motor driver IC designed to control one winding of a bipolar stepper motor. It delivers ±1.5 A continuous output current at up to 50 V load supply, supports eighth-step microstepping via its internal 3-bit nonlinear DAC, and implements user-selectable slow/fast/mixed current-decay modes for optimized torque smoothness in precision motion systems.
For engineers reviewing the A3955SLB datasheet, A3955SLB pinout, A3955SLB application, or A3955SLB equivalent, this page provides verified technical context, validated pin functions, confirmed microstepping step resolution (1/8-step), exact thermal shutdown threshold (165°C), and two documented alternative drivers for legacy design support and migration planning.
Technical Context
The A3955SLB integrates a fixed-off-time PWM current regulator with RC-timed blanking, where external RT and CT set both off-time (e.g., 20.2 μs typical at RT=43 kΩ, CT=470 pF) and comparator blanking duration. Its internal 3-bit nonlinear DAC maps D0–D2 inputs to eight precise current ratios (19.5% to 100%), enabling sinusoidal current profiling without external DACs.
Current decay behavior is fully determined by the analog PFD input: ≥3.5 V enables slow decay (recirculating), ≤0.8 V enables fast decay (regenerative), and 1.1–3.1 V enables mixed decay-where fast decay dominates the initial portion of off-time before switching to slow decay. This architecture directly addresses back-EMF-induced current tailing in stepper windings during direction reversal.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | ±1.5 A continuous - sets maximum winding current capability under thermal limits |
| Load Voltage | 50 V max - supports stepper motors with high-inductance windings requiring elevated supply rails |
| Microstep Resolution | Eighth-step (1/8-step) - achieved via 3-bit nonlinear DAC with eight discrete current ratios |
| PWM Off-Time | 18.2–22.3 μs (typ. 20.2 μs) - externally adjustable via RT/CT; determines minimum switching frequency and ripple |
| Current-Decay Modes | Slow, fast, and mixed - selected by analog PFD voltage; critical for suppressing resonance and tailing |
| Thermal Shutdown | 165°C activation with 15°C hysteresis - protects against sustained overload or poor heatsinking |
| Sense Voltage Range | VREF = 0.5–2.5 V - defines trip point accuracy and compatibility with standard reference sources |
Pinout & Package
Package: 16-pin SOICW (suffix 'LB') with internally fused pins 4–5 and 12–13; thermally enhanced ground pins at 0 V potential; lead-free matte tin plating.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (PFD) | Analog current-decay mode selector | Voltage level (≤0.8 V / 1.1–3.1 V / ≥3.5 V) directly configures fast/mixed/slow decay behavior |
| 2 (REF) | DAC reference input | Combined with RS and D0–D2, sets ITRIP ≈ (SRCR × VREF)/(3 × RS); defines peak current accuracy |
| 3 (RC) | RC timing node | External RT/CT network sets PWM off-time and comparator blanking time; CT ≥ 470 pF required |
| 4–5, 12–13 (GROUND) | Logic and load return | Internally fused pairs provide low-impedance ground paths; thermally connected to exposed tab |
| 6 (VCC) | Logic supply input | 4.5–5.5 V operation; powers internal logic, DAC, and comparators; draws 42–50 mA active |
| 7 (PHASE) | Winding polarity control | High/low state selects current direction per Table 1; includes ~1 μs internal dead time to prevent shoot-through |
| 8–9, 14 (D2, D1, D0) | DAC data inputs | 3-bit nonlinear code selects one of eight current ratios (0% to 100%) per Table 3 |
| 10, 15 (OUTA, OUTB) | Full-bridge power outputs | Drive stepper winding terminals; rated for ±1.5 A, 50 V; include integrated clamp diodes |
| 11 (SENSE) | Current-sense return | Connects to low-side sense resistor (RS); feeds current-sense comparator with ±5 mV offset |
| 16 (VBB) | Motor supply input | 5–50 V range; powers H-bridge outputs; requires local 47 μF decoupling per application diagram |
Key Features
| Feature | Design Value |
|---|---|
| Internal PWM current regulation | Fixed off-time architecture eliminates need for external current-loop op-amps or modulators |
| Nonlinear 3-bit DAC | Eight precisely spaced current ratios (19.5%–100%) minimize step-size nonlinearity in microstepping |
| User-selectable decay modes | Single analog PFD input replaces multiple digital controls; enables dynamic decay adaptation |
| Integrated protection | Thermal shutdown (165°C), UVLO (3.7 V threshold), crossover-current prevention, and clamp diodes |
| SOICW package with fused grounds | 16-pin SOICW (LB) offers surface-mount compatibility and enhanced thermal performance vs. DIP |
Applications
| Laser Printer Paper Feed System | CNC Milling Axis Control |
|---|---|
Use Scenario: Precise paper advancement using a bipolar stepper motor with 1.8° base step angle. IC Role / Device Role / Timing Role: A3955SLB drives one motor winding in eighth-step mode to achieve 0.225° effective step resolution and eliminate low-speed vibration. Use Value: Nonlinear DAC and mixed-decay mode suppress resonance at 100–300 Hz, ensuring quiet, jitter-free paper transport. |
Use Scenario: Open-loop positioning of X/Y/Z axes in desktop CNC routers with NEMA 17 stepper motors. IC Role / Device Role / Timing Role: A3955SLB regulates winding current to ±1.5 A at 24 V supply, enabling high holding torque while maintaining microstepping fidelity. Use Value: Adjustable RC off-time (15–35 μs range) allows EMI reduction and audible noise suppression during rapid axis moves. |
| Medical Infusion Pump Motor Drive | Automated Optical Inspection Stage |
Use Scenario: Smooth, pulseless fluid delivery via microstepping-driven peristaltic pump mechanism. IC Role / Device Role / Timing Role: A3955SLB implements sinusoidal current profiling using PHASE/D0–D2 sequencing per Table 4 to minimize torque ripple. Use Value: Slow-decay mode during current rise and mixed-decay during fall eliminate current tailing caused by motor back-EMF, ensuring accurate volumetric dosing. |
Use Scenario: High-resolution XY translation stage for camera-based PCB inspection requiring sub-micron repeatability. IC Role / Device Role / Timing Role: A3955SLB operates in quarter-step mode with 50 V supply to drive high-inductance windings for improved low-speed stability. Use Value: Internal thermal shutdown (165°C) and UVLO (3.7 V) provide fail-safe protection during extended duty cycles without external monitoring circuitry. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar full-bridge PWM microstepping motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| A4975 | Successor device with integrated charge pump, higher 2.5 A current rating, and SPI interface; no PFD analog input | Requires redesign of decay-mode control logic and gate-drive timing; supports higher-power motors | Select A4975 for new designs needing higher current, SPI configurability, and modern packaging |
| A3955SB | Electrically identical but in 16-pin DIP package with exposed thermal tabs; same pinout and electrical specs | Used in through-hole prototyping or legacy PCBs; requires different thermal management (RθJA = 43°C/W vs. 67°C/W) | Select A3955SB only when DIP footprint is mandatory; verify heatsinking meets 43°C/W requirement |
Compared with A3955SLB, the A4975 offers higher current and digital control but mandates firmware and layout changes, while the A3955SB provides drop-in electrical compatibility in DIP form-making it the only true pin-and-function replacement for board-level reuse.
Availability
A3955SLB is available at Aetrix Electronics and suitable for laser printer paper feed systems, CNC milling axis control, medical infusion pump motor drives, and automated optical inspection stages requiring stable component supply for legacy production and repair programs.
Supply support for A3955SLB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer of high-performance magnetic sensing and power ICs, headquartered in Worcester, Massachusetts, with over 40 years of expertise in motion control and energy-efficient semiconductor solutions.
The A3955 product line was developed specifically for cost-sensitive, high-reliability microstepping applications in office automation, industrial motion, and medical equipment-emphasizing analog flexibility, integrated protection, and thermal robustness in compact packages.
FAQ
Is the A3955SLB still in production?
No, the A3955SLB is a discontinued product. Allegro MicroSystems ceased production as of January 30, 2012, and no new samples or production lots are available. Aetrix Electronics maintains limited legacy stock for repair and maintenance of existing systems, but it is not recommended for new designs.
What is the key functional difference between A3955SLB and A3955SB?
The A3955SLB and A3955SB are electrically identical and share the same pinout, terminal functions, and electrical specifications. The sole difference is packaging: A3955SLB uses a 16-pin SOICW (LB) package, while A3955SB uses a 16-pin DIP (B) package with exposed thermal tabs. Both are valid alternatives depending on assembly method.
Can the A3955SLB achieve true sinusoidal current waveforms?
Yes, the A3955SLB supports sinusoidal current profiling through coordinated PHASE and D0–D2 sequencing per Table 4 in the datasheet. Its nonlinear DAC provides eight precisely spaced current ratios (19.5% to 100%), and mixed-decay mode prevents current tailing-enabling smooth, low-vibration microstepping essential for precision motion.
What is the minimum recommended CT value for stable A3955SLB operation?
The minimum recommended CT value for the A3955SLB is 470 pF ±5%. This ensures sufficient comparator blanking time to prevent false overcurrent trips caused by clamp diode reverse recovery or switching transients. Using lower values risks unstable current regulation and erratic PWM behavior.
Does the A3955SLB require special power-up sequencing?
No, the A3955SLB does not require special power-up sequencing. Its internal UVLO circuit (3.7 V enable threshold with 0.45 V hysteresis) and thermal shutdown ensure safe startup across VCC and VBB ramps. The device enters a known disabled state until valid logic levels are applied to D0–D2 and PHASE.
A3955SLB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 16-PowerSOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Motor Type - Stepper:
- Bipolar
- Motor Type - AC, DC:
- -
- Function:
- Driver - Fully Integrated, Control and Power Stage
- Output Configuration:
- Half Bridge (2)
- Interface:
- Parallel
- Technology:
- Bipolar
- Step Resolution:
- 1, 1/2, 1/4, 1/8
- Applications:
- General Purpose
- Current - Output:
- 1.5A
- Voltage - Supply:
- 4.5V ~ 5.5V
- Voltage - Load:
- 4.5V ~ 50V
- Operating Temperature:
- -20°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
A3955SLB FAQ
1.How can I place an order for A3955SLB through Aetrix?
Please submit a Request for Quotation (RFQ) for A3955SLB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A3955SLB reliable?
The price and inventory of A3955SLB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3955SLB is usually 5 days.
3.What payment methods are accepted for A3955SLB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3955SLB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A3955SLB?
A3955SLB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A3955SLB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A3955SLB?
For technical support, including A3955SLB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3955SLB requirements.
6.How does Aetrix verify that A3955SLB is sourced from the original manufacturer or authorized distributors?
All A3955SLB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3955SLB meets industry standards.
7.What is the process for return or replacement of A3955SLB?
All A3955SLB units undergo pre-shipment inspection (PSI). If there is an issue with A3955SLB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A3955SLB part is unused and in its original packaging.
Return procedure for A3955SLB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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