My Inquiry
My Account
Allegro MicroSystems A3958SLBTR-T
- Part No.:
- A3958SLBTR-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 24-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
A3958SLBTR-T.pdf
- Description:
- IC MOTOR DRIVER 4.5V-5.5V 24SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:4,979
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
A3958SLBTR-T from Allegro MicroSystems is a DMOS full-bridge PWM motor driver IC designed for bidirectional DC motor control with ±2 A continuous output current and 50 V load supply capability. It implements programmable fixed-off-time current regulation via a 3-wire serial interface, supports slow/fast/mixed current-decay modes, and integrates synchronous rectification to reduce power dissipation in H-bridge applications such as industrial actuators and precision positioning systems.
For engineers reviewing the A3958SLBTR-T datasheet, A3958SLBTR-T pinout, A3958SLBTR-T application, or A3958SLBTR-T equivalent, this page delivers verified technical context including thermal resistance (RθJA = 77 °C/W), serial-programmable blank time (4–24/fOSC), internal UVLO (4.2 V typ), and SOICW package-specific pin mapping - all confirmed from Allegro's official documentation.
Technical Context
The A3958SLBTR-T uses an internal oscillator (2.9–6.1 MHz) to drive a fixed-off-time PWM current-control circuit that regulates motor winding current via external sense resistor (RS) and reference voltage (VREF). Current trip level is configurable as VREF/5RS or VREF/10RS using RANGE input and serial bit D16.
It features dual decay-path control: mixed-decay mode splits off-time into programmable fast-decay (D7–D10) followed by slow-decay, while synchronous rectification (D11/D12) reduces conduction losses by enabling low-rDS(on) (270 mΩ typ) DMOS body diode bypass during recirculation - active only in fast/mixed decay when enabled.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Continuous Output Current | ±2 A - supports DC motors up to 100 W at 50 V without external heatsinking under defined thermal conditions. |
| Load Supply Voltage | 20–50 V - compatible with standard industrial 24 V and 48 V DC bus systems. |
| rDS(on) (Source/Sink) | 270 mΩ typ - limits I²R loss to ≤1.08 W per channel at 2 A, reducing thermal stress on SOICW package. |
| Thermal Resistance (Junction-to-Ambient) | 77 °C/W - requires PCB copper area optimization for sustained 2 A operation in ambient >50 °C. |
| Serial Interface | 3-wire (CLOCK/DATA/STROBE) - enables real-time configuration of decay mode, blank time, and sleep state without MCU GPIO overhead. |
| UVLO Threshold | 4.2 V typ - prevents erratic operation during brown-out conditions on 5 V logic supply (VDD). |
| Thermal Shutdown | 165 °C with 15 °C hysteresis - protects against latch-up during overload or poor heatsinking; recovery occurs at ~150 °C. |
Pinout & Package
Package: 24-pin SOICW (suffix 'LB') with internally fused pins 6/7 and 18/19; lead-free, 100% matte tin leadframe; exposed thermal pad not present (unlike DIP 'B' variant).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CP, CP1, CP2 | Charge pump terminals | CP connects to VBB reservoir capacitor (0.22 μF); CP1/CP2 host flying capacitor (0.22 μF) to generate gate drive voltage > VBB for high-side DMOS. |
| OUTA / OUTB | H-bridge output terminals | Direct connection points to motor leads; each rated for ±2 A continuous; share ground-referenced power path with no isolation required. |
| SENSE | Current sense input | Connects to low-side sense resistor (RS); comparator blanking (4–24/fOSC) prevents false triggering from switching transients. |
| PHASE / ENABLE | Direction & enable control | PHASE sets motor polarity (forward/reverse) in conjunction with serial bit D15; ENABLE enables/disables bridge via D14 or external PWM chopping. |
| REF / RANGE | VREF scaling control | REF accepts 0–2.6 V analog reference; RANGE selects 5× or 10× division via D16 to set ITRIP = VREF/5RS or VREF/10RS. |
| DATA / CLOCK / STROBE | Serial port interface | 3-wire SPI-like interface (no chip select); data latched on rising CLOCK edge; STROBE rising edge initiates write of 20-bit register (D0–D19). |
Key Features
| Feature | Design Value |
|---|---|
| Programmable current-decay modes | Slow, fast, or mixed decay selected via serial bits D13/D17 - enables torque ripple optimization and braking behavior tuning. |
| Synchronous rectification | Configurable active/passive mode (D11) and enable/disable (D12) - reduces power loss by replacing body diode conduction with low-rDS(on) channel conduction during decay. |
| Internal thermal shutdown | 165 °C trip with 15 °C hysteresis - provides fail-safe protection without external monitoring circuitry. |
| Blank time programming | 4/fOSC, 6/fOSC, 12/fOSC, or 24/fOSC (D0/D1) - eliminates false overcurrent trips caused by reverse recovery spikes at switch turn-on. |
| Low-power sleep mode | 20 μA quiescent current (D19 = 0) - disables charge pump, regulator, and logic to minimize standby consumption in battery-powered systems. |
Applications
| Industrial Actuators | Medical Pump Drives |
|---|---|
|
Use Scenario: Precision linear actuator in automated valve control requiring bidirectional motion and stall detection. IC Role / Device Role / Timing Role: Full-bridge driver regulating coil current via VREF/RS feedback; serial interface adjusts decay mode to suppress mechanical resonance during microstepping. Use Value: Mixed-decay mode + synchronous rectification reduces heat rise by ≥35% vs. diode-based decay, extending actuator service life in sealed enclosures. |
Use Scenario: Peristaltic pump in infusion therapy device demanding smooth flow rate control and fault-safe stop. IC Role / Device Role / Timing Role: Motor controller implementing braking via slow-decay + synchronous rectification (D12=1, D13=0); UVLO and thermal shutdown ensure fail-safe shutdown on power anomaly. Use Value: Internal 165 °C thermal cutoff prevents motor overheating during occlusion events, meeting IEC 60601-1 safety requirements without external sensors. |
| Automated Test Equipment | Lab Instrument Positioning |
|
Use Scenario: High-speed XY stage in semiconductor probe station requiring rapid direction reversal and current-limited acceleration. IC Role / Device Role / Timing Role: Bidirectional driver using PHASE/ENABLE inputs for real-time commutation; serial port dynamically adjusts off-time (D2–D6) to maintain constant current across speed ranges. Use Value: Programmable blank time (D0/D1) eliminates false current-limit triggers during 10 kHz PWM switching, ensuring stable position tracking. |
Use Scenario: Optical alignment stage in spectrometer requiring ultra-low vibration and repeatable micro-positioning. IC Role / Device Role / Timing Role: Low-noise motor driver operating in active synchronous rectification mode (D11=0, D12=1) to minimize current ripple and EMI during fine adjustment. Use Value: 270 mΩ rDS(on) and 77 °C/W RθJA allow silent, thermally stable operation at 1.5 A continuous - critical for vibration-sensitive optical paths. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar full-bridge PWM motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TB6612FNG | Lower voltage rating (15 V max), 1.2 A continuous, no serial interface - uses discrete logic inputs only. | Targeted at low-voltage robotics; lacks programmable decay timing and blank time control. | Choose for cost-sensitive 5–12 V systems where firmware simplicity outweighs advanced current control. |
| DRV8876N | Higher current (3.6 A), integrated current sense amplifier, SPI interface, but no synchronous rectification control. | Designed for automotive HVAC actuators; includes fault reporting registers absent in A3958SLBTR-T. | Prefer for new designs needing diagnostic visibility and higher current headroom, accepting larger SO-PowerPAD footprint. |
Compared with TB6612FNG and DRV8876N, the A3958SLBTR-T offers unique serial-programmable blank time and mixed-decay timing - critical for minimizing torque ripple in precision motion control - but lacks integrated diagnostics and is marked Not for New Design per Allegro's May 2009 status update.
Availability
A3958SLBTR-T is available at Aetrix Electronics and suitable for industrial actuators, medical pump drives, automated test equipment, and lab instrument positioning requiring stable component supply despite its Not for New Design status.
Supply support for A3958SLBTR-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer of high-performance magnetic sensing and power ICs, founded in 1985 and headquartered in Worcester, Massachusetts.
The A3958 product line was developed for robust, programmable DC motor control in industrial and medical systems where thermal resilience, current accuracy, and flexible decay-mode tuning are essential.
FAQ
What is the maximum continuous output current rating for the A3958SLBTR-T?
The A3958SLBTR-T supports ±2 A continuous output current under specified thermal conditions (TA = 25 °C, RθJA = 77 °C/W, adequate PCB copper). Actual current capability decreases with ambient temperature and reduced heatsinking - for example, derates to ~1.3 A at TA = 70 °C with minimal copper area. The A3958SLBTR-T datasheet specifies absolute maximum junction temperature of 150 °C, enforced by thermal shutdown at 165 °C.
Does the A3958SLBTR-T support external PWM control, and how is it configured?
Yes, the A3958SLBTR-T supports external PWM control via the ENABLE input. When ENABLE is driven with an external PWM signal and serial bit D14 = 0, the bridge operates in chopped mode with decay mode (fast or slow) selected by bit D13. This bypasses the internal PWM timer (D2–D6) and allows MCU-level speed control independent of current-regulation timing. The A3958SLBTR-T maintains current limiting only during ON periods - braking current is unregulated and must be managed externally.
What is the purpose of the RANGE and REF pins on the A3958SLBTR-T?
The REF pin accepts an analog reference voltage (0–2.6 V) that sets the motor current trip point together with the external sense resistor RS. The RANGE pin selects whether VREF is divided by 5 or 10 before comparison: when RANGE ≠ D16 (serial bit), ITRIP = VREF/5RS; when RANGE = D16, ITRIP = VREF/10RS. This dual-range capability allows precise current scaling across wide RS values (e.g., 0.1 Ω for 2 A or 0.25 Ω for 1 A) without changing VREF source.
How does synchronous rectification work in the A3958SLBTR-T, and when is it active?
Synchronous rectification in the A3958SLBTR-T replaces body-diode conduction with active low-rDS(on) DMOS channel conduction during current decay, reducing power loss. It is enabled via serial bit D12 and operates in active (D11 = 0) or passive (D11 = 1) mode. Active mode disables rectification upon zero-current detection; passive mode disables it only if current inversion exceeds the limit. Synchronous rectification is inactive in slow-decay mode and requires D12 = 1 plus fast/mixed decay selection.
Is the A3958SLBTR-T still recommended for new designs?
No - Allegro MicroSystems classified the A3958SLBTR-T as "Not for New Design" effective May 4, 2009, due to probable near-term obsolescence. While Aetrix Electronics maintains inventory for legacy program support, new designs should consider alternatives like DRV8876N (SPI interface, higher current) or TB6612FNG (low-cost, logic-only control). The A3958SLBTR-T remains viable for sustaining production of existing products with validated thermal and timing performance.
A3958SLBTR-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 24-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Motor Type - Stepper:
- -
- Motor Type - AC, DC:
- Brushed DC
- Function:
- Driver - Fully Integrated, Control and Power Stage
- Output Configuration:
- Half Bridge (2)
- Interface:
- Serial
- Technology:
- DMOS
- Step Resolution:
- -
- Applications:
- General Purpose
- Current - Output:
- 2A
- Voltage - Supply:
- 4.5V ~ 5.5V
- Voltage - Load:
- 20V ~ 50V
- Operating Temperature:
- -20°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SOIC
A3958SLBTR-T FAQ
1.How can I place an order for A3958SLBTR-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A3958SLBTR-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A3958SLBTR-T reliable?
The price and inventory of A3958SLBTR-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3958SLBTR-T is usually 5 days.
3.What payment methods are accepted for A3958SLBTR-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3958SLBTR-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A3958SLBTR-T?
A3958SLBTR-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A3958SLBTR-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A3958SLBTR-T?
For technical support, including A3958SLBTR-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3958SLBTR-T requirements.
6.How does Aetrix verify that A3958SLBTR-T is sourced from the original manufacturer or authorized distributors?
All A3958SLBTR-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3958SLBTR-T meets industry standards.
7.What is the process for return or replacement of A3958SLBTR-T?
All A3958SLBTR-T units undergo pre-shipment inspection (PSI). If there is an issue with A3958SLBTR-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A3958SLBTR-T part is unused and in its original packaging.
Return procedure for A3958SLBTR-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
A3958SLBTR-T Tags
-
DRV2603RUNR
Texas Instruments
-
DRV8837CDSGR
Texas Instruments
-
DRV8837DSGR
Texas Instruments
-
DRV8838DSGR
Texas Instruments
-
DRV8839DSSR
Texas Instruments
-
EMC2301-1-ACZL-TR
Microchip Technology
-
DRV8231ADSGR
Texas Instruments
-
EMC2302-2-AIZL-TR
Microchip Technology
-
DRV8800PWPR
Texas Instruments
-
DRV8835DSSR
Texas Instruments
-
EMC2303-1-KP-TR
Microchip Technology
-
DRV8876PWPR
Texas Instruments
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
