My Inquiry
My Account
Allegro MicroSystems A3959SB-T
- Part No.:
- A3959SB-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 24-PowerDIP (0.300", 7.62mm)
- Datasheet:
-
A3959SB-T.pdf
- Description:
- IC MOTOR DRIVER 4.5V-5.5V 24DIP
- Quantity:
- Payment:
- Shipping:
Inventory:1,533
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
A3959SB-T from Allegro MicroSystems is a DMOS full-bridge PWM motor driver IC designed for bidirectional DC motor control with ±3 A output current and 50 V load supply capability. It implements fixed off-time current regulation, synchronous rectification, and selectable slow/fast/mixed decay modes via PFD1/PFD2 inputs. Used in precision speed and direction control of brushed DC motors in industrial actuators and automated equipment.
For engineers reviewing the A3959SB-T datasheet, A3959SB-T pinout, A3959SB-T application, or A3959SB-T equivalent, key selection criteria include thermal performance on 2-layer vs. 4-layer PCBs, external sense resistor (RS) sizing for trip current, ROSC resistor value for PWM frequency tuning, and correct configuration of EXT MODE, PHASE, and ENABLE logic for target decay behavior and braking functionality.
Technical Context
The A3959SB-T integrates dual DMOS H-bridge outputs with internal charge pump (CP1/CP2) for high-side gate drive and VREG regulator for low-side biasing. Its fixed off-time PWM timer uses an internal oscillator (3.25–5.25 MHz) set by ROSC to generate precise current-decay timing.
Current regulation relies on analog comparison of VREF/10 against voltage across external sense resistor RS, triggering source-driver disable at ITRIP = VREF/(10 × RS). Decay mode (slow/mixed/fast) is selected via PFD1/PFD2, while BLANK input configures 6/fOSC or 12/fOSC blanking window to suppress false overcurrent trips during switching transients.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current Rating | ±3.0 A continuous (repetitive); enables driving medium-power DC motors up to ~150 W at 50 V without external heatsinking on 4-layer board. |
| Load Supply Voltage | 9.5–50 V operating range; supports wide-input industrial power rails including 12 V, 24 V, and 48 V systems. |
| rDS(on) (Typ.) | 270 mΩ per channel; reduces conduction loss to <1.2 W per FET at 3 A, critical for thermal management in compact layouts. |
| Fixed Off-Time | 96 oscillator cycles (≈24 µs at 4 MHz); sets minimum current-decay duration and defines maximum achievable PWM frequency. |
| Junction Temp Limit | 165°C thermal shutdown with 15°C hysteresis; protects device during overload or poor heatsinking while allowing brief transient overloads. |
| VREF Input Range | 0–VDD (max 5.5 V); allows direct interface with microcontroller DAC or precision reference without level-shifting. |
| Logic Supply (VDD) | 4.5–5.5 V; compatible with standard 5 V digital logic and eliminates need for separate LDO in 5 V systems. |
Pinout & Package
Package: 28-pin TSSOP (suffix 'LP') with exposed thermal pad (pin 28), 1.2 mm max height. Requires solder connection of pins 7, 8, and 28 to common ground plane under thermal pad for optimal RθJP = 2°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VBB (Pin 23) | Motor power supply input | High-current path (up to ±3 A) requiring low-inductance decoupling (>47 µF electrolytic + 0.1 µF ceramic near pin). |
| OUTA / OUTB (Pins 18, 24) | H-bridge output terminals | Direct connection to motor leads; each drives one side of brushed DC motor in forward/reverse configurations. |
| SENSE (Pin 21) | Current-sense amplifier input | Connects to low-side sense resistor (RS); ground return must be star-connected to device GND pins (7, 8, 28) to avoid IR error. |
| PHASE (Pin 5) | Direction control input | Logic-high = OUTA high / OUTB low (forward); logic-low = OUTA low / OUTB high (reverse); no internal pull-up/down. |
| ENABLE (Pin 10) | PWM enable input | High = active drive; low = current decay (mode depends on EXT MODE); supports external PWM for speed control. |
| EXT MODE (Pin 16) | Decay mode selector | High = slow decay (both sinks on); low = fast decay (cross-conduction); determines braking behavior and EMI profile. |
| PFD1 / PFD2 (Pins 14, 12) | Mixed-decay configuration | Set % of fixed off-time spent in fast decay (0%, 15%, 48%, or 100%); enables fine-tuning of torque ripple and acoustic noise. |
| BLANK (Pin 13) | Comparator blanking control | Configures blanking window (6/fOSC or 12/fOSC) to ignore initial current spike after switch turn-on; prevents false trip. |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous rectification | Enables low-loss current recirculation by turning on appropriate DMOS pair during decay, eliminating need for external Schottky diodes and reducing power dissipation by >40% vs. body-diode conduction. |
| Programmable PWM frequency | Oscillator frequency set by external ROSC resistor (20–100 kΩ), enabling precise tuning of fixed off-time from ≈20 µs to ≈50 µs for optimal motor control loop response. |
| Zero-current detection | Disables all outputs when sensed current reaches zero during decay, preventing reverse current flow and improving efficiency in light-load conditions. |
| Integrated protection suite | Combines thermal shutdown (165°C), UVLO on VDD and charge pump, and crossover-current protection - no external fault-handling circuitry required. |
| Low quiescent current sleep mode | SLEEP input disables regulator and charge pump, reducing IDD to ≤2.0 mA; ideal for battery-powered applications requiring standby power <10 mW. |
Applications
| Industrial Linear Actuators | Automated Valve Control |
|---|---|
|
Use Scenario: Precise position control of 24 V DC linear actuators in packaging machinery, requiring smooth acceleration/deceleration and stall detection. IC Role / Device Role / Timing Role: Full-bridge driver executing bidirectional PWM current control with mixed-decay mode to minimize torque ripple and audible noise during low-speed operation. Use Value: Synchronous rectification and 270 mΩ rDS(on) reduce heat generation by >35% versus discrete MOSFET solutions, enabling smaller enclosures and eliminating forced-air cooling. |
Use Scenario: Fail-safe actuation of HVAC damper valves using 48 V DC motors, where reliable start/stop and holding torque are critical. IC Role / Device Role / Timing Role: Motor driver implementing slow-decay braking via EXT MODE high + ENABLE chopping to dissipate BEMF energy safely during rapid stop commands. Use Value: Integrated thermal shutdown and UVLO eliminate risk of latch-up during brown-out events, ensuring valve remains in last-known safe position during power interruption. |
| Medical Infusion Pumps | Robotic Joint Actuation |
|
Use Scenario: Constant-flow delivery in portable infusion pumps powered by Li-ion batteries, demanding ultra-low sleep current and precise microstep-like current regulation. IC Role / Device Role / Timing Role: Current-regulated H-bridge controlling small brushed DC motor with VREF-adjusted trip threshold (e.g., 0.25 V → ITRIP = 25 mA) for sub-mA resolution flow control. Use Value: 2 µA typical sleep current (SLEEP = low) extends battery life beyond 72 hours per charge; BLANK input prevents false trips from motor commutation spikes. |
Use Scenario: Torque-controlled joint movement in collaborative robots, requiring dynamic reversal, regenerative braking, and real-time current feedback. IC Role / Device Role / Timing Role: Bidirectional motor driver using PHASE/ENABLE sequencing and zero-current detection to enable smooth direction reversal without mechanical jerk. Use Value: Fast decay mode (PFD1+PFD2 high) provides rapid current collapse for responsive joint positioning; RθJP = 2°C/W enables sustained 3 A operation on compact 4-layer PCBs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar full-bridge PWM motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TB6612FNG | Lower 1.2 A continuous rating, 13 V max VBB, no internal charge pump (requires external bootstrap); 2-channel independent control. | Better suited for low-voltage, low-power robotics (e.g., 6–12 V toy motors); lacks thermal robustness for industrial 48 V loads. | Select A3959SB-T when ≥3 A output, 50 V operation, or integrated charge pump is required; TB6612FNG only viable for <2 A, <15 V designs. |
| DRV8876N | Higher 3.6 A rating, 45 V max VBB, integrated current sense amplifier (no external RS needed); no mixed-decay mode (fast/slow only). | Reduces BOM count with internal sensing but sacrifices fine-grained decay tuning; lacks PFD1/PFD2 programmability for acoustic optimization. | Choose A3959SB-T for applications needing mixed-decay control to suppress motor whine or where external RS provides calibration flexibility; DRV8876N preferred for simplified layout with integrated sensing. |
Compared with TB6612FNG and DRV8876N, the A3959SB-T uniquely combines 50 V operation, ±3 A capability, and 4-mode decay control (slow/mixed/fast/zero-current) - making it the only option among the three supporting high-voltage industrial actuators with tunable EMI and acoustic performance.
Availability
A3959SB-T is available at Aetrix Electronics and suitable for industrial motion control, medical infusion systems, and robotic joint actuation requiring stable component supply across extended production lifecycles.
Supply support for A3959SB-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer of high-performance magnetic sensors and power ICs, specializing in motion control, current sensing, and motor driver solutions for automotive and industrial markets.
The A3959SB-T belongs to Allegro's DMOS full-bridge motor driver product line, engineered specifically for robust, thermally efficient brushed DC motor control in space-constrained industrial equipment where reliability under continuous load is mandatory.
FAQ
What is the maximum allowable sense resistor (RS) value for A3959SB-T when VREF = 0.5 V?
The maximum RS is calculated as RS = 0.5 V / ITRIP. With VREF = 0.5 V, ITRIP = VREF / (10 × RS) → RS = 0.5 / ITRIP. For the rated ±3 A output, RS must not exceed 0.167 Ω to maintain accuracy within datasheet limits. Using larger RS values reduces trip current resolution and increases sensitivity to PCB trace resistance errors. The A3959SB-T datasheet specifies RS ≤ 0.167 Ω for full-scale operation.
Does A3959SB-T support true H-bridge braking with current limiting?
No - the A3959SB-T does not limit current during braking because brake current flows through the motor windings and body diodes, bypassing the external sense resistor (RS). Braking is implemented in slow-decay mode (EXT MODE high), which shorts the motor terminals via both sink drivers, but ITRIP regulation is inactive. Users must ensure worst-case BEMF-induced brake current (≈VBEMF / RL) stays below the ±6 A peak rating. The A3959SB-T relies on external design constraints, not internal current limiting, for brake safety.
How is the PWM frequency set on A3959SB-T, and what is the recommended ROSC value?
The A3959SB-T PWM frequency is determined by the ROSC resistor connected between ROSC (Pin 6) and VDD. The oscillator frequency follows fOSC = 204 × 10⁹ / ROSC (Ω). A 51 kΩ resistor yields ≈4.0 MHz, resulting in a typical fixed off-time of 24 µs. Allegro recommends 51 kΩ for general-purpose use; values from 20 kΩ (5.1 MHz) to 100 kΩ (2.0 MHz) are supported. Deviations affect off-time and current-loop bandwidth - lower ROSC increases switching frequency but raises gate-drive losses.
Can A3959SB-T operate without an external sense resistor (RS)?
No - the A3959SB-T requires an external sense resistor (RS) connected between SENSE (Pin 21) and ground to implement current regulation. The internal current-sense amplifier measures voltage across RS to compare against VREF/10. Omitting RS disables overcurrent protection and causes unregulated output current, risking device failure under load. The datasheet mandates RS placement with dedicated ground return to device GND pins (7, 8, 28) to maintain measurement accuracy.
What thermal performance can be expected from A3959SB-T on a 2-layer PCB?
On a 2-layer PCB with 1 in² of 2-oz copper per side, the A3959SB-T (LP package) achieves RθJA = 40°C/W. At 3 A output and 50 V VBB, total power dissipation is ≈2.4 W (I² × rDS(on) × 2), resulting in ΔT = 2.4 W × 40°C/W = 96°C rise above ambient. With TA = 85°C max, junction temperature reaches ≈181°C - exceeding the 150°C limit. Derating to ≤2.2 A or adding thermal vias under the exposed pad is required for reliable 2-layer operation. The A3959SB-T thermal data assumes proper pad connection per datasheet layout guidelines.
A3959SB-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 24-PowerDIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Motor Type - Stepper:
- -
- Motor Type - AC, DC:
- Brushed DC
- Function:
- Driver - Fully Integrated, Control and Power Stage
- Output Configuration:
- Half Bridge (2)
- Interface:
- Parallel
- Technology:
- DMOS
- Step Resolution:
- -
- Applications:
- General Purpose
- Current - Output:
- 3A
- Voltage - Supply:
- 4.5V ~ 5.5V
- Voltage - Load:
- 9.5V ~ 50V
- Operating Temperature:
- -20°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 24-DIP
A3959SB-T FAQ
1.How can I place an order for A3959SB-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A3959SB-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A3959SB-T reliable?
The price and inventory of A3959SB-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3959SB-T is usually 5 days.
3.What payment methods are accepted for A3959SB-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3959SB-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A3959SB-T?
A3959SB-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A3959SB-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A3959SB-T?
For technical support, including A3959SB-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3959SB-T requirements.
6.How does Aetrix verify that A3959SB-T is sourced from the original manufacturer or authorized distributors?
All A3959SB-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3959SB-T meets industry standards.
7.What is the process for return or replacement of A3959SB-T?
All A3959SB-T units undergo pre-shipment inspection (PSI). If there is an issue with A3959SB-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A3959SB-T part is unused and in its original packaging.
Return procedure for A3959SB-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
A3959SB-T Tags
-
DRV2603RUNR
Texas Instruments
-
DRV8837CDSGR
Texas Instruments
-
DRV8837DSGR
Texas Instruments
-
DRV8838DSGR
Texas Instruments
-
DRV8839DSSR
Texas Instruments
-
EMC2301-1-ACZL-TR
Microchip Technology
-
DRV8231ADSGR
Texas Instruments
-
EMC2302-2-AIZL-TR
Microchip Technology
-
DRV8800PWPR
Texas Instruments
-
DRV8835DSSR
Texas Instruments
-
EMC2303-1-KP-TR
Microchip Technology
-
DRV8876PWPR
Texas Instruments
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
