Allegro MicroSystems A3959SLB
- Part No.:
- A3959SLB
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 24-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
A3959SLB.pdf
- Description:
- IC MOTOR DRIVER 4.5V-5.5V 24SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
A3959SLB from Allegro MicroSystems is a DMOS full-bridge PWM motor driver IC designed for bidirectional DC motor control with ±3 A output current and 50 V load supply capability. It implements internal fixed off-time current regulation, synchronous rectification, and selectable slow/fast/mixed decay modes via PFD1/PFD2 inputs. Used in industrial actuators, robotic joints, and precision positioning systems requiring precise current-controlled motion.
For engineers reviewing the A3959SLB datasheet, A3959SLB pinout, A3959SLB application, or A3959SLB equivalent, key selection considerations include thermal performance in SOIC-LB package (RθJA = 35°C/W on 4-layer board), 24-pin SOIC pin compatibility, integrated charge pump and VREG regulation, and external PWM interface via PHASE/ENABLE/EXT MODE logic inputs.
Technical Context
The A3959SLB integrates dual DMOS H-bridge drivers with internal gate drive, charge pump (CP/CP1/CP2), and linear regulator (VREG) to support high-side and low-side switching without external bootstrap components. Its fixed off-time PWM timer operates at 4.25 MHz typical (set by ROSC resistor), delivering 24 µs nominal off-time.
Current regulation uses a 10× reference divider (VREF/10) compared against sense voltage across RS, enabling trip current ITRIP = VREF/(10 × RS). Decay mode selection (PFD1/PFD2) directly controls recirculation path-slow decay enables both sinks, fast decay enables opposite pair, and mixed decay combines both for optimized torque ripple and efficiency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | ±3 A continuous - supports medium-power DC motors up to ~150 W at 50 V with appropriate heatsinking |
| Load Supply Voltage | 9.5–50 V - compatible with 12 V, 24 V, and 48 V industrial power rails |
| rDS(on) | 270 mΩ typical - reduces conduction loss and junction temperature rise during PWM operation |
| Fixed Off-Time | 24 µs typical - sets minimum current decay duration and maximum PWM frequency (~42 kHz) |
| Junction Temp Limit | 165°C with 15°C hysteresis - enables robust thermal shutdown recovery without latch-up |
| VDD Range | 4.5–5.5 V - requires stable 5 V logic supply; UVLO activates below 4.2 V to prevent erratic operation |
| Sense Voltage Max | 0.5 V continuous - defines maximum allowable voltage drop across current-sense resistor RS |
Pinout & Package
Package: 24-pin SOICW (suffix 'LB') with four internally fused pins; lead-free, 100% matte tin leadframes; exposed ground plane not present (unlike LP variant); RθJA = 35°C/W on 4-layer PCB.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1, 6, 7, 18, 19 | GROUND | Power and signal ground return paths; must be connected to common star ground point near device |
| 4 | PHASE | Direction control input: logic low = OUTA high / OUTB low; logic high = OUTA low / OUTB high |
| 9 | ENABLE | Active-high PWM enable: high = active drive; low = current decay per EXT MODE setting |
| 10, 12 | PFD1, PFD2 | Decay mode select: define % of fixed off-time allocated to fast decay (0%, 15%, 48%, or 100%) |
| 11 | BLANK | Blanking duration control: 0 = 6/fOSC, 1 = 12/fOSC - suppresses false overcurrent trips during turn-on transients |
| 13 | REF | Analog reference input: sets current trip threshold via ITRIP = VREF/(10 × RS) |
| 14 | EXT MODE | External PWM mode select: low = fast decay during ENABLE chop; high = slow decay |
| 16, 21 | OUTA, OUTB | H-bridge output terminals - connect directly to motor terminals; each rated for ±3 A continuous |
| 17 | SENSE | Current sense input - connects to low-side sense resistor (RS); referenced to ground |
| 20 | LOAD SUPPLY (VBB) | High-current motor supply input (9.5–50 V); decouple with ≥47 µF electrolytic capacitor |
| 23 | SLEEP | Logic-low entry into ultra-low-power sleep mode (<20 µA IDD); pull up to VDD if unused |
| 24 | VREG | Internal 5 V regulator output - decouple with 0.22 µF ceramic capacitor to ground |
| 8 | LOGIC SUPPLY (VDD) | 5 V logic supply input - monitored for UVLO; must be stable within 4.5–5.5 V range |
| 5 | ROSC | Oscillator timing resistor connection - 51 kΩ sets 4.25 MHz fOSC; open or grounded disables oscillator |
| 1, 2, 3 | CP, CP1, CP2 | Charge pump network - CP to VBB (0.22 µF), CP1–CP2 (0.22 µF); enables high-side gate drive > VBB |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous Rectification | Enables low-loss current recirculation by turning on low-rDS(on) DMOS outputs instead of body diodes - reduces power dissipation by >40% vs. asynchronous decay |
| Mixed-Mode Current Decay | Configurable 15% or 48% fast-decay portion followed by slow decay - minimizes torque ripple while maintaining braking control |
| Integrated Charge Pump & VREG | Eliminates need for external high-side gate drivers or auxiliary regulators - simplifies layout and reduces BOM count |
| Crossover-Current Protection | Prevents shoot-through by enforcing 300–1000 ns dead time between source/sink switching - ensures safe H-bridge commutation |
| Thermal Shutdown with Hysteresis | Shuts down at 165°C junction temp and re-enables only after cooling to ~150°C - prevents thermal cycling damage during overload |
Applications
| Industrial Linear Actuators | Automated Valve Positioning |
|---|---|
|
Use Scenario: Precise bidirectional movement of pneumatic or hydraulic valve stems in process control systems operating at ambient temperatures up to 85°C. IC Role / Device Role / Timing Role: Full-bridge motor driver controlling 24 V DC gearmotor; regulates current via external RS and VREF to maintain position accuracy under variable load. Use Value: Synchronous rectification reduces heat generation in enclosed actuator housings, extending service life and eliminating need for external Schottky diodes. |
Use Scenario: Closed-loop flow control in chemical dosing systems where repeatable stroke length and stall-torque reliability are critical. IC Role / Device Role / Timing Role: PWM current controller interfacing with PLC-generated PHASE/ENABLE signals; uses mixed decay to minimize vibration during endpoint settling. Use Value: Internal 165°C thermal shutdown with 15°C hysteresis allows safe operation during temporary overloads without system-level intervention. |
| Robotic Joint Modules | Lab Automation Stages |
|
Use Scenario: Torque-controlled elbow/wrist joints in collaborative robots requiring smooth motion profiles and fault resilience. IC Role / Device Role / Timing Role: Motor driver executing motion commands from microcontroller; leverages BLANK input to reject EMI-induced false current trips during rapid direction reversals. Use Value: 24-pin SOIC-LB package provides mechanical robustness and thermal stability on 4-layer boards - supports continuous 2.5 W power dissipation. |
Use Scenario: High-repeatability X-Y-Z translation stages in analytical instruments, driven by 12–48 V DC motors with microstepping-like current resolution. IC Role / Device Role / Timing Role: Precision current regulator using VREF/RS scaling to achieve <±5% ITRIP accuracy across temperature - critical for consistent step response. Use Value: Fixed off-time architecture ensures deterministic current decay timing, enabling predictable velocity profiling without software compensation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar full-bridge PWM motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TB6612FNG | Lower 1.2 A continuous rating; no internal charge pump - requires external bootstrap or dual supply; 2-channel independent bridges | Better suited for low-power dual-motor applications (e.g., small robotics), not direct replacement for ±3 A single-motor loads | Select when dual independent H-bridges are needed and peak current ≤1.2 A; verify external gate drive requirements |
| DRV8876N | Higher 3.6 A rating; integrated current sense amplifier; SPI interface for diagnostics; 16-pin HTSSOP package | Targets smart motor modules requiring real-time fault reporting and closed-loop current feedback - adds complexity and cost | Choose when diagnostic visibility (overcurrent, thermal, VM undervoltage) and programmable decay modes justify SPI integration |
Compared with TB6612FNG and DRV8876N, the A3959SLB delivers optimal balance of ±3 A drive capability, self-contained gate drive (no external bootstrap), and SOIC-LB mechanical reliability for industrial motion control - without requiring serial configuration or sacrificing thermal margin.
Availability
A3959SLB is available at Aetrix Electronics and suitable for industrial linear actuators, automated valve positioning, and robotic joint modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for A3959SLB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer of high-performance magnetic sensing and power IC solutions, specializing in motion control, current sensing, and motor driver technologies since 1989.
The A3959SLB belongs to Allegro's DMOS full-bridge motor driver product line, engineered for rugged industrial and automation applications demanding reliable ±3 A current control, integrated gate drive, and comprehensive fault protection.
FAQ
What is the maximum continuous output current supported by the A3959SLB?
The A3959SLB supports ±3 A continuous output current under specified thermal conditions - including use of a 4-layer PCB with 1-in² copper area (RθJA = 35°C/W) and ambient temperature ≤85°C. Peak current up to ±6 A is allowed for pulses <3 µs. Exceeding these limits risks thermal shutdown activation or permanent damage.
Does the A3959SLB require external bootstrap capacitors for high-side drive?
No, the A3959SLB does not require external bootstrap capacitors. It integrates a charge pump circuit (CP/CP1/CP2 pins) that generates a gate-drive voltage above VBB, enabling full enhancement of the high-side DMOS outputs. A 0.22 µF ceramic capacitor between CP1 and CP2, and another between CP and VBB, is required for proper charge pump operation.
How is current regulation implemented in the A3959SLB?
The A3959SLB implements fixed off-time PWM current regulation using an internal comparator that compares VREF/10 against the voltage across the external sense resistor (RS). When the sensed voltage reaches VREF/10, the source driver turns off for a fixed 24 µs off-time. The trip current is calculated as ITRIP = VREF/(10 × RS), allowing precise analog current setting.
Can the A3959SLB operate with a 12 V motor supply and 5 V logic supply simultaneously?
Yes, the A3959SLB is explicitly rated for 9.5–50 V load supply (VBB) and 4.5–5.5 V logic supply (VDD). It supports concurrent operation with 12 V motor rail and 5 V logic rail - a common configuration in industrial controllers. The internal VREG and charge pump ensure correct gate biasing regardless of VBB level within specification.
What thermal protection features does the A3959SLB include?
The A3959SLB includes thermal shutdown with a typical activation threshold of 165°C junction temperature and 15°C hysteresis. It also monitors VREG and charge pump voltages for undervoltage faults, disabling outputs if either falls below safe operating levels. These protections operate independently and do not require external circuitry.
A3959SLB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 24-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Motor Type - Stepper:
- -
- Motor Type - AC, DC:
- Brushed DC
- Function:
- Driver - Fully Integrated, Control and Power Stage
- Output Configuration:
- Half Bridge (2)
- Interface:
- Parallel
- Technology:
- DMOS
- Step Resolution:
- -
- Applications:
- General Purpose
- Current - Output:
- 3A
- Voltage - Supply:
- 4.5V ~ 5.5V
- Voltage - Load:
- 9.5V ~ 50V
- Operating Temperature:
- -20°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SOIC
A3959SLB FAQ
1.How can I place an order for A3959SLB through Aetrix?
Please submit a Request for Quotation (RFQ) for A3959SLB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A3959SLB reliable?
The price and inventory of A3959SLB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3959SLB is usually 5 days.
3.What payment methods are accepted for A3959SLB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3959SLB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A3959SLB?
A3959SLB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A3959SLB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A3959SLB?
For technical support, including A3959SLB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3959SLB requirements.
6.How does Aetrix verify that A3959SLB is sourced from the original manufacturer or authorized distributors?
All A3959SLB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3959SLB meets industry standards.
7.What is the process for return or replacement of A3959SLB?
All A3959SLB units undergo pre-shipment inspection (PSI). If there is an issue with A3959SLB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A3959SLB part is unused and in its original packaging.
Return procedure for A3959SLB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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