Allegro MicroSystems A3968SLB
- Part No.:
- A3968SLB
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 16-PowerSOIC (0.295", 7.50mm Width)
- Datasheet:
-
A3968SLB.pdf
- Description:
- IC MOTOR DRVR 4.75V-5.5V 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
A3968SLB from Allegro MicroSystems is a discontinued dual full-bridge PWM motor driver IC designed for bidirectional control of two DC motors in embedded motion systems. It delivers ±650 mA continuous output current per bridge, supports up to 30 V load supply voltage, and integrates fixed-frequency PWM current regulation with user-selectable blanking via external RC network. It was used in industrial actuators requiring dynamic braking and thermal protection.
For engineers reviewing the A3968SLB datasheet, A3968SLB pinout, A3968SLB application, or A3968SLB equivalent, this page provides verified technical context, confirmed package mapping (16-pin SOIC-W LB), validated pin functions, real-world application constraints, and two documented alternative parts for legacy design continuity.
Technical Context
The A3968SLB implements two independent full-bridge outputs with Satlington® sink drivers-combining low saturation voltage (0.3–1.3 V) and high peak-current capability-and internal fixed-frequency (22.9–27.9 kHz) PWM current control. Each bridge uses a dedicated current-sense comparator with 18 mA typical offset error and user-configurable trip threshold via VREF and external sense resistor RS.
Brake mode is activated by logic-low on both INPUTA/INPUTB per bridge, turning off source drivers and enabling both sink drivers simultaneously. Crossover-current protection enforces ~1.8 µs dead time during direction switching, and thermal shutdown triggers at 165 °C with 15 °C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | ±650 mA continuous per bridge; limited by thermal dissipation and ambient conditions |
| Load Voltage Rating | 30 V max VBB; supports 24 V DC motor rails with margin |
| PWM Frequency Range | 22.9–27.9 kHz with 56 kΩ/680 pF RC network; determines current ripple and switching loss trade-off |
| Sink Saturation Voltage | 0.3 V at +400 mA, 0.7 V at +650 mA (VS = 0.5 V); enables efficient low-voltage drop recirculation |
| Thermal Shutdown Threshold | 165 °C typical junction temperature; disables all outputs until junction cools by ~15 °C |
| Input Logic Compatibility | CMOS/TTL-compatible inputs; VIN(1) ≥ 2.4 V, VIN(0) ≤ 0.8 V at VCC = 4.75–5.5 V |
| Reference Input Range | 0.1–2.0 V at VREF pin; internally divided by 4 to set current-comparator trip point |
Pinout & Package
Package: 16-pin SOIC-W (suffix LB), lead-free with matte tin plating; pins 4 and 13 internally fused to die pad for enhanced thermal conduction (ground potential, no isolation required).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VBB | Motor power supply input | High-side rail for both bridges; requires local 47 µF electrolytic decoupling |
| VCC | Logic supply input | 4.75–5.5 V digital supply; powers internal logic, reference, and gate drivers |
| INPUT1A / INPUT1B INPUT2A / INPUT2B | Bridge direction control inputs | CMOS/TTL logic inputs defining polarity or brake/disable state per bridge (see truth table) |
| OUT1A / OUT1B OUT2A / OUT2B | Full-bridge output terminals | Drive motor windings; each pair connects to one DC motor |
| VREF | Current-limit reference input | 0.1–2.0 V setting determines ITRIP = VREF/(4 × RS) + ISO (ISO ≈ 18 mA) |
| RC | PWM oscillator timing node | Connects external RT–CT network; sets fosc and blanking time tblank = 1900 × CT |
| SENSE | Current-sense comparator input | Accepts voltage across external RS; referenced to ground, not VBB |
| GND | Digital and power ground | Common return for logic, reference, and sense circuitry; separate PCB trace recommended for RS |
Key Features
| Feature | Design Value |
|---|---|
| Satlington® sink drivers | Combines <0.5 V saturation at 400 mA with Darlington-level peak current handling, reducing heat generation during PWM recirculation |
| User-selectable blanking window | Blanking time tblank = 1900 × CT (e.g., 1.3 µs with 680 pF) prevents false PWM latch reset from diode reverse-recovery spikes |
| Integrated brake mode | Simultaneous activation of both sink drivers per bridge shorts motor terminals, enabling dynamic electromagnetic braking without external components |
| Internal ground-clamp and flyback diodes | Eliminates need for external freewheeling diodes; handles inductive kickback during PWM off-time and disable transitions |
| Crossover-current protection | ~1.8 µs dead time between source/sink switching prevents shoot-through during direction reversal, improving reliability |
Applications
| Industrial Valve Actuators | Lab Automation Positioners |
|---|---|
Use Scenario: Precise bidirectional control of solenoid-driven pneumatic valves in programmable logic controller (PLC)-based process systems. IC Role / Device Role / Timing Role: Dual full-bridge driver managing two independent 24 V DC solenoid coils with dynamic braking for rapid valve closure. Use Value: ±650 mA drive capability and integrated current limiting ensure repeatable stroke timing while preventing coil overcurrent during transient load changes. |
Use Scenario: Motorized XYZ stage control in automated microscopy platforms requiring microstep-accurate positioning and fast direction reversal. IC Role / Device Role / Timing Role: Dual H-bridge interface translating step/direction signals into bidirectional winding current with controlled slew rate and brake-assisted settling. Use Value: Fixed-frequency PWM current regulation maintains consistent torque across speed range; blanking window suppresses noise-induced current errors during commutation. |
| Medical Infusion Pumps | Small-Appliance Motor Controls |
Use Scenario: Low-noise peristaltic pump actuation in portable infusion devices where motor stall detection and thermal safety are critical. IC Role / Device Role / Timing Role: Motor driver with integrated thermal shutdown and UVLO protection ensuring fail-safe operation under battery voltage sag or blocked rotor conditions. Use Value: 165 °C thermal cutoff and hysteresis prevent irreversible damage; internal clamp diodes eliminate external component count in space-constrained designs. |
Use Scenario: Bidirectional DC motor control in cordless power tools with variable-speed trigger and electronic braking for rapid stop. IC Role / Device Role / Timing Role: Full-bridge driver implementing PWM speed control and active short-circuit braking using INPUTA/INPUTB logic states. Use Value: Brake mode enables sub-10 ms mechanical stop time; Satlington outputs minimize conduction losses during high-duty-cycle operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual full-bridge motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP6532GQ-Z | Monolithic dual H-bridge with 1.2 A continuous current rating, integrated current sensing, and SPI configuration; no external RC timing network required. | Supports higher current loads and digital diagnostics but requires PCB redesign for SPI interface and layout changes for thermal management. | Preferred for new designs needing >650 mA per channel and programmable fault reporting; not pin-compatible with A3968SLB. |
| TB6612FNG | 2-channel H-bridge with 1.2 A peak current, built-in PWM generator, and standby mode; lacks internal current regulation and blanking control. | Requires external current-sensing and control logic for closed-loop regulation; better suited for open-loop speed control than precision torque regulation. | Valid alternative when external microcontroller handles current loop; lower BOM cost but increases firmware complexity versus A3968SLB's analog PWM core. |
Compared with A3968SLB, MP6532GQ-Z offers higher current capacity and digital configurability at the cost of layout and interface redesign, while TB6612FNG reduces integration level but simplifies sourcing and supports broader voltage operation (2.5–13.5 V logic, 4.5–13.5 V motor).
Availability
A3968SLB is available at Aetrix Electronics and suitable for industrial valve actuators, lab automation positioners, medical infusion pumps, and small-appliance motor controls requiring stable component supply despite end-of-life status.
Supply support for A3968SLB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer of high-performance magnetic sensors and power ICs, specializing in motion control, current sensing, and motor driver solutions for industrial and automotive markets.
The A3968 product line was engineered as a cost-optimized, thermally robust dual full-bridge driver for DC motor control in space-constrained embedded systems requiring analog current regulation and dynamic braking without microcontroller overhead.
FAQ
Is A3968SLB still in production?
No, the A3968SLB is a discontinued product as of September 9, 2022. Allegro MicroSystems no longer manufactures it, and samples are unavailable. Aetrix Electronics maintains limited legacy stock for existing design continuity, but new designs should consider validated alternatives like MP6532GQ-Z or TB6612FNG. The A3968SLB remains supported for repair and maintenance of deployed systems.
What does the "LB" suffix mean in A3968SLB?
The "LB" suffix in A3968SLB denotes the 16-pin SOIC-W (wide-body) package with internal thermal fuse connections on pins 4 and 13 to the die pad. This variant provides enhanced thermal dissipation compared to standard SOIC packages and is RoHS-compliant with 100% matte tin leadframe plating. The "S" indicates commercial temperature grade (–20 °C to +85 °C ambient).
How is current regulation implemented in A3968SLB?
The A3968SLB uses internal fixed-frequency PWM current control: load current through an external sense resistor (RS) is compared to a trip threshold derived from VREF/(4 × RS) + 18 mA offset. When current reaches the threshold, the source driver turns off; current recirculates through the sink driver and internal clamp diodes until the oscillator resets the latch. The RC network sets both frequency and blanking time.
Can A3968SLB drive stepper motors?
The A3968SLB is not designed for bipolar stepper motor control. It lacks phase sequencing logic, microstepping capability, and independent half-bridge enable control required for stepper operation. It is optimized for two independent DC motors or solenoids. For stepper applications, Allegro recommends dedicated drivers such as the A3982 or A4988, which provide native step/direction interfaces and current chopping.
What is the purpose of the Satlington® output structure in A3968SLB?
The Satlington® sink drivers in A3968SLB combine the low saturation voltage (as low as 0.3 V at 400 mA) of a saturated transistor with the high peak-current capability of a Darlington configuration. This reduces power dissipation during PWM recirculation, improves thermal efficiency, and enables reliable operation at ±650 mA continuous without external heatsinking in typical SOIC-W layouts.
A3968SLB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 16-PowerSOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Motor Type - Stepper:
- -
- Motor Type - AC, DC:
- Brushed DC
- Function:
- Driver - Fully Integrated, Control and Power Stage
- Output Configuration:
- Half Bridge (4)
- Interface:
- Parallel
- Technology:
- Bipolar
- Step Resolution:
- -
- Applications:
- General Purpose
- Current - Output:
- 650mA
- Voltage - Supply:
- 4.75V ~ 5.5V
- Voltage - Load:
- 4.75V ~ 30V
- Operating Temperature:
- -20°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
A3968SLB FAQ
1.How can I place an order for A3968SLB through Aetrix?
Please submit a Request for Quotation (RFQ) for A3968SLB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A3968SLB reliable?
The price and inventory of A3968SLB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3968SLB is usually 5 days.
3.What payment methods are accepted for A3968SLB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3968SLB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A3968SLB?
A3968SLB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A3968SLB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A3968SLB?
For technical support, including A3968SLB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3968SLB requirements.
6.How does Aetrix verify that A3968SLB is sourced from the original manufacturer or authorized distributors?
All A3968SLB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3968SLB meets industry standards.
7.What is the process for return or replacement of A3968SLB?
All A3968SLB units undergo pre-shipment inspection (PSI). If there is an issue with A3968SLB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A3968SLB part is unused and in its original packaging.
Return procedure for A3968SLB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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