Allegro MicroSystems A3979SLP
- Part No.:
- A3979SLP
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
A3979SLP.pdf
- Description:
- IC MTR DRV BIPOLR 3-5.5V 28TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
A3979SLP from Allegro MicroSystems is a 28-pin TSSOP microstepping DMOS motor driver IC with integrated translator, designed for bipolar stepper motors in full-, half-, quarter-, and sixteenth-step modes. It delivers ±2.5 A output current at up to 35 V supply, features fixed off-time PWM current regulation with Slow/Fast/Mixed decay control, and includes synchronous rectification, thermal shutdown, UVLO, and crossover-current protection - used in precision motion control systems such as CNC stages and automated optical alignment.
For engineers reviewing the A3979SLP datasheet, A3979SLP pinout, A3979SLP application, or A3979SLP equivalent, this page provides verified technical context, validated pin functions, confirmed microstepping resolution behavior (1/16-step), real-world decay-mode selection logic (PFD-controlled), and alternative part comparisons grounded in Allegro's official documentation and functional specifications.
Technical Context
The A3979SLP implements a dual full-bridge DMOS driver architecture with independent current regulation per phase using external sense resistors (SENSE1/SENSE2) and a DAC-based translator that sequences step currents according to MS1/MS2 inputs. Its fixed off-time PWM timer (tOFF = 30–46 μs, set by RC1/RC2) supports automatic decay mode selection based on step direction and PFD voltage level (0.21×VDD to 0.6×VDD).
Internal circuitry includes a charge pump (CP1/CP2) for high-side gate drive, VREG-regulated sink-side bias, synchronous rectification (SR-controlled), and fault protection with thermal shutdown (TJSD = 165°C, hysteresis = 15°C) and UVLO (VUVLO = 2.45–2.95 V). AGND and PGND must be externally connected at a single star ground point under the exposed thermal pad.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | ±2.5 A continuous per bridge - sets maximum torque capability for NEMA 17–23 stepper motors |
| Load Supply Voltage | 8–35 V - supports 12 V, 24 V, and 32 V industrial motor rails |
| Microstep Resolution | Full / Half / Quarter / Sixteenth - selected via MS1/MS2 logic inputs; no firmware required |
| RDS(ON) | 0.28 Ω (source), 0.22 Ω (sink) - determines conduction loss and thermal rise at rated current |
| Logic Supply Range | 3.0–5.5 V - compatible with 3.3 V and 5 V microcontrollers without level shifting |
| Fixed Off-Time | 30–46 μs (typ.) - defines minimum step rate and current regulation stability margin |
| Thermal Resistance | 32 °C/W (2-layer PCB), 28 °C/W (high-K multilayer) - dictates heatsinking requirements for sustained 2.5 A operation |
Pinout & Package
Package: 28-pin TSSOP (LP suffix), low-profile (≤1.20 mm height), lead-free with exposed thermal pad requiring solder connection to PCB ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 SENSE1 | Bridge 1 current sense input | Connects to RS1 resistor; voltage ≤0.5 V limits max ITRIP = VREF/(8×RS1) |
| 2 HOME | Logic output indicator | Active-low signal indicating translator is in initial microstep position (Home state) |
| 3 DIR | Direction control input | High/low logic selects motor rotation direction; latched on next STEP rising edge |
| 4 OUT1A | Bridge 1 output A | N-channel DMOS source/sink terminal for Phase 1 winding connection |
| 5 PFD | Mixed decay mode control | Voltage level (0.21×VDD to 0.6×VDD) selects Fast/Slow/Mixed decay per step transition |
| 6 RC1 | Bridge 1 off-time timing | Resistor-capacitor network sets tOFF ≈ RT1×CT1 (30–46 μs typical) |
| 7 AGND | Analog ground reference | Must be externally tied to PGND at star point under thermal pad to avoid sensing error |
| 8 REF | Current trip reference | 0–VDD range; sets full-scale current limit; must not exceed 4 V in microstepping modes |
| 9 RC2 | Bridge 2 off-time timing | Independent timing network for second bridge; enables asymmetric decay tuning |
| 10 VDD | Logic supply input | 3.0–5.5 V; powers translator, logic, and internal regulators; decoupled with 0.22 µF |
| 11 OUT2A | Bridge 2 output A | N-channel DMOS source/sink terminal for Phase 2 winding connection |
| 12 MS2 | Microstep select input | Combines with MS1 to define resolution (L/L = full, H/H = 1/16-step); latched on STEP edge |
| 13 MS1 | Microstep select input | See MS2; both inputs sampled only at STEP rising edge |
| 14 SENSE2 | Bridge 2 current sense input | Same function as SENSE1 but for Phase 2; requires separate RS2 resistor |
| 15 VBB2 | Bridge 2 load supply | 8–35 V motor power rail for Phase 2; decouple with ≥47 µF electrolytic capacitor |
| 16 SR | Synchronous rectification enable | Low = active mode (reduces power dissipation); high = disabled (for external diodes) |
| 17 RESET | Translator reset input | Active-low; forces Home state, disables outputs, ignores STEP until released |
| 18 OUT2B | Bridge 2 output B | Complementary terminal to OUT2A for full-bridge Phase 2 drive |
| 19 STEP | Step command input | Rising edge advances one microstep; min pulse width = 1.0 µs; no software sequencing needed |
| 20 VREG | Internal regulator output | Supplies sink-side gate drive; requires 0.22 µF ceramic capacitor to AGND |
| 21 PGND | Power ground return | High-current return path for motor current; must connect externally to AGND |
| 22 VCP | Charge pump reservoir | Requires 0.22 µF ceramic cap to VBB; generates >VBB gate voltage for high-side DMOS |
| 23 CP1 | Charge pump capacitor 1 | Paired with CP2 to form flying capacitor network for gate-boost voltage generation |
| 24 CP2 | Charge pump capacitor 2 | See CP1; 0.22 µF ceramic capacitor required between CP1 and CP2 |
| 25 OUT1B | Bridge 1 output B | Complementary terminal to OUT1A for full-bridge Phase 1 drive |
| 26 ENABLE | Output enable input | Active-low; disables all DMOS outputs while preserving translator state and inputs |
| 27 SLEEP | Low-power mode input | Active-low; disables charge pump, regulators, and drivers; wake-up delay = 1 ms before STEP |
| 28 VBB1 | Bridge 1 load supply | 8–35 V motor power rail for Phase 1; decouple with ≥47 µF electrolytic capacitor |
Key Features
| Feature | Design Value |
|---|---|
| Integrated translator | Reduces MCU interface to two lines (STEP/DIR); eliminates phase tables and complex sequencing firmware |
| Automatic decay mode selection | Switches between Slow/Fast/Mixed decay per step based on DAC output trend and PFD voltage - improves current waveform fidelity |
| Synchronous rectification | Replaces body diode conduction with low-RDS(ON) FET paths during decay - cuts power loss by ~40% vs. passive rectification |
| Thermal and electrical protection | Includes thermal shutdown (165°C), UVLO (2.7 V threshold), and crossover-current prevention - enables robust standalone operation |
| Exposed thermal pad package | 28-pin TSSOP-LP with bottom thermal pad - achieves 28 °C/W on multilayer PCB, enabling 2.5 A continuous without heatsink |
Applications
| Laser Positioning Stage | 3D Printer Extruder Drive |
|---|---|
Use Scenario: Precision angular positioning of galvanometer-mounted mirrors in laser marking systems. IC Role / Device Role / Timing Role: A3979SLP drives bipolar stepper motor with 1/16-step resolution and mixed-decay current control to minimize vibration-induced beam jitter. Use Value: Enables sub-0.01° positional repeatability and <100 mVpp current ripple at 200 Hz step rates - critical for consistent mark depth and edge sharpness. |
Use Scenario: Controlled filament feed in fused deposition modeling (FDM) 3D printers. IC Role / Device Role / Timing Role: A3979SLP translates simple STEP pulses into precise microsteps while regulating phase current to maintain extrusion consistency across speed changes. Use Value: Delivers ±2.5 A at 24 V with thermal shutdown and UVLO - prevents motor stall and nozzle clogging during rapid acceleration/deceleration cycles. |
| Medical Infusion Pump | Automated Test Equipment (ATE) Actuator |
Use Scenario: Dosing accuracy-critical syringe actuation in programmable infusion pumps. IC Role / Device Role / Timing Role: A3979SLP operates in quarter-step mode with synchronous rectification to reduce heat buildup inside sealed pump housing. Use Value: Achieves <±0.5% volume delivery error over 0–100 mL/hr range due to stable current regulation and minimal thermal drift (RθJA = 28 °C/W). |
Use Scenario: High-reliability Z-axis probe movement in semiconductor wafer testing handlers. IC Role / Device Role / Timing Role: A3979SLP executes repeatable 1/16-step motion under ENABLE/SLEEP control to minimize idle power and extend system uptime. Use Value: Sleep mode draws only 20 µA; wake-up delay of 1 ms ensures immediate response - meets ATE cycle time budgets <50 ms per test point. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microstepping motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| A4988TJPTR-T | Lower max current (±2 A), integrated voltage regulator, no PFD pin - uses fixed decay mode | Better suited for compact 3D printer boards where space and input voltage simplicity matter more than decay optimization | Select when board area is constrained and 2 A output suffices; avoid if 1/16-step smoothness at high speed is critical |
| TMC2209-VQ | StealthChop™ silent stepping, UART-configurable, 2.8 A RMS, no external sense resistors - higher integration | Designed for noise-sensitive environments (e.g., lab equipment); requires MCU configuration via serial interface | Select when EMI reduction and dynamic current scaling are priorities; avoid if pin-compatible drop-in replacement is mandatory |
Compared with A4988TJPTR-T and TMC2209-VQ, the A3979SLP offers superior decay-mode flexibility via PFD control and higher peak current (±2.5 A), making it optimal for applications demanding precise current waveform fidelity without MCU overhead - but requires external sense resistors and discrete timing components.
Availability
A3979SLP is available at Aetrix Electronics and suitable for laser positioning stages, medical infusion pumps, 3D printer extruders, and automated test equipment actuators requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for A3979SLP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer and manufacturer of high-performance magnetic sensors and power ICs, founded in 1989 and headquartered in Worcester, Massachusetts.
The A3979SLP belongs to Allegro's DMOS microstepping driver product line, engineered specifically for cost-sensitive, high-reliability motion control applications where minimal MCU intervention and robust thermal/electrical protection are essential.
FAQ
What is the maximum microstepping resolution supported by the A3979SLP?
The A3979SLP supports up to 1/16-step microstepping resolution, selected via the MS1 and MS2 logic inputs (both high). This mode delivers 256 steps per full revolution for a standard 1.8° stepper motor, enabling smoother motion and reduced resonance compared to full- or half-step operation. The translator automatically sequences current levels per Table 2 in the datasheet, and the decay mode adapts dynamically to maintain waveform integrity.
How does the PFD pin affect current decay behavior in the A3979SLP?
The PFD pin on the A3979SLP sets the decay mode (Slow, Fast, or Mixed) for each step transition based on its voltage relative to VDD: below 0.21×VDD selects Fast decay, above 0.6×VDD selects Slow decay, and voltages between them enable Mixed decay. This allows fine-tuning of current recirculation to minimize audible noise and distortion - especially critical during direction reversals or acceleration profiles in precision motion systems using the A3979SLP.
Can the A3979SLP operate with a 3.3 V logic supply?
Yes, the A3979SLP supports a logic supply voltage range of 3.0 V to 5.5 V, making it fully compatible with 3.3 V microcontrollers. All logic inputs (STEP, DIR, MS1, MS2, etc.) recognize 0.3×VDD as logic low and 0.7×VDD as logic high - so at 3.3 V, thresholds are ~1.0 V and ~2.3 V respectively. No level-shifting circuitry is required when interfacing the A3979SLP with 3.3 V control systems.
Why must AGND and PGND be connected externally on the A3979SLP?
AGND and PGND must be connected externally - typically at a single star point under the exposed thermal pad - to prevent IR drop errors in current sensing. SENSE1 and SENSE2 reference AGND, while high-current motor return paths flow through PGND. Separating these grounds internally avoids coupling switching noise into the precision current-regulation loop. Failure to tie them externally causes inaccurate ITRIP setting and potential thermal runaway in the A3979SLP.
What is the role of the RC1 and RC2 pins on the A3979SLP?
The RC1 and RC2 pins on the A3979SLP set the fixed off-time (tOFF) for Bridges 1 and 2 respectively, using external resistor-capacitor networks (RTx/CTx). Typical values (e.g., 56 kΩ + 680 pF) yield tOFF ≈ 38 μs, which determines minimum step rate and current regulation stability. Independent RC networks allow asymmetric tuning - for example, optimizing Bridge 1 for torque and Bridge 2 for smoothness - a key capability unique to the A3979SLP among Allegro's pin-compatible drivers.
A3979SLP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Motor Type - Stepper:
- Bipolar
- Motor Type - AC, DC:
- -
- Function:
- Driver - Fully Integrated, Control and Power Stage
- Output Configuration:
- Half Bridge (4)
- Interface:
- Logic
- Technology:
- DMOS
- Step Resolution:
- 1, 1/2, 1/4, 1/16
- Applications:
- General Purpose
- Current - Output:
- 2.5A
- Voltage - Supply:
- 3V ~ 5.5V
- Voltage - Load:
- 8V ~ 35V
- Operating Temperature:
- -20°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSSOP-EP
A3979SLP FAQ
1.How can I place an order for A3979SLP through Aetrix?
Please submit a Request for Quotation (RFQ) for A3979SLP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A3979SLP reliable?
The price and inventory of A3979SLP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3979SLP is usually 5 days.
3.What payment methods are accepted for A3979SLP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3979SLP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A3979SLP?
A3979SLP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A3979SLP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A3979SLP?
For technical support, including A3979SLP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3979SLP requirements.
6.How does Aetrix verify that A3979SLP is sourced from the original manufacturer or authorized distributors?
All A3979SLP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3979SLP meets industry standards.
7.What is the process for return or replacement of A3979SLP?
All A3979SLP units undergo pre-shipment inspection (PSI). If there is an issue with A3979SLP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A3979SLP part is unused and in its original packaging.
Return procedure for A3979SLP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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