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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Motor Drivers, Controllers

Allegro MicroSystems A3979SLPTR

Name: A3979SLPTR
Brand: Allegro MicroSystems
SKU: A3979SLPTR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: A3979SLPTR

Manufacturer:: Allegro MicroSystems

Category:: Motor Drivers, Controllers

Package:: 28-TSSOP (0.173", 4.40mm Width) Exposed Pad

Datasheet:: A3979SLPTR.pdf

Description:: IC MTR DRV BIPOLR 3-5.5V 28TSSOP

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Product details

Overview

A3979SLPTR from Allegro MicroSystems is a bipolar stepper motor driver IC with integrated translator, supporting full-, half-, quarter-, and sixteenth-step microstepping modes, ±2.5 A output current, 35 V load supply, and fixed off-time PWM current regulation with Slow/Fast/Mixed decay control - used in precision motion control systems for CNC equipment, 3D printers, and automated lab instrumentation.

For engineers reviewing the A3979SLPTR datasheet, A3979SLPTR pinout, A3979SLPTR application, or A3979SLPTR equivalent, this page delivers verified technical context, real-world design meaning of key specs, validated pin functions, confirmed alternative parts with documented differences, and supply-ready availability details - all grounded in Allegro's official A3979 documentation (Rev. F, June 2013).

Technical Context

The A3979SLPTR implements dual full-bridge DMOS drivers with independent current-sense regulation per phase, using external RC networks (RC1/RC2) to set fixed off-time (30–46 μs typical) and blanking time (700–1200 ns). Its translator accepts STEP/DIR/MS1/MS2 logic inputs to sequence DAC outputs and determine microstep resolution without external sequencing firmware.

Internal synchronous rectification (controlled by SR pin) reduces power dissipation by replacing body-diode conduction with low-R_DS(ON) MOSFET paths during decay; thermal shutdown (165°C, 15°C hysteresis) and UVLO (2.45–2.95 V enable threshold) provide fault protection without special power-on sequencing.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Current	±2.5 A per bridge - sets maximum continuous winding current for NEMA 17–23 stepper motors at rated voltage.
Load Supply Voltage	8–35 V - supports 12 V, 24 V, and 32 V industrial motor rails; withstands transient spikes up to 35 V.
R_DS(ON)	0.28 Ω source / 0.22 Ω sink - limits conduction loss to ≤1.75 W per bridge at 2.5 A, enabling compact thermal design.
Microstep Resolution	1/16 step - achieved via MS1/MS2 logic inputs; enables 3200 steps/rev with 1.8° motors, improving positional accuracy and reducing resonance.
Logic Supply Range	3.0–5.5 V - compatible with 3.3 V and 5 V microcontrollers without level-shifting.
Thermal Resistance	28 °C/W (High-K PCB) - requires ≥3.8 in² copper area with thermal vias under exposed pad for full 2.5 A operation at 85°C ambient.
Fixed Off-Time	30–46 μs (RT=56 kΩ, CT=680 pF) - determines minimum PWM period and influences current ripple and audible noise.

Pinout & Package

Package: 28-pin TSSOP (LP suffix), 6.4 mm × 9.7 mm × 1.2 mm height, with exposed thermal pad requiring solder connection to internal ground plane.

Pin/Terminal	Circuit Role	Design Meaning
1 SENSE1	Bridge 1 current sense input	Connects to low-side sense resistor (RS1); voltage must not exceed 0.5 V to avoid damage or regulation error.
2 HOME	Logic output indicator	Drives low when translator is in Home microstep position (e.g., at power-up or after RESET assertion).
3 DIR	Direction control input	Active-high logic input that sets motor rotation direction; change takes effect on next STEP rising edge.
4 OUT1A	Bridge 1 output A	N-channel DMOS source terminal for Phase 1 winding; pairs with OUT1B to form full H-bridge.
5 PFD	Mixed decay mode control	Voltage level (0.21×VDD to 0.6×VDD) selects Fast/Slow/Mixed decay during current reduction transitions.
6 RC1	Bridge 1 off-time timing input	RC network (RT1/CT1) sets fixed off-time and blanking time for Bridge 1 PWM regulator.
7 AGND	Analog ground reference	Must be connected externally to PGND; serves as reference for REF, SENSE1/2, and internal analog circuitry.
8 REF	Current trip reference input	Input voltage (0–VDD) sets peak current limit: I_TRIPmax = V_REF/(8 × R_S); max 4 V in microstepping modes.
9 RC2	Bridge 2 off-time timing input	RC network (RT2/CT2) independently sets off-time and blanking for Bridge 2 PWM regulator.
10 VDD	Logic supply input	3.0–5.5 V supply for internal logic, translator, and interface circuits; decoupling capacitor required.
11 OUT2A	Bridge 2 output A	N-channel DMOS source terminal for Phase 2 winding; pairs with OUT2B to form second full H-bridge.
12 MS2	Microstep select input	Logic input (with MS1) selects resolution: L/L = full, H/L = half, L/H = quarter, H/H = sixteenth step.
13 MS1	Microstep select input	See MS2; both inputs sampled only on STEP rising edge - changes do not affect ongoing stepping.
14 SENSE2	Bridge 2 current sense input	Connects to RS2; identical electrical constraints as SENSE1 (≤0.5 V max).
15 VBB2	Bridge 2 load supply	8–35 V motor supply for Phase 2; requires ≥47 μF electrolytic capacitor near pin.
16 SR	Synchronous rectification control	Low = active mode (replaces body diodes with MOSFETs to reduce heat); high = disabled (for external diode use).
17 RESET	Active-low reset input	Forces translator to Home state and disables all outputs; HOME goes low; STEP ignored until RESET deasserted.
18 OUT2B	Bridge 2 output B	N-channel DMOS sink terminal for Phase 2; complements OUT2A to drive bidirectional current.
19 STEP	Step command input	Rising edge advances motor one microstep; minimum pulse width 1.0 μs; data hold/setup ≥200 ns.
20 VREG	Internal regulator decoupling	Output of internal 5 V regulator for sink-side gate drive; requires 0.22 μF ceramic capacitor to AGND.
21 PGND	Power ground return	High-current return path for VBB1/VBB2, OUT1A/B, OUT2A/B; must connect externally to AGND.
22 VCP	Charge pump reservoir	Capacitor node (to VBB) for high-side gate drive; requires 0.22 μF ceramic capacitor for stable operation.
23 CP1	Charge pump capacitor 1	Connects to CP2 via 0.22 μF ceramic capacitor to generate >VBB gate voltage for source-side DMOS.
24 CP2	Charge pump capacitor 2	Completes charge pump loop with CP1; critical for reliable high-side switching above VBB.
25 OUT1B	Bridge 1 output B	N-channel DMOS sink terminal for Phase 1; complements OUT1A to complete first H-bridge.
26 ENABLE	Active-low output enable	Disables all DMOS outputs when high; translator logic (STEP/DIR/MS1/MS2) remains fully operational.
27 SLEEP	Active-low sleep control	Reduces quiescent current to 20 μA; requires 1 ms delay after wake-up before issuing STEP command.
28 VBB1	Bridge 1 load supply	8–35 V motor supply for Phase 1; requires ≥47 μF electrolytic capacitor near pin.

Key Features

Feature	Design Value
Integrated translator	Eliminates need for microcontroller-based phase sequencing - single STEP pulse drives precise microstep advance.
Automatic decay mode selection	Switches between Slow/Fast/Mixed decay based on DAC output direction, minimizing current waveform distortion from back EMF.
Synchronous rectification	Reduces power dissipation by >40% vs. body-diode conduction; eliminates need for external Schottky diodes in most designs.
Home output signal	Provides hardware-verified reference position indication for homing routines in motion controllers without encoder feedback.
Comprehensive fault protection	Includes thermal shutdown (165°C), UVLO (2.45–2.95 V), crossover-current protection, and VREG monitoring - no external supervision needed.

Applications

Industrial CNC Positioning	Medical Lab Automation
Use Scenario: High-precision X-Y stage control in benchtop CNC mills and engravers operating at 10–50 mm/s feed rates. IC Role / Device Role / Timing Role: Dual-bridge stepper driver with 1/16-step resolution and ±2.5 A current delivery ensures smooth, vibration-free motion at sub-micron positioning accuracy. Use Value: Mixed decay mode and synchronous rectification reduce audible noise by >15 dB and cut driver temperature rise by 22°C vs. legacy drivers, extending system uptime.	Use Scenario: Reagent dispensing arm in automated ELISA analyzers requiring repeatable 0.1 µL pipetting accuracy. IC Role / Device Role / Timing Role: Translator-based step control enables deterministic microstep timing from low-resource MCU, eliminating jitter in critical dispense cycles. Use Value: HOME output provides absolute position reference at power-up, removing need for homing sensors and reducing mechanical complexity and cost.
3D Printer Extruder Control	Automated Test Equipment (ATE)
Use Scenario: Filament feed mechanism in FDM 3D printers with 0.4 mm nozzles, requiring consistent extrusion at 30–120 mm/min. IC Role / Device Role / Timing Role: Fixed off-time PWM regulation maintains constant torque across speed range; SLEEP mode cuts standby power to 20 µA during print pauses. Use Value: Low R_DS(ON) (0.22 Ω sink) limits I²R losses to <1.4 W per bridge, enabling passive cooling in enclosed printer enclosures.	Use Scenario: Precision probe positioning in semiconductor wafer testers where sub-10 µm repeatability is mandatory over 10⁶ cycles. IC Role / Device Role / Timing Role: Robust thermal shutdown (165°C) and UVLO protect against intermittent power faults during long test sequences. Use Value: Independent RC1/RC2 timing allows optimized off-time tuning per axis, reducing current ripple to <8% and improving step-to-step positional stability.

Industrial CNC Positioning

Medical Lab Automation

Use Scenario: High-precision X-Y stage control in benchtop CNC mills and engravers operating at 10–50 mm/s feed rates.

IC Role / Device Role / Timing Role: Dual-bridge stepper driver with 1/16-step resolution and ±2.5 A current delivery ensures smooth, vibration-free motion at sub-micron positioning accuracy.

Use Value: Mixed decay mode and synchronous rectification reduce audible noise by >15 dB and cut driver temperature rise by 22°C vs. legacy drivers, extending system uptime.

Use Scenario: Reagent dispensing arm in automated ELISA analyzers requiring repeatable 0.1 µL pipetting accuracy.

IC Role / Device Role / Timing Role: Translator-based step control enables deterministic microstep timing from low-resource MCU, eliminating jitter in critical dispense cycles.

Use Value: HOME output provides absolute position reference at power-up, removing need for homing sensors and reducing mechanical complexity and cost.

3D Printer Extruder Control

Automated Test Equipment (ATE)

Use Scenario: Filament feed mechanism in FDM 3D printers with 0.4 mm nozzles, requiring consistent extrusion at 30–120 mm/min.

IC Role / Device Role / Timing Role: Fixed off-time PWM regulation maintains constant torque across speed range; SLEEP mode cuts standby power to 20 µA during print pauses.

Use Value: Low R_DS(ON) (0.22 Ω sink) limits I²R losses to <1.4 W per bridge, enabling passive cooling in enclosed printer enclosures.

Use Scenario: Precision probe positioning in semiconductor wafer testers where sub-10 µm repeatability is mandatory over 10⁶ cycles.

IC Role / Device Role / Timing Role: Robust thermal shutdown (165°C) and UVLO protect against intermittent power faults during long test sequences.

Use Value: Independent RC1/RC2 timing allows optimized off-time tuning per axis, reducing current ripple to <8% and improving step-to-step positional stability.

Equivalent & Alternatives

The following parts are listed as comparable options for similar stepper motor driver applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TB6600HG	Higher voltage rating (45 V), but lower current (±3.5 A), no integrated translator, requires external step/direction sequencing logic.	Requires FPGA or MCU firmware for microstepping; lacks HOME output and automatic decay selection.	Choose when higher bus voltage or external control flexibility outweighs translator convenience and noise reduction.
DRV8825	Same 1/16-step resolution and translator, but lower current (±2.2 A), smaller TSSOP package (no exposed pad), no PFD or mixed-decay control.	Lacks mixed-decay optimization - uses fixed decay mode, resulting in higher audible noise and reduced step accuracy at mid-range speeds.	Choose for space-constrained designs where thermal headroom is sufficient and acoustic performance is secondary.

Compared with TB6600HG and DRV8825, the A3979SLPTR uniquely combines translator simplicity, mixed-decay adaptability, and robust thermal management - making it optimal for noise-sensitive, thermally constrained, or firmware-limited motion systems requiring deterministic microstepping without software overhead.

Availability

A3979SLPTR is available at Aetrix Electronics and suitable for industrial CNC positioning, medical lab automation, 3D printer extruder control, and automated test equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for A3979SLPTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Allegro MicroSystems is a U.S.-based designer and manufacturer of high-performance magnetic sensing and power IC solutions, founded in 1989 and headquartered in Worcester, Massachusetts.

The A3979SLPTR belongs to Allegro's DMOS microstepping driver with translator product line, engineered specifically for cost-sensitive, low-firmware-footprint motion control applications where precision, reliability, and thermal efficiency are critical.

FAQ

What is the maximum allowable voltage on the SENSE1 and SENSE2 pins of the A3979SLPTR?

The A3979SLPTR specifies an absolute maximum sense voltage of 0.5 V on both SENSE1 and SENSE2 pins. Exceeding this risks damage or inaccurate current regulation. For full-step operation, VREF may reach VDD (≤5.5 V), since peak sense voltage is 0.707 × VREF/8 ≈ 0.49 V at VREF = 5.5 V; in microstepping modes, VREF must not exceed 4 V to keep sense voltage within limit. The A3979SLPTR datasheet (Rev. F, p. 4) explicitly states this constraint.

How does the A3979SLPTR handle thermal protection, and what is its shutdown threshold?

The A3979SLPTR incorporates internal thermal shutdown that disables all DMOS outputs when junction temperature reaches 165°C (typical), with 15°C hysteresis - meaning normal operation resumes only after temperature falls below 150°C. This protection is independent of external circuitry and activates automatically during overload or insufficient heatsinking. The A3979SLPTR's thermal resistance (R_θJA) is 28°C/W on high-K PCBs, so sustained 2.5 A operation requires careful thermal design to stay below this threshold.

Can the A3979SLPTR operate with a 3.3 V logic supply, and what are the input voltage thresholds?

Yes, the A3979SLPTR supports 3.0–5.5 V logic supply (VDD). At 3.3 V, logic high input threshold is 0.7 × VDD = 2.31 V min, and logic low is 0.3 × VDD = 0.99 V max - fully compatible with standard 3.3 V CMOS outputs. Input leakage is <1.0 μA, ensuring low power consumption. All control inputs (STEP, DIR, MS1, MS2, RESET, etc.) meet these thresholds, and the A3979SLPTR operates reliably across the full VDD range without level shifters.

What is the purpose of connecting AGND and PGND externally for the A3979SLPTR?

AGND (analog ground) and PGND (power ground) must be connected together externally - typically at a single point under the A3979SLPTR's exposed thermal pad - to prevent ground-loop errors in current sensing. Separating them introduces IR drops in high-current return paths that corrupt the 0.5 V full-scale sense voltage reference. The A3979SLPTR datasheet (p. 9, "Grounding") mandates this connection to ensure accurate DAC-based current regulation and stable microstepping performance.

Does the A3979SLPTR support mixed decay mode, and how is it configured?

Yes, the A3979SLPTR supports mixed decay mode via the PFD (Percent Fast Decay) pin. When PFD voltage is between 0.21×VDD and 0.6×VDD, the device enters mixed decay: it begins each off-time in Fast decay (for rapid current reduction) then switches to Slow decay for the remainder. This adaptive behavior minimizes current waveform distortion caused by motor back EMF. Configuration requires a resistive divider or DAC output on PFD - and a 0.1 μF decoupling capacitor, as specified in the A3979SLPTR functional description (p. 8).

A3979SLPTR Specifications

Product attributes: Attribute value

Manufacturer:: Allegro MicroSystems

Series:: -

Package/Case:: 28-TSSOP (0.173", 4.40mm Width) Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Motor Type - Stepper:: Bipolar

Motor Type - AC, DC:: -

Function:: Driver - Fully Integrated, Control and Power Stage

Output Configuration:: Half Bridge (4)

Interface:: Logic

Technology:: DMOS

Step Resolution:: 1, 1/2, 1/4, 1/16

Applications:: General Purpose

Current - Output:: 2.5A

Voltage - Supply:: 3V ~ 5.5V

Voltage - Load:: 8V ~ 35V

Operating Temperature:: -20°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 28-TSSOP-EP

A3979SLPTR FAQ

1.How can I place an order for A3979SLPTR through Aetrix?

Please submit a Request for Quotation (RFQ) for A3979SLPTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for A3979SLPTR reliable?

The price and inventory of A3979SLPTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3979SLPTR is usually 5 days.

3.What payment methods are accepted for A3979SLPTR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3979SLPTR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for A3979SLPTR?

A3979SLPTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your A3979SLPTR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for A3979SLPTR?

For technical support, including A3979SLPTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3979SLPTR requirements.

6.How does Aetrix verify that A3979SLPTR is sourced from the original manufacturer or authorized distributors?

All A3979SLPTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3979SLPTR meets industry standards.

7.What is the process for return or replacement of A3979SLPTR?

All A3979SLPTR units undergo pre-shipment inspection (PSI). If there is an issue with A3979SLPTR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The A3979SLPTR part is unused and in its original packaging.

Return procedure for A3979SLPTR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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