Allegro MicroSystems A3995SEVTR-T
- Part No.:
- A3995SEVTR-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 36-VFQFN Exposed Pad
- Datasheet:
-
A3995SEVTR-T.pdf
- Description:
- IC MOTOR DRIVER 3V-5.5V 36QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,636
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
A3995SEVTR-T from Allegro MicroSystems is a discontinued DMOS dual full-bridge PWM motor driver IC designed to control two bidirectional DC motors with up to 2.4 A continuous output current per bridge, 36 V load supply rating, and internal synchronous rectification - used in industrial motion control systems requiring precise current regulation and thermal robustness.
For engineers reviewing the A3995SEVTR-T datasheet, A3995SEVTR-T pinout, A3995SEVTR-T application, or A3995SEVTR-T equivalent, key selection considerations include its fixed off-time (30 µs) PWM current regulation, dual independent decay mode control (fast/slow via MODE inputs), thermal shutdown (165 °C typical), UVLO thresholds (7.6 V on VBB), and 36-pin QFN EV package with exposed thermal pad.
Technical Context
The A3995SEVTR-T integrates two independent N-channel DMOS full bridges with fixed off-time PWM current regulators, each configured by external sense resistors (RS1/RS2) and VREF1/VREF2 inputs to set peak current via ITRIP = VREF / (3 × RS). It uses internal charge pump (CP1/CP2/VCP) to drive high-side gates above VBB.
Control logic supports PHASE/ENABLE/MODE-based commutation with synchronous rectification active in all decay modes; blanking time (~3.2 µs) prevents false overcurrent trips during switching transients, and crossover-current protection safeguards against shoot-through during bridge transitions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 2.4 A continuous per bridge - sets maximum motor torque capability under sustained load at rated ambient temperature with adequate heatsinking. |
| Load Supply Voltage | 8–36 V operating range - supports 12 V and 24 V industrial DC bus systems while tolerating transient spikes up to 38 V. |
| PWM Off-Time | Fixed 30 µs - determines minimum current regulation period and influences achievable PWM frequency and ripple control. |
| Thermal Shutdown | 165 °C typical junction temperature - disables outputs until junction cools by ≥15 °C hysteresis, protecting against thermal runaway. |
| VBB UVLO Threshold | 7.6 V (±0.3 V) rising - prevents operation below safe gate-drive voltage, ensuring reliable MOSFET turn-on and avoiding erratic behavior. |
| Synchronous Rectification | Always active - replaces body-diode conduction with low-RDS(on) MOSFET paths during decay, reducing power loss by ~40% vs. diode-only decay. |
| Package Thermal Resistance | 27 °C/W (RθJA, 4-layer PCB) - defines maximum power dissipation before exceeding 150 °C junction limit at given ambient temperature. |
Pinout & Package
The A3995SEVTR-T is housed in a 36-pin QFN package (suffix EV) with 6 mm × 6 mm footprint, 0.90 mm nominal height, and an exposed thermal pad (PAD) soldered to PCB ground for enhanced thermal performance. Lead-free construction with 100% matte tin plating.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| OUT1A / OUT1B / OUT2A / OUT2B | DMOS full-bridge output terminals | Drive motor windings bidirectionally; each pair forms one H-bridge with ≤350 mΩ RDS(on) per FET at 25 °C. |
| SENSE1 / SENSE2 | Current sense comparator inputs | Monitor voltage across external RS1/RS2 resistors to regulate peak current; ±500 mV absolute max input rating. |
| PHASE1 / PHASE2 | Direction control inputs | Set motor rotation direction (H/L on OUTx pins); logic-compatible with 3–5.5 V VDD supply. |
| ENABLE1 / ENABLE2 | Bridge enable inputs | Enable/disable respective H-bridge; low state forces both outputs to high-impedance (coast) or brake depending on MODE. |
| MODE1 / MODE2 | Decay mode selection | Logic high selects slow decay (synchronous rectification only); logic low selects fast decay (recirculation through both FETs). |
| VREF1 / VREF2 | Current limit reference inputs | Analog inputs (0–1.5 V) setting trip threshold for PWM regulation; ITRIP = VREF / (3 × RS). |
| VCP / CP1 / CP2 | Charge pump circuit terminals | VCP supplies boosted gate drive; CP1/CP2 require 0.1 µF ceramic capacitor for charge transfer and stable high-side operation. |
| GND / PAD | Power and thermal ground | Multiple GND pins plus exposed thermal pad must be connected to low-impedance PCB ground plane for electrical integrity and heat removal. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent PWM current regulators | Each bridge uses fixed 30 µs off-time and blanking (~3.2 µs) to achieve stable, ripple-controlled current limiting without external compensation. |
| Internal synchronous rectification | Automatically activates appropriate low-side FETs during decay phase, reducing conduction loss by replacing 1.3 V body diode drop with <0.5 V FET drop. |
| Crossover-current protection | Hardware-level timing guardband prevents shoot-through during bridge switching transitions, eliminating need for external dead-time control. |
| Thermal shutdown with hysteresis | Shuts down at 165 °C typical and remains off until junction cools to ≤150 °C, preventing thermal cycling damage during overload conditions. |
| Undervoltage lockout (UVLO) | Independent VBB (7.6 V) and VDD (2.8 V) UVLO circuits ensure safe startup and prevent erratic operation during brownout or power ramp-up. |
Applications
| Industrial CNC Axis Control | Automated Guided Vehicle (AGV) Drive |
|---|---|
|
Use Scenario: Precise position and speed control of dual-axis stepper or DC servo actuators in CNC routers and milling machines. IC Role / Device Role / Timing Role: Dual full-bridge driver executing microstepping-equivalent current profiles via external PWM + PHASE/ENABLE sequencing. Use Value: Fixed off-time regulation ensures repeatable torque response across varying supply voltage and temperature, critical for contour accuracy. |
Use Scenario: Independent traction and steering motor control in battery-powered AGVs navigating warehouse environments. IC Role / Device Role / Timing Role: Bidirectional H-bridge controller managing regenerative braking (slow decay) and rapid directional reversal (fast decay). Use Value: Synchronous rectification reduces heat generation during frequent start/stop cycles, extending battery life and enabling compact heatsink design. |
| Medical Infusion Pump Actuation | Robotic Arm Joint Control |
|
Use Scenario: Low-noise, low-vibration motor drive for peristaltic or syringe-based fluid delivery systems requiring smooth flow rate modulation. IC Role / Device Role / Timing Role: Current-regulated dual-bridge driving precision DC motors with closed-loop feedback from external encoders or current sensors. Use Value: 3.2 µs blanking time eliminates false current-limit triggers from EMI in sensitive medical EMC environments. |
Use Scenario: Compact joint actuation in collaborative robots where space-constrained PCBs require high-power density motor drivers. IC Role / Device Role / Timing Role: Dual H-bridge delivering bidirectional torque to DC gearmotors, with MODE-selectable decay for dynamic response tuning. Use Value: 27 °C/W thermal resistance enables >2 W continuous dissipation on standard 4-layer boards, supporting higher duty cycles without forced cooling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual full-bridge motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| A5995GEVTR-T | Pin-compatible successor with extended operating temperature (–40 to 125 °C), improved RDS(on) (≤300 mΩ), and updated UVLO (VBB = 7.0 V). | Supports automotive-grade thermal cycling and higher ambient environments where A3995SEVTR-T fails qualification. | Select A5995GEVTR-T for new designs requiring production longevity, wider temperature range, or lower conduction loss. |
| A3989SLPTR-T | Stepper-optimized dual H-bridge (1.2 A), integrated indexer, SPI interface, and microstepping support - not pin-compatible. | Targets bipolar stepper motors with position control; lacks independent DC motor PHASE/ENABLE logic of A3995SEVTR-T. | Choose A3989SLPTR-T when replacing stepper-based motion systems rather than discrete DC motor control architectures. |
Compared with A3995SEVTR-T, the A5995GEVTR-T offers direct replacement capability with enhanced specs and lifecycle support, while the A3989SLPTR-T serves distinct stepper-centric use cases requiring integrated motion control - neither is a drop-in substitute without board redesign.
Availability
A3995SEVTR-T is available at Aetrix Electronics and suitable for legacy system repair, end-of-life component consolidation, and industrial equipment maintenance requiring stable component supply despite discontinuation status.
Supply support for A3995SEVTR-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer and manufacturer of high-performance magnetic sensing and power IC solutions, founded in 1990 and headquartered in Manchester, NH.
The A3995SEVTR-T belongs to Allegro's DMOS motor driver product line, engineered specifically for cost-sensitive, thermally demanding industrial DC motor control applications requiring dual-bridge integration and robust fault protection.
FAQ
Is the A3995SEVTR-T still in production?
No, the A3995SEVTR-T was officially discontinued by Allegro MicroSystems effective July 1, 2019. It is no longer manufactured, and samples are unavailable. Aetrix Electronics maintains limited legacy stock for repair and maintenance programs but does not recommend it for new designs.
What is the recommended replacement for the A3995SEVTR-T?
The A5995GEVTR-T is Allegro's designated successor to the A3995SEVTR-T, offering pin compatibility, improved thermal performance, extended temperature range (–40 to 125 °C), and updated protection thresholds. It is actively produced and supported for new designs requiring identical functionality.
Can the A3995SEVTR-T drive stepper motors?
The A3995SEVTR-T is not optimized for stepper motor control. It lacks built-in indexer logic, microstepping support, or phase sequencing - it is designed for independent bidirectional DC motor control using external PHASE/ENABLE signals. For stepper applications, Allegro recommends the A3988 or A3989 series instead.
What is the function of the VCP, CP1, and CP2 pins on the A3995SEVTR-T?
VCP, CP1, and CP2 form the internal charge pump network that generates a boosted gate-drive voltage above VBB to fully enhance the high-side N-channel DMOS FETs. A 0.1 µF ceramic capacitor must be placed between CP1 and CP2, and another between VCP and VBB to stabilize the reservoir voltage required for reliable high-side switching in the A3995SEVTR-T.
Does the A3995SEVTR-T support both fast and slow decay modes?
Yes, the A3995SEVTR-T supports both fast and slow decay modes per bridge, selected independently via the MODE1 and MODE2 inputs. A logic high enables slow decay with synchronous rectification only; a logic low enables fast decay with bidirectional recirculation. Synchronous rectification remains active in both modes.
A3995SEVTR-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 36-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Motor Type - Stepper:
- -
- Motor Type - AC, DC:
- Brushed DC
- Function:
- Driver - Fully Integrated, Control and Power Stage
- Output Configuration:
- Half Bridge (4)
- Interface:
- Parallel
- Technology:
- DMOS
- Step Resolution:
- -
- Applications:
- General Purpose
- Current - Output:
- 2.4A
- Voltage - Supply:
- 3V ~ 5.5V
- Voltage - Load:
- 8V ~ 36V
- Operating Temperature:
- -20°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 36-QFN (6x6)
A3995SEVTR-T FAQ
1.How can I place an order for A3995SEVTR-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A3995SEVTR-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A3995SEVTR-T reliable?
The price and inventory of A3995SEVTR-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A3995SEVTR-T is usually 5 days.
3.What payment methods are accepted for A3995SEVTR-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A3995SEVTR-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A3995SEVTR-T?
A3995SEVTR-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A3995SEVTR-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A3995SEVTR-T?
For technical support, including A3995SEVTR-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A3995SEVTR-T requirements.
6.How does Aetrix verify that A3995SEVTR-T is sourced from the original manufacturer or authorized distributors?
All A3995SEVTR-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A3995SEVTR-T meets industry standards.
7.What is the process for return or replacement of A3995SEVTR-T?
All A3995SEVTR-T units undergo pre-shipment inspection (PSI). If there is an issue with A3995SEVTR-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A3995SEVTR-T part is unused and in its original packaging.
Return procedure for A3995SEVTR-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
A3995SEVTR-T Tags
-
DRV2603RUNR
Texas Instruments

-
DRV8837CDSGR
Texas Instruments

-
DRV8837DSGR
Texas Instruments

-
DRV8838DSGR
Texas Instruments

-
DRV8839DSSR
Texas Instruments

-
EMC2301-1-ACZL-TR
Microchip Technology

-
DRV8231ADSGR
Texas Instruments

-
EMC2302-2-AIZL-TR
Microchip Technology

-
DRV8800PWPR
Texas Instruments

-
DRV8835DSSR
Texas Instruments

-
EMC2303-1-KP-TR
Microchip Technology

-
DRV8876PWPR
Texas Instruments
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

