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Allegro MicroSystems A4490EES-T
- Part No.:
- A4490EES-T
- Manufacturer:
- Allegro MicroSystems
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
A4490EES-T.pdf
- Description:
- IC REG BUCK ADJ TRPL 20QFN
- Quantity:
- Payment:
- Shipping:
Inventory:2,235
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Product details
Overview
A4490EES-T from Allegro MicroSystems is a triple-output, fixed-frequency synchronous buck switching regulator IC designed for high-current power delivery in compact systems. It integrates three independent 1.5 A step-down converters (1.0 V/1.5 A, 3.3 V/1.5 A, and 5.0 V/1.5 A), operates from 4.5–34 V input, features 550 kHz switching with 120° phase interleaving, and includes integrated charge-pump gate drive and power-on-reset flag (PORZ) for system sequencing - deployed in photo printers and industrial portable equipment.
For engineers reviewing the A4490EES-T datasheet, A4490EES-T pinout, A4490EES-T application, or A4490EES-T equivalent, key selection criteria include its 20-pin QFN-ES package, independent ENBx control per channel, VBB undervoltage warning at 3.6 V (typ), soft-start duration of 1.25 ms (typ), and thermal resistance of 37 °C/W on a 4-layer JEDEC board.
Technical Context
The A4490EES-T implements peak current-mode control with slope compensation across all three buck regulators, sharing a single clock but operating with 120° phase shift to reduce input ripple and EMI. Each channel features independent enable (ENB1/2/3), feedback (FB1/2/3), and dedicated input supply pins (VBB1/2/3) supporting flexible power routing.
It uses an internal charge-pump (VCP, CP1, CP2) to sustain gate drive across wide duty cycles (5–90%), eliminating external clamp circuits. The POR circuit monitors FBx thresholds (85% for assertion, 80% for deassertion) and VBB level (3.6 V warning), with delay set by external capacitor on CPOR (tPOR = 2.131×10⁵ × CPOR).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 34 V - supports wide industrial and printer supply rails without external pre-regulation |
| Switching Frequency | 550 kHz (±80 kHz) - enables use of small 4.7–15 μH inductors and ceramic output capacitors |
| Output Current per Channel | 1.5 A continuous - sufficient for FPGA I/O banks, microcontroller cores, and peripheral rails |
| Thermal Resistance | 37 °C/W (RθJA, 4-layer JEDEC board) - requires exposed pad soldering and thermal vias for full 1.5 A/channel operation |
| POR Delay Range | 75–155 ms (with 470 nF CPOR capacitor) - configurable timing for safe system boot sequencing |
| VBB Undervoltage Warning | 3.6 V (typ) - asserts PORZ low while regulators remain active, enabling graceful system shutdown |
| Soft-Start Duration | 1.25 ms (typ) - limits inrush current and prevents output overshoot during power-up |
Pinout & Package
Package: 20-contact, 4 mm × 4 mm, 0.75 mm nominal height QFN with exposed thermal pad (suffix ES). RoHS-compliant, lead-free, 100% matte tin plating.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB1 / FB2 / FB3 | Feedback input for REG1 / REG2 / REG3 | Connects to resistor divider to set output voltage; bias current ±100 nA affects accuracy |
| ENB1 / ENB2 / ENB3 | Active-high enable for each regulator | Pull-up to VBB via 100 kΩ recommended; VIH ≥ 2 V, VIL ≤ 0.8 V |
| LX1 / LX2 / LX3 | Switch node for each buck stage | Drives external high-side MOSFET; must connect to inductor and Schottky flyback diode |
| VBB1 / VBB2 / VBB3 | Dedicated input supply for each regulator | Externally tied together; supports independent input filtering per rail |
| VCP / CP1 / CP2 | Charge-pump reservoir and capacitor terminals | Generates gate-drive voltage > VBB; requires 47 nF ceramic capacitor between CP1–CP2 |
| PORZ | Open-drain power-on-reset flag | Asserts low when any enabled FBx < 80% target or VBB < 3.6 V; pulls high after tPOR if conditions met |
| CPOR | POR delay timing capacitor connection | External capacitor sets POR duration (e.g., 470 nF → 115 ms typ); layout critical to avoid leakage |
| GND / PGND | Analog ground / charge-pump ground | Must be connected externally; PGND isolated for charge-pump noise immunity |
| VDD | Bias supply input (3.3–5.5 V) | Optional external supply lowers VBB UVLO threshold and reduces quiescent current |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent buck regulation | Enables simultaneous 1.0 V, 3.3 V, and 5.0 V rails from single input - eliminates need for multiple discrete regulators |
| 120° phase-interleaved switching | Reduces RMS input capacitor current by ~58% vs. in-phase operation, lowering EMI and input ripple stress |
| Integrated charge-pump gate drive | Supports >90% duty cycle operation down to 4.5 V input without external bootstrap components |
| User-configurable POR delay | CPOR pin accepts standard ceramic capacitor (e.g., 470 nF) to precisely align reset timing with slowest rail startup |
| Per-channel enable and soft-start | Allows staggered power-up sequences (e.g., core before I/O) and prevents system-level inrush faults |
Applications
| Photo & Inkjet Printers | Industrial Control Panels |
|---|---|
Use Scenario: Powering printhead drivers, MCU, and sensor interfaces in compact inkjet platforms with tight thermal budgets. IC Role / Device Role / Timing Role: Primary multi-rail power manager delivering 1.0 V (ASIC core), 3.3 V (MCU I/O), and 5.0 V (motor driver logic) simultaneously. Use Value: Phase interleaving cuts input capacitance requirements by >40%, reducing BOM cost and PCB area vs. discrete solutions. | Use Scenario: Providing isolated, sequenced power to PLC I/O modules operating in harsh 0–70°C ambient environments. IC Role / Device Role / Timing Role: Centralized DC-DC controller with PORZ flag signaling system readiness to host controller after all rails stabilize. Use Value: VBB undervoltage warning at 3.6 V gives host MCU 10–15 ms advance notice before brownout, enabling controlled data save and safe shutdown. |
| Handheld Test Equipment | Portable Medical Devices |
Use Scenario: Battery-powered handheld oscilloscope requiring clean, low-noise 3.3 V analog and 1.2 V ADC reference rails. IC Role / Device Role / Timing Role: Triple-output regulator with independent ENB control enabling dynamic rail enable/disable to extend battery life. Use Value: 550 kHz switching allows use of 4.7 μH shielded inductors and 10 μF X5R ceramics - achieving <15 mVpp ripple at full load. | Use Scenario: Ultrasound probe electronics needing regulated 1.8 V (FPGA fabric), 3.3 V (transceiver), and 5.0 V (analog front-end) from Li-ion battery (3.0–4.2 V). IC Role / Device Role / Timing Role: High-efficiency buck controller supporting VDD-derived bias to lower effective VBB UVLO threshold to 3.5 V (typ). Use Value: Enables continued operation down to 3.4 V VBB for low-battery scenarios - extending usable runtime by ~8% vs. fixed-threshold alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ4436-AEC1 from Monolithic Power Systems | Automotive-grade (AEC-Q100), 3.5–36 V input, 3×1.2 A outputs, 2.2 MHz switching, no charge pump - requires external bootstrap | Targeted at automotive infotainment; lacks VBB undervoltage warning and PORZ flag with user-configurable delay | Choose for AEC-Q100 compliance and higher frequency; avoid if POR sequencing or wide-duty-cycle operation below 6 V is required |
| TPS543320 from Texas Instruments | 3.5–18 V input, 3×3 A outputs, PMBus interface, digital loop compensation, 4-mm QFN with thermal pad | Requires firmware configuration; supports telemetry and dynamic voltage scaling - not pin-compatible | Choose for programmability and telemetry; avoid if analog-only design, fixed 550 kHz timing, or minimal component count is mandatory |
Compared with MPQ4436-AEC1 and TPS543320, the A4490EES-T delivers deterministic analog sequencing, robust wide-input operation with integrated charge pump, and hardware-configurable POR - making it optimal for cost-sensitive, non-automotive embedded systems where simplicity and reliability outweigh programmability needs.
Availability
A4490EES-T is available at Aetrix Electronics and suitable for photo printers, industrial control panels, and handheld test equipment requiring stable component supply, long-term lifecycle support, and consistent parametric performance across temperature.
Supply support for A4490EES-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based semiconductor company specializing in high-performance power ICs, magnetic sensors, and precision motor control solutions for industrial, automotive, and consumer markets.
The A4490 product line is engineered for multi-rail power management in space-constrained, thermally demanding applications such as office automation, portable printers, and industrial edge devices - emphasizing integration, thermal efficiency, and system-level sequencing reliability.
FAQ
What is the maximum junction temperature specification for the A4490EES-T?
The A4490EES-T has an absolute maximum junction temperature (TJ(max)) of 150 °C, with guaranteed operation up to 125 °C. Thermal design must ensure RθJA ≤ 37 °C/W on a 4-layer JEDEC board; exceeding this requires enhanced copper area, thermal vias under the exposed pad, or forced airflow. The device includes overtemperature shutdown at 165 °C (typ) with 15 °C hysteresis to prevent thermal cycling.
Can the A4490EES-T operate with input voltage below 6 V?
Yes, the A4490EES-T supports operation down to 4.5 V input, but requires VDD to be supplied externally (3.3–5.5 V) when VBB < 6 V. This configuration lowers the VBB undervoltage lockout threshold to 3.5 V (typ) and ensures stable gate drive via the internal charge pump. Without external VDD, startup is inhibited below 4.3 V (typ) due to insufficient bias supply.
How is the power-on-reset (PORZ) timing configured on the A4490EES-T?
The PORZ timing on the A4490EES-T is set by an external capacitor connected to the CPOR pin. Using Equation tPOR = 2.131 × 10⁵ × CPOR, a 470 nF capacitor yields 115 ms (typ). The capacitor must be placed adjacent to CPOR with a short GND trace to minimize leakage; layout errors cause premature PORZ assertion. PORZ asserts high only after all enabled FBx pins exceed 85% of target voltage and remain above 80% for the full tPOR duration.
What are the recommended inductor values for each output of the A4490EES-T?
Allegro recommends 4.7 μH for the 5 V output, 10 μH for the 3.3 V output, and 15 μH for the 1.0 V output - all gapped ferrite types rated for ≥1.5 A rms and ≥2.5 A saturation. Specific part families include Taiyo Yuden NR6045 (1.5 A) and Sumida CDH74. Inductor selection must account for ±20% tolerance, worst-case ripple current (≤25% of load), and slope compensation stability (peak-to-peak current ≤1 A).
Does the A4490EES-T support independent voltage sequencing between its three outputs?
Yes, the A4490EES-T supports fully independent sequencing via separate ENB1, ENB2, and ENB3 pins. Each channel initiates its own soft-start (1.25 ms typ) upon enable assertion. PORZ is only asserted after all *enabled* channels reach 85% of their FB target; disabled channels are ignored. This enables precise order-of-operation control - e.g., enabling 1.0 V core before 3.3 V I/O - without external timing circuitry.
A4490EES-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 34V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 30.6V
- Current - Output:
- -
- Frequency - Switching:
- 550kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-QFN-EP (4x4)
A4490EES-T FAQ
1.How can I place an order for A4490EES-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A4490EES-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A4490EES-T reliable?
The price and inventory of A4490EES-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A4490EES-T is usually 5 days.
3.What payment methods are accepted for A4490EES-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A4490EES-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A4490EES-T?
A4490EES-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A4490EES-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A4490EES-T?
For technical support, including A4490EES-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A4490EES-T requirements.
6.How does Aetrix verify that A4490EES-T is sourced from the original manufacturer or authorized distributors?
All A4490EES-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A4490EES-T meets industry standards.
7.What is the process for return or replacement of A4490EES-T?
All A4490EES-T units undergo pre-shipment inspection (PSI). If there is an issue with A4490EES-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A4490EES-T part is unused and in its original packaging.
Return procedure for A4490EES-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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