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Allegro MicroSystems A4491EESTR-T
- Part No.:
- A4491EESTR-T
- Manufacturer:
- Allegro MicroSystems
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
A4491EESTR-T.pdf
- Description:
- IC REG BUCK ADJ TRPL 20QFN
- Quantity:
- Payment:
- Shipping:
Inventory:8,998
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Product details
Overview
A4491EESTR-T from Allegro MicroSystems is a triple-output, fixed-frequency buck switching regulator IC designed for space-constrained power management in multi-rail systems. It integrates three independent 1.5 A synchronous step-down converters (1.0 V, 3.3 V, and 5.0 V outputs), operates from 4.5–23 V input, delivers up to 4.5 A total output current, and features interleaved 550 kHz switching with multiphase control to reduce EMI and input capacitor stress - deployed in photo printers, POS terminals, and industrial controllers.
For engineers reviewing the A4491EESTR-T datasheet, A4491EESTR-T pinout, A4491EESTR-T application, or A4491EESTR-T equivalent, key selection criteria include independent ENBx sequencing control, user-adjustable PORZ delay via CPOR capacitor, internal slope-compensated peak-current-mode regulation, thermal shutdown at 165°C, and QFN-20 package compatibility with 4-layer JEDEC-standard PCB layout.
Technical Context
The A4491EESTR-T implements three fixed-frequency (470–630 kHz) buck regulators sharing one clock with 120° phase shift between channels to minimize input ripple and EMI. Each channel uses peak-current-mode control with internal slope compensation and per-channel soft-start (0.625–1.875 ms).
It includes an integrated charge pump (VCP) for robust gate drive across the full 4.5–23 V input range, independent enable inputs (ENB1/ENB2/ENB3) supporting flexible power sequencing, and a programmable power-on-reset (PORZ) flag with adjustable delay (75–155 ms) triggered by FBx voltage thresholds and VBB undervoltage warning (3.6 V typical).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 23 V - supports wide-input industrial and printer power rails without external pre-regulation. |
| Switching Frequency | 550 kHz (typical), 470–630 kHz range - enables use of small ceramic output capacitors and low-cost shielded inductors. |
| Output Current Capability | Up to 1.5 A per channel (4.5 A total) - determined by thermal design and input/output voltage combinations. |
| Feedback Reference Voltage | 0.8 V ±1% - sets precise output voltage via external resistor divider; tolerance directly impacts output accuracy. |
| Thermal Resistance (RθJA) | 37 °C/W on 4-layer JEDEC PCB - defines maximum power dissipation before junction temperature exceeds 125°C under ambient conditions. |
| Undervoltage Lockout (VBBUV) | 4.3 V startup / 4.1 V shutdown (no external VDD); 4.2 V startup / 3.5 V shutdown (with external VDD) - ensures reliable start-up and graceful brown-out response. |
| Power-On-Reset Delay | Adjustable 75–155 ms via CPOR capacitor (470 nF typical) - provides system controller time to stabilize before asserting PORZ high. |
Pinout & Package
The A4491EESTR-T is housed in a 4 mm × 4 mm, 20-contact QFN package with exposed thermal pad (ES suffix), optimized for compact PCB layouts and enhanced thermal dissipation in high-density applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB1, FB2, FB3 | Feedback inputs for REG1/REG2/REG3 | Connect to resistor dividers to set output voltages; bias current ≤ ±100 nA affects accuracy. |
| ENB1, ENB2, ENB3 | Active-high enable inputs | Independently control regulator startup/shutdown; support 100 kΩ pull-up for automatic VBB-triggered sequencing. |
| LX1, LX2, LX3 | Switch node outputs | Drive external inductor-diode paths; require low-inductance layout to minimize ringing and EMI. |
| VBB1, VBB2, VBB3 | Input supply pins per regulator | Must be externally tied together; distribute input current and reduce trace impedance for each channel. |
| PORZ | Open-drain power-on-reset output | Asserts low during power-up until all enabled regulators reach 85% of target FB voltage and VBB > 3.6 V. |
| CPOR | POR delay timing capacitor connection | Controls tPOR = 2.131×10⁵ × CPOR; requires short, low-leakage layout adjacent to GND. |
| VCP, CP1, CP2 | Charge pump reservoir and capacitor terminals | Enable stable high-side gate drive across full input range; CP1/CP2 require 100 nF ceramic X5R. |
| PGND, GND | Power and signal ground terminals | GND1 and PGND1 must be connected externally; thermal pad must be soldered to ground plane with vias. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent buck regulators | Enables single-chip 1.0 V/3.3 V/5.0 V power tree for microcontrollers, FPGAs, and interface ICs - eliminates three discrete DC/DC modules. |
| Multiphase interleaved switching | 120° phase shift reduces RMS input ripple by ~58% vs. synchronous operation - allows smaller input bulk capacitance and lower EMI filter cost. |
| Programmable PORZ with adjustable delay | CPOR capacitor sets reset timeout (75–155 ms); gives system controller deterministic timing to initialize after rail stabilization. |
| Internal slope compensation | Eliminates need for external compensation network - simplifies loop stability design across duty cycles and load transients. |
| Integrated charge pump (VCP) | Maintains sufficient gate drive for internal MOSFETs down to 4.5 V input - avoids external boost circuitry and improves light-load efficiency. |
Applications
| Photo & Inkjet Printers | Point-of-Sale Terminals |
|---|---|
Use Scenario: Powering printhead drivers, MCU, memory, and USB interface in compact thermal/inkjet platforms. IC Role / Device Role / Timing Role: Triple-output PMIC delivering 1.0 V core, 3.3 V logic, and 5.0 V peripheral rails with synchronized soft-start and POR coordination. Use Value: Reduces BOM count by replacing three discrete buck ICs; interleaved switching lowers conducted EMI to meet CISPR-22 Class B limits. | Use Scenario: Supplying embedded ARM processor, touchscreen controller, and receipt printer in retail kiosks. IC Role / Device Role / Timing Role: Centralized power manager enabling controlled power sequencing (e.g., enable 3.3 V logic before 1.0 V core) via independent ENBx pins. Use Value: PORZ flag provides deterministic reset assertion after all rails settle - prevents firmware lockup during cold start or brown-out recovery. |
| Industrial Control Panels | Security System DVRs |
Use Scenario: Providing regulated supplies for FPGA configuration, sensor interface, and Ethernet PHY in DIN-rail mounted HMI units. IC Role / Device Role / Timing Role: High-reliability triple buck converter with thermal shutdown (165°C) and VBB undervoltage warning (3.6 V) for unregulated 24 V DC field power. Use Value: Internal diagnostics detect overtemperature and input UVLO - enables graceful shutdown before system damage occurs. | Use Scenario: Powering SoC, image signal processor, and SATA controller in surveillance DVRs with fanless thermal design. IC Role / Device Role / Timing Role: Compact 4×4 mm QFN solution delivering 1.0 V/3.3 V/5.0 V with minimal PCB area - critical for dense multilayer boards. Use Value: Exposed thermal pad and 37 °C/W RθJA allow >2 W dissipation on standard 4-layer board - sustains full load without heatsink. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ4436-AEC1 from Monolithic Power Systems | Automotive-grade AEC-Q100 qualified; 3.3–36 V input; 3× 2 A outputs; no integrated charge pump - requires external bootstrap circuitry for high-side drive. | Targeted at automotive infotainment and ADAS; lacks programmable PORZ and multiphase interleaving. | Choose when AEC-Q100 compliance and higher input voltage are required; avoid if charge pump simplicity or precise POR timing is critical. |
| TPS544B20 from Texas Instruments | Single-channel 4 A buck with PMBus interface; requires external controller for triple-rail coordination; 4.5–20 V input; no integrated POR or charge pump. | Designed for server VRM and telecom; relies on digital controller for sequencing - adds complexity and component count. | Choose only in digitally managed power systems where PMBus telemetry and dynamic voltage scaling are needed; not a drop-in replacement. |
Compared with MPQ4436-AEC1 and TPS544B20, the A4491EESTR-T uniquely integrates three regulators, multiphase timing, charge pump, and programmable POR in one QFN-20 package - offering lowest component count and fastest time-to-power for industrial and consumer multi-rail designs without digital control overhead.
Availability
A4491EESTR-T is available at Aetrix Electronics and suitable for photo printers, point-of-sale terminals, and industrial control panels requiring stable component supply, long-lifecycle availability, and RoHS-compliant packaging.
Supply support for A4491EESTR-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer of high-performance power ICs and magnetic sensors, headquartered in Manchester, NH, serving automotive, industrial, and consumer markets since 1989.
The A4491EESTR-T belongs to Allegro's high-integration power management product line, engineered specifically for space-constrained, multi-rail applications in office automation, portable equipment, and industrial controls where reliability, thermal performance, and simplified design are critical.
FAQ
What is the maximum total output current supported by the A4491EESTR-T?
The A4491EESTR-T supports up to 4.5 A total output current across its three channels, with each regulator rated for 1.5 A continuous output. Actual achievable current depends on input voltage, output voltage combinations, PCB thermal design, and ambient temperature - for example, at VBB = 12 V and VREG = 1.0 V/3.3 V/5.0 V, full 1.5 A per channel is attainable with proper heatsinking and 4-layer board layout. The device includes per-channel current limiting (2.0 A typical) and thermal shutdown (165°C) to protect against overload.
How does the A4491EESTR-T implement power sequencing between its three outputs?
The A4491EESTR-T implements power sequencing via three independent active-high enable pins (ENB1, ENB2, ENB3), allowing designers to assert each regulator's startup in any order using external logic or resistor-based delays. When an ENBx pin is pulled high, its corresponding regulator initiates a dedicated soft-start cycle (0.625–1.875 ms). The PORZ flag only asserts high after all *enabled* regulators reach ≥85% of their target FB voltage - giving system controllers precise visibility into rail readiness. This eliminates need for external sequencers in most applications.
Can the A4491EESTR-T operate with an input voltage below 6 V, and what design considerations apply?
Yes, the A4491EESTR-T can operate with VBB as low as 4.5 V, but requires connecting VDD to VBB (not an external supply) when VBB < 6 V, per the Powering Configurations section. At low input, RDS(on) increases - e.g., 560 mΩ typical at VBB = 4.5 V vs. 450 mΩ at VBB = 6 V - impacting efficiency and thermal performance. Also, the VBB undervoltage lockout threshold drops to 3.7–4.7 V, so input filtering must ensure clean rise/fall. Layout must minimize parasitic inductance on VBB and LX traces to maintain stability under narrow duty cycles.
What is the function of the CPOR pin on the A4491EESTR-T, and how is it configured?
The CPOR pin on the A4491EESTR-T sets the duration of the power-on-reset (PORZ) timeout using an external capacitor. The relationship is tPOR = 2.131×10⁵ × CPOR, yielding 75–155 ms for 470 nF (typical). CPOR must be a ceramic X5R/X7R capacitor placed adjacent to the pin with a short, low-impedance ground path to GND1 - leakage or routing parasitics will cause timing inaccuracy. The PORZ signal goes high only after all enabled regulators exceed 85% of their FB reference and VBB remains above 3.6 V, making CPOR critical for deterministic system initialization.
Does the A4491EESTR-T require external components for stability, and which ones are mandatory?
Yes, the A4491EESTR-T requires several mandatory external components: three output inductors (e.g., 4.7–15 µH), six ceramic output capacitors (10–40 µF X5R/X7R depending on VOUT), three feedback resistor dividers, one POR timing capacitor (CPOR), one charge pump capacitor (CP1/CP2 = 100 nF), one VCP reservoir capacitor (C2 = 470 nF), and one VDD filter capacitor (C12 = 10 µF). The IC includes internal compensation, so no external compensation network is needed - significantly reducing design complexity versus controllers requiring type-II/type-III compensation.
A4491EESTR-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 23V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 20.7V
- Current - Output:
- -
- Frequency - Switching:
- 550kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-QFN-EP (4x4)
A4491EESTR-T FAQ
1.How can I place an order for A4491EESTR-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A4491EESTR-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A4491EESTR-T reliable?
The price and inventory of A4491EESTR-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A4491EESTR-T is usually 5 days.
3.What payment methods are accepted for A4491EESTR-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A4491EESTR-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A4491EESTR-T?
A4491EESTR-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A4491EESTR-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A4491EESTR-T?
For technical support, including A4491EESTR-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A4491EESTR-T requirements.
6.How does Aetrix verify that A4491EESTR-T is sourced from the original manufacturer or authorized distributors?
All A4491EESTR-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A4491EESTR-T meets industry standards.
7.What is the process for return or replacement of A4491EESTR-T?
All A4491EESTR-T units undergo pre-shipment inspection (PSI). If there is an issue with A4491EESTR-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A4491EESTR-T part is unused and in its original packaging.
Return procedure for A4491EESTR-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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