Allegro MicroSystems A4984SETTR-T
- Part No.:
- A4984SETTR-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
A4984SETTR-T.pdf
- Description:
- IC MTR DRVR BIPOLAR 3-5.5V 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:6,490
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
A4984SETTR-T from Allegro MicroSystems is a DMOS bipolar stepper motor driver IC with integrated translator, supporting full-, half-, quarter-, and eighth-step modes. It delivers ±2 A output current at up to 35 V supply, features automatic mixed/slow decay mode selection, synchronous rectification, and thermal shutdown. It is used in precision motion control systems such as 3D printer extruder/carriage drivers and CNC micro-positioning stages.
For engineers reviewing the A4984SETTR-T datasheet, A4984SETTR-T pinout, A4984SETTR-T application, or A4984SETTR-T equivalent, key selection considerations include its fixed off-time PWM current regulation (30 µs typ.), no-smoke-no-fire (NSNF) compliance in ET package, 32-pin QFN thermal pad layout, and translator-based step command interface requiring only STEP/DIR/MSx logic inputs.
Technical Context
The A4984SETTR-T implements a dual full-bridge DMOS output stage with fixed off-time current regulation per phase, where trip level is set by VREF and external sense resistors (RS1/RS2) via ITripMAX = VREF/(8 × RS). Decay mode-Slow or Mixed-is automatically selected per step transition based on DAC output direction, reducing current waveform distortion from motor back-EMF.
Its integrated translator eliminates need for external phase sequencing logic: a single rising edge on STEP advances one microstep, with resolution controlled by MS1/MS2 logic levels. Protection includes short-to-ground latching, shorted-load repetitive off-time cycling, UVLO (2.8 V typ.), and thermal shutdown (165 °C with 15 °C hysteresis).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | ±2 A continuous - supports NEMA 17–23 bipolar stepper motors at full torque without external heatsinking under typical PCB thermal conditions. |
| Supply Voltage Range | 8–35 V - compatible with 12 V and 24 V industrial motor rails; operates down to 0 V during Sleep mode. |
| Logic Supply | 3.0–5.5 V - interoperable with both 3.3 V and 5 V microcontrollers without level shifting. |
| Fixed Off-Time | 30 µs typical - determines minimum current regulation period; adjustable via ROSC resistor for fine-tuning decay behavior. |
| Sleep Current | <10 µA - enables ultra-low-power standby in battery-operated motion systems between movement cycles. |
| RDS(ON) | 430 mΩ max per FET - limits conduction loss to <1.7 W per bridge at 2 A, enabling compact thermal design. |
| Thermal Resistance | 32 °C/W (JEDEC 4-layer PCB) - validated for ET package; allows ~3.1 W max power dissipation before thermal shutdown at 85 °C ambient. |
Pinout & Package
32-contact QFN package (5 mm × 5 mm × 0.90 mm) with exposed thermal pad; RoHS-compliant, 100% matte tin leadframe; designed for NSNF (No Smoke No Fire) compliance via isolation of critical pins (OUT1A/OUT1B/SENSE1/VBB1 etc.) using no-connect pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| OUT1A / OUT1B / OUT2A / OUT2B | DMOS Full-Bridge Outputs | Drive bipolar stepper motor windings; each pair forms independent H-bridge with ±2 A capability and body diode recovery management. |
| SENSE1 / SENSE2 | Current Sense Inputs | Monitor voltage drop across external sense resistors (RS1/RS2); must stay within –0.5 V to +0.5 V to avoid comparator saturation. |
| VREF | Reference Input | Sets maximum current trip level via ITripMAX = VREF/(8 × RS); 0–4 V range allows precise scaling from ~100 mA to 2 A. |
| STEP / DIR / MS1 / MS2 | Translator Control Inputs | STEP advances microstep; DIR sets rotation direction; MS1/MS2 select resolution (full/half/quarter/eighth) per truth table. |
| CP1 / CP2 / VCP | Charge Pump Terminals | Generate gate drive voltage > VBB for high-side N-channel FETs; require 0.1 µF ceramic caps between CP1–CP2 and VCP–VBB. |
| SLEEP / ENABLE / RESET | Power & State Control | SLEEP disables internal circuitry (<10 µA); ENABLE gates outputs; RESET forces translator to Home state and disables all FETs. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Translator | Eliminates need for external microcontroller-based phase sequencing - STEP input directly advances microsteps with no firmware overhead. |
| Automatic Decay Mode Selection | Switches between Slow and Mixed decay per step transition to minimize current ripple and prevent missed steps caused by back-EMF. |
| Synchronous Rectification | Turns on low-RDS(ON) FETs during decay instead of relying on lossy body diodes - reduces power dissipation by ~40% vs. asynchronous operation. |
| No-Smoke-No-Fire (NSNF) | ET package adds NC pins between high-risk terminals (e.g., OUT1A–SENSE1, OUT1A–VBB1), preventing fire/smoke during adjacent-pin shorts. |
| Comprehensive Fault Protection | Includes latched short-to-ground detection, repetitive shorted-load handling, thermal shutdown with hysteresis, and UVLO - enables robust unattended operation. |
Applications
| 3D Printer Motion Control | CNC Milling Axis Driver |
|---|---|
Use Scenario: Driving NEMA 17 stepper motors for X/Y/Z axis positioning in fused deposition modeling (FDM) printers. IC Role / Device Role / Timing Role: Translates step pulses from host MCU into precise eighth-step current waveforms; regulates phase current via VREF and RS1/RS2. Use Value: Enables smooth, quiet, high-resolution motion (<0.0125 mm/step with 1.8° motor + 16:1 microstepping) without firmware complexity or external sequencer IC. |
Use Scenario: Controlling stepper-driven linear actuators in desktop CNC routers for engraving and milling operations. IC Role / Device Role / Timing Role: Provides ±2 A drive capability and automatic decay adaptation to varying load inertia and back-EMF during acceleration/deceleration. Use Value: Prevents step loss at high speeds by dynamically selecting Mixed decay when current decreases, maintaining positional accuracy across 0–800 RPM range. |
| Automated Laboratory Stage | Medical Imaging Positioner |
Use Scenario: Precision XY translation stage for optical microscope sample alignment requiring sub-micron repeatability. IC Role / Device Role / Timing Role: Delivers stable quarter-step current regulation with <±5% trip-level error at 2 A; uses Sleep mode between movements to minimize thermal drift. Use Value: Achieves <1 µm positioning resolution and <0.5 µm repeatability due to low RDS(ON), tight current matching, and thermal stability from exposed-pad QFN package. |
Use Scenario: Motorized collimator and detector positioning in portable X-ray imaging devices with strict safety and reliability requirements. IC Role / Device Role / Timing Role: Implements NSNF-compliant ET package and latched short-to-ground protection to meet IEC 62366 usability and IEC 60601-1 safety standards. Use Value: Eliminates fire risk from PCB trace shorts during field service or mechanical stress, ensuring compliance without external fuse or crowbar circuitry. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar stepper motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMC2209-LA | StealthChop2 silent stepping, 2.0 A RMS (vs. ±2 A peak), SPI interface required for configuration; no integrated translator. | Better acoustic noise performance but requires MCU firmware support; lacks NSNF certification and latched short-to-ground protection. | Choose TMC2209-LA if silent operation is prioritized over safety-critical fault containment and standalone simplicity. |
| DRV8825PWPR | 2.2 A peak, 32-step microstepping, no translator, no NSNF design, higher RDS(ON) (500 mΩ), no short-to-ground latch. | Lower cost but requires external step sequencer; unsuitable for safety-certified medical or industrial equipment requiring fail-safe behavior. | Choose DRV8825PWPR for cost-sensitive non-safety applications where external logic handles sequencing and fault response. |
Compared with TMC2209-LA and DRV8825PWPR, the A4984SETTR-T uniquely combines translator-based simplicity, NSNF-compliant hardware safety, and automatic decay adaptation - making it optimal for embedded motion systems where MCU resources are constrained and safety certification is mandatory.
Availability
A4984SETTR-T is available at Aetrix Electronics and suitable for 3D printer motion control, CNC axis driving, and automated laboratory instrumentation requiring stable component supply, long-term lifecycle support, and certified safety compliance.
Supply support for A4984SETTR-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer and manufacturer of high-performance magnetic sensing and power IC solutions, founded in 1985 and headquartered in Manchester, NH.
The A4984 product line targets cost-sensitive yet safety-aware motion control applications, delivering integrated stepper drivers with built-in translators, robust protection, and NSNF-compliant packaging for medical, industrial, and consumer automation.
FAQ
What is the package type and thermal pad configuration of the A4984SETTR-T?
The A4984SETTR-T uses a 32-pin QFN package measuring 5 mm × 5 mm × 0.90 mm with an exposed thermal pad on the underside. This pad must be soldered directly to a PCB ground plane with thermal vias for effective heat dissipation, achieving 32 °C/W junction-to-ambient thermal resistance on a JEDEC-standard 4-layer board.
How does the A4984SETTR-T implement automatic current decay mode selection?
The A4984SETTR-T monitors DAC output transitions between microsteps: if the new DAC level is lower than the previous, it selects Mixed decay (fast decay for 31.25% of tOFF, then slow); if equal or higher, it uses Slow decay. This adapts to motor back-EMF in real time, minimizing current distortion and step loss without external control.
Does the A4984SETTR-T support both 3.3 V and 5 V logic interfaces?
Yes, the A4984SETTR-T accepts logic supply (VDD) from 3.0 V to 5.5 V and has 3.3 V/5 V compatible inputs (STEP, DIR, MS1, MS2, ENABLE, SLEEP, RESET) with input thresholds defined as VDD × 0.3 (low) and VDD × 0.7 (high), plus 11% hysteresis - eliminating need for level shifters in mixed-voltage systems.
What protection features are included in the A4984SETTR-T and how do they behave during faults?
The A4984SETTR-T includes short-to-ground (latched disable until SLEEP or power cycle), shorted-load (repetitive off-time cycling), thermal shutdown (165 °C, 15 °C hysteresis), UVLO (2.8 V), and crossover-current protection. All operate autonomously without MCU intervention, preserving system integrity during overloads or wiring errors.
Can the A4984SETTR-T operate in eighth-step mode and what pins control resolution?
Yes, the A4984SETTR-T supports eighth-step microstepping when MS1 and MS2 are both driven high. Resolution is selected solely by MS1/MS2 logic levels per the truth table - full (L/L), half (H/L), quarter (L/H), eighth (H/H) - and takes effect at the next STEP rising edge without requiring reset or reconfiguration.
A4984SETTR-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Motor Type - Stepper:
- Bipolar
- Motor Type - AC, DC:
- -
- Function:
- Driver - Fully Integrated, Control and Power Stage
- Output Configuration:
- Half Bridge (4)
- Interface:
- Logic
- Technology:
- DMOS
- Step Resolution:
- 1, 1/2, 1/4, 1/8
- Applications:
- General Purpose
- Current - Output:
- 2A
- Voltage - Supply:
- 3V ~ 5.5V
- Voltage - Load:
- 8V ~ 35V
- Operating Temperature:
- -20°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
A4984SETTR-T FAQ
1.How can I place an order for A4984SETTR-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A4984SETTR-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A4984SETTR-T reliable?
The price and inventory of A4984SETTR-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A4984SETTR-T is usually 5 days.
3.What payment methods are accepted for A4984SETTR-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A4984SETTR-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A4984SETTR-T?
A4984SETTR-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A4984SETTR-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A4984SETTR-T?
For technical support, including A4984SETTR-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A4984SETTR-T requirements.
6.How does Aetrix verify that A4984SETTR-T is sourced from the original manufacturer or authorized distributors?
All A4984SETTR-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A4984SETTR-T meets industry standards.
7.What is the process for return or replacement of A4984SETTR-T?
All A4984SETTR-T units undergo pre-shipment inspection (PSI). If there is an issue with A4984SETTR-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A4984SETTR-T part is unused and in its original packaging.
Return procedure for A4984SETTR-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
A4984SETTR-T Tags
-
DRV2603RUNR
Texas Instruments

-
DRV8837CDSGR
Texas Instruments

-
DRV8837DSGR
Texas Instruments

-
DRV8838DSGR
Texas Instruments

-
DRV8839DSSR
Texas Instruments

-
EMC2301-1-ACZL-TR
Microchip Technology

-
DRV8231ADSGR
Texas Instruments

-
EMC2302-2-AIZL-TR
Microchip Technology

-
DRV8800PWPR
Texas Instruments

-
DRV8835DSSR
Texas Instruments

-
EMC2303-1-KP-TR
Microchip Technology

-
DRV8876PWPR
Texas Instruments
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

