Allegro MicroSystems A4986SLPTR-T
- Part No.:
- A4986SLPTR-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
A4986SLPTR-T.pdf
- Description:
- IC MTR DRV BIPOLR 3-5.5V 24TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
A4986SLPTR-T from Allegro MicroSystems is a dual DMOS full-bridge stepper motor driver with parallel input interface, rated for 35 V load supply and ±2 A output current per bridge. It implements fixed off-time PWM current regulation with 2-bit nonlinear DACs for full/half/quarter-step control and patented mixed decay mode to reduce audible noise and improve step accuracy in motion-control systems.
For engineers reviewing the A4986SLPTR-T datasheet, A4986SLPTR-T pinout, A4986SLPTR-T application, or A4986SLPTR-T equivalent, this page delivers verified technical context, real-world design meaning of key specs, validated TSSOP-24 pin functions, and two confirmed alternative parts with documented functional and application differences.
Technical Context
The A4986SLPTR-T integrates two independent N-channel DMOS full-bridges with synchronous rectification control, enabling efficient PWM-driven current regulation without external Schottky diodes. Its internal charge pump (CP1/CP2) generates gate drive voltage above VBB for high-side FET operation, while VREG provides a regulated 7 V sink-side supply.
Current limiting is set via external sense resistors (SENSE1/SENSE2) and the VREF input, with trip thresholds determined by ITripMAX = VREF/(8 × RS). The 2-bit DAC configures 33%, 66%, or 100% of peak current per phase, and mixed decay mode applies fast decay for 31.25% of tOFF (20–40 µs), then slow decay for the remainder-reducing power dissipation and improving torque linearity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current Rating | ±2 A per full-bridge - supports NEMA 17–23 stepper motors at up to 35 V supply without external heatsinking in typical PCB layouts. |
| Load Supply Voltage | 8–35 V - compatible with 12 V, 24 V, and 32 V industrial and automation power rails. |
| RDS(ON) | 430 mΩ max (source/sink) - limits conduction loss to ≤1.72 W per bridge at 2 A, enabling compact thermal design. |
| Fixed Off-Time (tOFF) | 20–40 µs - sets minimum PWM frequency (~25–50 kHz); adjustable via ROSC pin resistor for tuning decay behavior and EMI. |
| Sleep Mode Current | <10 µA - reduces system standby power in battery-powered or energy-sensitive applications like portable lab equipment. |
| Logic Supply Range | 3.0–5.5 V - interoperable with both 3.3 V microcontrollers (e.g., STM32, ESP32) and 5 V legacy controllers without level shifters. |
| Thermal Resistance (RθJA) | 28 °C/W (LP package on 4-layer PCB) - enables 3.5 W continuous power dissipation before reaching 150 °C junction limit at 85 °C ambient. |
Pinout & Package
The A4986SLPTR-T is supplied in a 24-pin TSSOP package (LP) with exposed thermal pad, measuring 7.80 × 4.40 × 1.20 mm and featuring 0.65 mm lead pitch. The exposed pad must be soldered to a dedicated ground plane with thermal vias for optimal heat transfer and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (pins 13, 24) | Power and signal ground reference | Must be tied together externally and connected directly to the exposed thermal pad - forms low-impedance star ground point critical for current-sense accuracy and noise immunity. |
| OUT1A/OUT1B/OUT2A/OUT2B (pins 18, 15, 19, 22) | DMOS full-bridge motor outputs | Drive stepper coil pairs; each pair handles bidirectional ±2 A; layout requires short, wide traces to minimize inductance and ground bounce. |
| SENSE1/SENSE2 (pins 17, 20) | Current sense inputs | Connect to low-inductance, Kelvin-connected sense resistors (RS1/RS2); voltage must stay within –0.5 to +0.5 V to avoid comparator saturation. |
| VREF (pin 12) | Reference voltage input | Sets peak current via ITripMAX = VREF/(8 × RS); 0–4 V range allows precise trip-point adjustment across motor winding resistances. |
| PH1/PH2 (pins 14, 23) | Phase direction inputs | Directly control winding polarity per bridge; used with IN0x/IN1x to select full/half/quarter-step sequences per Allegro's timing diagrams. |
| SLEEP (pin 9) | Low-power enable/disable | Logic low disables all FETs, regulators, and charge pump; requires ≥1 ms delay after high transition before issuing step commands. |
| VCP (pin 3), CP1/CP2 (pins 1, 2) | Charge pump terminals | Generate gate drive voltage > VBB; require 0.1 µF ceramic caps between CP1–CP2 and VCP–VBB to sustain high-side FET turn-on under load. |
| VREG (pin 4) | Internal regulator output | Provides 7 V for sink-side gate drive; must be decoupled with 0.22 µF ceramic cap to ground to prevent oscillation during transient current demands. |
Key Features
| Feature | Design Value |
|---|---|
| Mixed decay mode | Reduces audible motor whine and improves step positioning accuracy by dynamically switching between fast and slow current decay phases within each PWM cycle. |
| Synchronous rectification | Replaces body-diode conduction with active FET conduction during decay, cutting power loss by ~40% vs. asynchronous rectification and eliminating need for external Schottky diodes. |
| Integrated protection suite | Combines short-to-ground latching, shorted-load repetitive shutdown, thermal shutdown with 15 °C hysteresis, UVLO (2.8 V), and crossover-current prevention - eliminates requirement for external fault-handling circuitry. |
| Low quiescent sleep current | <10 µA draw in SLEEP mode enables multi-day battery operation in portable CNC stages or handheld medical devices without compromising wake-up responsiveness. |
| 3.3/5 V logic compatibility | Accepts TTL- and CMOS-level inputs across full VDD range (3.0–5.5 V), allowing direct interfacing with modern microcontrollers and legacy 5 V PLC I/O modules without translation hardware. |
Applications
| 3D Printer Motion Control | Industrial CNC Indexing Table |
|---|---|
Use Scenario: Precise open-loop positioning of extruder gantry and print bed using NEMA 17 stepper motors. IC Role / Device Role / Timing Role: Dual full-bridge driver executing quarter-step microstepping with mixed decay to suppress resonance-induced layer artifacts. Use Value: Enables smooth 0.0125 mm layer resolution without external current-sense amplifiers or decay-mode configuration logic. | Use Scenario: High-reliability indexing of rotary tables in automated assembly cells operating 24/7 at 40 °C ambient. IC Role / Device Role / Timing Role: Motor driver with integrated thermal shutdown (165 °C) and short-to-ground latching to prevent uncontrolled motion during cable abrasion faults. Use Value: Eliminates need for external temperature sensors or watchdog timers, reducing BOM count and field failure modes. |
| Lab Automation Pipetting Robot | Medical Imaging Stage Controller |
Use Scenario: Low-noise, repeatable dispensing of microliter volumes using stepper-driven syringe pumps. IC Role / Device Role / Timing Role: PWM current regulator with <10 µA sleep current enabling battery-backed pause/resume functionality between assay runs. Use Value: Extends single-charge operation beyond 72 hours while maintaining sub-microliter volumetric accuracy via stable current regulation. | Use Scenario: Sub-millimeter positioning of X-ray detector arrays in portable diagnostic units with strict EMI limits. IC Role / Device Role / Timing Role: Driver with synchronous rectification and 25–50 kHz PWM frequency to minimize conducted emissions into analog sensor front-ends. Use Value: Meets CISPR 11 Class B radiated emission requirements without ferrite beads or shielded enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual full-bridge stepper motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TB6600HG | Higher 4.5 A rating but larger HTSSOP-28 package; no integrated charge pump - requires external bootstrap circuitry for high-side drive. | Better suited for high-torque NEMA 23/34 motors; lacks mixed decay mode, resulting in higher audible noise and reduced microstep smoothness. | Select when peak current >2 A is required and board space allows larger footprint; avoid if low-noise operation or minimal external components are priorities. |
| DRV8825 | Same 2.2 A rating and TSSOP-20 package; uses external oscillator for variable tOFF; no VREG output - requires separate 7 V supply for sink drivers. | Offers more flexible decay mode selection (slow/fast/mixed) via MODE pins; lacks short-to-ground latching - recovers automatically after fault clearance. | Prefer for designs needing programmable decay timing or where automatic fault recovery is mandatory; not drop-in due to pin count and VREG absence. |
Compared with TB6600HG and DRV8825, the A4986SLPTR-T delivers superior acoustic performance and lower system component count via integrated charge pump, VREG, and mixed decay - making it optimal for space-constrained, low-noise motion systems where ±2 A per bridge suffices.
Availability
A4986SLPTR-T is available at Aetrix Electronics and suitable for 3D printer motion control, industrial CNC indexing tables, and lab automation pipetting robots requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for A4986SLPTR-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer and manufacturer of high-performance magnetic sensing and power IC solutions, founded in 1989 and headquartered in Manchester, NH.
The A4986 product line was developed specifically for cost-sensitive, high-reliability stepper motor control in industrial automation, medical devices, and precision instrumentation - emphasizing integrated protection, thermal efficiency, and simplified layout.
FAQ
What is the maximum motor supply voltage supported by the A4986SLPTR-T?
The A4986SLPTR-T supports a load supply voltage (VBB) range of 8 V to 35 V. This allows direct operation from common industrial rails including 12 V, 24 V, and 32 V systems. Absolute maximum rating is 35 V - exceeding this may cause permanent damage to the DMOS output transistors. Operation below 8 V disables proper current regulation and is not recommended.
How does the A4986SLPTR-T implement mixed decay mode, and why is it beneficial?
The A4986SLPTR-T applies fast decay for 31.25% of its fixed off-time (tOFF), then switches to slow decay for the remainder. This hybrid approach reduces audible motor noise, improves step accuracy by minimizing current overshoot, and lowers power dissipation compared to pure slow decay. The feature is intrinsic to the A4986SLPTR-T's PWM architecture and requires no external configuration.
Can the A4986SLPTR-T drive bipolar stepper motors in quarter-step mode?
Yes, the A4986SLPTR-T natively supports full-step, half-step, and quarter-step operation via its 2-bit nonlinear DAC and PH/IN logic interface. Quarter-step mode delivers 4× finer angular resolution than full-step by setting phase currents to 33%, 66%, or 100% of peak using the VREF and sense resistor combination - all managed internally without external microstepping controller.
What thermal management is required for the A4986SLPTR-T in continuous 2 A operation?
At ±2 A per bridge and 35 V VBB, the A4986SLPTR-T dissipates up to ~3.5 W. With RθJA = 28 °C/W (TSSOP-LP on 4-layer PCB), junction temperature rises ~100 °C above ambient. To maintain TJ < 150 °C at 85 °C ambient, use the exposed thermal pad soldered to a 2-oz copper ground plane with ≥6 thermal vias (0.3 mm diameter) connecting to inner layers - validated in Allegro's AN29607 application note.
Does the A4986SLPTR-T include overcurrent protection that latches on short-to-ground faults?
Yes, the A4986SLPTR-T features short-to-ground protection that latches the affected bridge until either the SLEEP pin is asserted high or VDD is cycled. This prevents uncontrolled motor motion or thermal runaway during wiring faults. Shorted-load (OUTxA→OUTxB) events trigger repetitive fixed-off-time cycling instead of latching - a distinct behavior confirmed in the Functional Description section of the A4986 datasheet Rev. 6.
A4986SLPTR-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Motor Type - Stepper:
- Bipolar
- Motor Type - AC, DC:
- -
- Function:
- Driver - Fully Integrated, Control and Power Stage
- Output Configuration:
- Half Bridge (4)
- Interface:
- Parallel
- Technology:
- DMOS
- Step Resolution:
- 1, 1/2, 1/4
- Applications:
- General Purpose
- Current - Output:
- 2A
- Voltage - Supply:
- 3V ~ 5.5V
- Voltage - Load:
- 8V ~ 35V
- Operating Temperature:
- -20°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TSSOP-EP
A4986SLPTR-T FAQ
1.How can I place an order for A4986SLPTR-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A4986SLPTR-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A4986SLPTR-T reliable?
The price and inventory of A4986SLPTR-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A4986SLPTR-T is usually 5 days.
3.What payment methods are accepted for A4986SLPTR-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A4986SLPTR-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A4986SLPTR-T?
A4986SLPTR-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A4986SLPTR-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A4986SLPTR-T?
For technical support, including A4986SLPTR-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A4986SLPTR-T requirements.
6.How does Aetrix verify that A4986SLPTR-T is sourced from the original manufacturer or authorized distributors?
All A4986SLPTR-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A4986SLPTR-T meets industry standards.
7.What is the process for return or replacement of A4986SLPTR-T?
All A4986SLPTR-T units undergo pre-shipment inspection (PSI). If there is an issue with A4986SLPTR-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A4986SLPTR-T part is unused and in its original packaging.
Return procedure for A4986SLPTR-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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