Allegro MicroSystems A5988GJPTR-T
- Part No.:
- A5988GJPTR-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- Motor Drivers, Controllers
- Package:
- 48-LQFP Exposed Pad
- Datasheet:
-
A5988GJPTR-T.pdf
- Description:
- IC MTR DRVR BIPOLAR 8-40V 48LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:15,000
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Product details
Overview
A5988GJPTR-T from Allegro MicroSystems is a quad DMOS full-bridge PWM motor driver IC designed to control two bipolar stepper motors or four DC motors in industrial motion systems. It delivers up to 1.6 A per bridge at 40 V, features fixed 30 µs off-time PWM current regulation with 2-bit nonlinear DAC step control (full/half/quarter), and integrates synchronous rectification and mixed-decay mode for reduced audible noise and power dissipation.
For engineers reviewing the A5988GJPTR-T datasheet, A5988GJPTR-T pinout, A5988GJPTR-T application, or A5988GJPTR-T equivalent, this page provides verified technical context, package-specific pin mapping, real-world motor control use cases, and validated alternative options for dual-stepper or multi-DC-motor drive designs requiring thermal robustness and precise current regulation.
Technical Context
The A5988GJPTR-T implements four independent N-channel DMOS full-bridges with integrated gate drivers, charge pump (CP1/CP2), and per-bridge VREFx-based current sensing. Each bridge uses fixed 30 µs off-time PWM with blanking (~1 µs) and mixed decay (30.1% fast decay + remainder slow decay) to minimize motor vibration and heat generation.
Control logic accepts industry-standard I0x/I1x/PHASE inputs for step sequencing, supports 3.3 V/5 V logic levels, and includes active-low SLEEPn for sub-10 µA quiescent current. Protection includes UVLO (7.6 V threshold), thermal shutdown (165 °C), crossover-current delay (425 ns), and overcurrent latching - with FAULTn open-drain output available only on the JP package.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Rating | 40 V max load supply; supports 24 V and 36 V industrial bus rails without derating. |
| Continuous Current | 1.6 A per full-bridge; sustained under thermal design with RθJA = 23 °C/W (JP package on 4-layer PCB). |
| PWM Off-Time | Fixed 30 µs; sets minimum current ripple and maximum step rate for stepper microstepping stability. |
| VREF Input Range | 0–1.5 V; sets peak current via ITripMax = VREF / (3 × RS), enabling precise torque calibration per motor phase. |
| Logic Compatibility | 3.3 V and 5 V tolerant inputs; eliminates level-shifting in mixed-voltage MCU interfaces. |
| Thermal Resistance | RθJA = 23 °C/W (JP package); enables 3.5 W dissipation at 75 °C ambient before reaching 150 °C junction limit. |
| Sleep Current | <1 µA typical; reduces system standby power in battery-powered or energy-sensitive motion controllers. |
Pinout & Package
The A5988GJPTR-T is supplied in a 48-pin LQFP package (7 mm × 7 mm) with exposed thermal pad for enhanced heat transfer. The package complies with JEDEC MS-026 BBCHD and features 100% matte-tin leadframe plating.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| OUT1A–OUT4B | DMOS Full-Bridge Outputs | Four independent H-bridge terminals; each pair drives one motor winding or DC motor direction. |
| SENSE1–SENSE4 | Current Sense Inputs | Low-impedance analog inputs tied to external sense resistors (RSx); tolerate ±500 mV max for accurate trip-level detection. |
| VREF1–VREF4 | Reference Voltage Inputs | Analog inputs setting per-bridge peak current; 0–1.5 V range maps linearly to 0–100% of ITripMax. |
| I01–I04, I11–I14, PHASE1–PHASE4 | Digital Control Inputs | Industry-standard step/direction interface; configure full/half/quarter stepping or forward/reverse/coast for DC motors. |
| SLEEPn | Active-Low Sleep Enable | Puts device into ultra-low-power state; disables charge pump, PWM, and drivers while preserving register state. |
| FAULTn | Open-Drain Fault Output | Asserts low on overtemperature, UVLO, or overcurrent latch; JP-package exclusive; requires external pull-up. |
| VBB1/VBB2, PGND, GND | Power & Ground Terminals | VBB1/VBB2 supply high-side DMOS; PGND carries high-current return; GND is analog/digital reference - all must connect to star ground under thermal pad. |
| CP1/CP2, VCP | Charge Pump Circuitry | Generate gate voltage > VBB for high-side N-MOSFETs; CP1/CP2 require 0.1 µF ceramic; VCP needs 0.1 µF reservoir cap to VBBx. |
Key Features
| Feature | Design Value |
|---|---|
| Mixed Decay Mode | 30.1% fast decay + slow decay per off-cycle; reduces motor heating and acoustic noise vs. pure fast decay. |
| Synchronous Rectification | Enables low-RDS(on) recirculation path during decay; cuts power loss by ~40% vs. body-diode conduction alone. |
| Per-Bridge VREF Control | Independent analog current setting per full-bridge; allows asymmetric torque tuning across multi-motor systems. |
| Integrated Charge Pump | Self-contained high-side gate drive; eliminates need for external bootstrap circuitry or floating supplies. |
| Robust Fault Protection | UVLO, thermal shutdown with 15 °C hysteresis, and latched overcurrent - all resettable via SLEEPn or VBB cycle. |
Applications
| Industrial CNC Positioning Systems | Medical Infusion Pumps |
|---|---|
Use Scenario: Precise open-loop positioning of X/Y/Z axes using two 1.8° bipolar stepper motors with microstepping. IC Role / Device Role / Timing Role: Dual stepper driver with quarter-step resolution; manages current decay timing and phase commutation via I0/I1/PHASE signals. Use Value: Mixed decay mode ensures smooth motion at low speeds (<100 RPM) without resonance-induced stalling or audible whine. | Use Scenario: Controlled peristaltic pumping in portable infusion devices requiring silent, low-power operation. IC Role / Device Role / Timing Role: Single-bipolar-stepper driver with half-step sequencing; leverages SLEEPn for <1 µA standby between dose cycles. Use Value: Synchronous rectification and 30 µs fixed off-time reduce average power consumption by 35% vs. legacy drivers, extending battery life. |
| Automated Retail Kiosks | Lab Automation Robotic Arms |
Use Scenario: Actuation of bill acceptor, card reader, and display tilt mechanisms using four independent 12 V DC motors. IC Role / Device Role / Timing Role: Quad DC motor controller; each bridge driven via PWM-enable on I0x/I1x with VREFx-set current limits. Use Value: Independent per-motor current regulation prevents overload tripping when multiple actuators engage simultaneously. | Use Scenario: Multi-joint robotic arm with stepper-driven joints and DC-powered gripper, requiring coordinated torque and thermal management. IC Role / Device Role / Timing Role: Hybrid driver: bridges 1–2 for stepper joints, bridges 3–4 for DC gripper; uses FAULTn to signal joint stall to host MCU. Use Value: Exposed thermal pad + RθJA = 23 °C/W enables continuous 1.6 A operation at 70 °C ambient - critical for enclosed robotic enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad full-bridge motor driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| A5988GEVTR-T | Same die, 36-pin QFN (6 mm × 6 mm); RθJA = 27 °C/W; no FAULTn pin. | Better suited for space-constrained PCBs where thermal margin allows; lacks fault reporting capability. | Select when board area is limited and fault monitoring is handled externally or not required. |
| TB6600HG | Single-chip dual stepper driver; 4.5 A max; no per-bridge VREF; fixed 1/8–1/32 microstepping only. | Higher current per bridge but less flexible current tuning; no DC motor mode support. | Select when driving high-torque steppers (>2 A) and microstepping resolution > quarter-step is needed. |
Compared with A5988GEVTR-T, the A5988GJPTR-T offers superior thermal performance and integrated fault signaling, while TB6600HG trades configurability for higher single-bridge current and finer microstepping - making A5988GJPTR-T optimal for thermally demanding, multi-motor systems requiring diagnostic visibility and precise per-phase current control.
Availability
A5988GJPTR-T is available at Aetrix Electronics and suitable for industrial CNC positioning systems, medical infusion pumps, automated retail kiosks, and lab automation robotic arms requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for A5988GJPTR-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer and manufacturer of high-performance magnetic sensors and precision power ICs, headquartered in Manchester, NH.
The A5988 product line delivers highly integrated, thermally optimized motor drivers for motion control in industrial, medical, and automation equipment - emphasizing low-noise operation, current accuracy, and robust protection.
FAQ
What is the maximum continuous current per bridge for the A5988GJPTR-T?
The A5988GJPTR-T supports up to 1.6 A continuous current per full-bridge output under proper thermal conditions - specifically with RθJA = 23 °C/W on a 4-layer PCB and ambient temperature ≤75 °C. This rating assumes use of the exposed thermal pad soldered to a solid ground plane with thermal vias. Exceeding 1.6 A risks thermal shutdown activation or long-term reliability degradation.
Does the A5988GJPTR-T support microstepping, and if so, what resolutions are available?
Yes, the A5988GJPTR-T supports full-step, half-step, and quarter-step microstepping via its 2-bit nonlinear DAC and I0x/I1x/PHASE control interface. Step resolution is determined by external VREFx voltage and internal DAC mapping - no firmware or external sequencer is required. Quarter-step mode achieves 4× resolution versus full-step, improving positional accuracy and reducing low-speed vibration in bipolar stepper applications.
Is the FAULTn pin available on the A5988GJPTR-T, and how is it used?
Yes, the FAULTn pin is available exclusively on the A5988GJPTR-T (48-pin LQFP) package and is absent on the EV variant. It is an open-drain output that pulls low during overtemperature, undervoltage lockout, or latched overcurrent events. A pull-up resistor (typically 4.7 kΩ to 5 V) is required. The host MCU monitors FAULTn to trigger safe shutdown or diagnostic logging without polling internal registers.
What is the purpose of the CP1 and CP2 pins on the A5988GJPTR-T?
The CP1 and CP2 pins form the charge pump oscillator network for the A5988GJPTR-T. A 0.1 µF ceramic capacitor must be placed between them to generate a gate drive voltage higher than VBB, enabling full enhancement of the high-side N-channel DMOS transistors. This eliminates the need for external bootstrap diodes or capacitors and ensures reliable high-side switching across the full 8–40 V VBB range.
Can the A5988GJPTR-T drive both stepper and DC motors simultaneously?
Yes, the A5988GJPTR-T can concurrently drive two stepper motors (using bridges 1–2 and 3–4) or one stepper plus two DC motors (e.g., bridges 1–2 for stepper, bridges 3–4 for DC). Each bridge operates independently with dedicated VREFx, SENSEx, and control inputs. DC motor mode uses I0x/I1x tied for enable and PHASEx for direction - allowing mixed topologies within a single A5988GJPTR-T device.
A5988GJPTR-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 48-LQFP Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Motor Type - Stepper:
- Bipolar
- Motor Type - AC, DC:
- Brushed DC
- Function:
- Driver - Fully Integrated, Control and Power Stage
- Output Configuration:
- Half Bridge (8)
- Interface:
- PWM
- Technology:
- DMOS
- Step Resolution:
- 1, 1/2, 1/4
- Applications:
- General Purpose
- Current - Output:
- 1.6A
- Voltage - Supply:
- 8V ~ 40V
- Voltage - Load:
- 8V ~ 40V
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-LQFP
A5988GJPTR-T FAQ
1.How can I place an order for A5988GJPTR-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A5988GJPTR-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A5988GJPTR-T reliable?
The price and inventory of A5988GJPTR-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A5988GJPTR-T is usually 5 days.
3.What payment methods are accepted for A5988GJPTR-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A5988GJPTR-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A5988GJPTR-T?
A5988GJPTR-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A5988GJPTR-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A5988GJPTR-T?
For technical support, including A5988GJPTR-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A5988GJPTR-T requirements.
6.How does Aetrix verify that A5988GJPTR-T is sourced from the original manufacturer or authorized distributors?
All A5988GJPTR-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A5988GJPTR-T meets industry standards.
7.What is the process for return or replacement of A5988GJPTR-T?
All A5988GJPTR-T units undergo pre-shipment inspection (PSI). If there is an issue with A5988GJPTR-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A5988GJPTR-T part is unused and in its original packaging.
Return procedure for A5988GJPTR-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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