NXP Semiconductors A5G35H055NT4
- Part No.:
- A5G35H055NT4
- Manufacturer:
- NXP Semiconductors
- Category:
- Single FETs, MOSFETs
- Package:
- -
- Datasheet:
-
A5G35H055NT4.pdf
- Description:
- RF MOSFET LDMOS
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Inventory:9,045
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Product details
Overview
A5G35H055NT4 from NXP Semiconductors is a 7.6 W asymmetrical Doherty RF power GaN amplifier designed for 5G massive MIMO active antenna systems operating in the 3400–3600 MHz band, delivering 15.5 dB typical power gain, 58.0% drain efficiency at 3500 MHz, and –31.9 dBc ACPR under W-CDMA modulation.
For engineers reviewing the A5G35H055NT4 datasheet, A5G35H055NT4 pinout, A5G35H055NT4 application, or A5G35H055NT4 equivalent, this page delivers verified specifications, thermal performance data, ruggedness metrics, biasing sequence guidance, and package-level PCB design constraints for base station RF front-end integration.
Technical Context
This GaN-on-SiC device implements a two-stage asymmetrical Doherty architecture with separate carrier and peaking amplifiers, optimized for wide instantaneous bandwidth (200 MHz) and high output VSWR tolerance. It operates as a depletion-mode amplifier requiring precise gate bias sequencing: VGSA/VGSB must be set to –5 V before applying VDD = 48 Vdc.
Thermal management is defined by RθJC (IR) = 4.1 °C/W and RθCHC (FEA) = 11.0 °C/W, with maximum channel temperature limited to 225 °C. Its DFN 7 × 6.5 mm package integrates an exposed thermal pad and supports reflow soldering per AN1907 guidelines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Frequency Range | 3400–3600 MHz - guaranteed performance across full 200 MHz bandwidth for 5G TDD base stations |
| Output Power | 7.6 W Avg. - linearized output power level supporting 9.9 dB PAR signals in W-CDMA and OFDM waveforms |
| Power Gain | 15.5 dB @ 3500 MHz - sufficient gain to reduce driver stage complexity in multi-element antenna arrays |
| Drain Efficiency | 58.0% @ 3500 MHz - enables high-efficiency operation at 48 Vdc supply, reducing thermal load in dense RF modules |
| ACPR | –31.9 dBc @ 3500 MHz - meets stringent linearity requirements for 5G NR UL transmission without excessive digital predistortion overhead |
| VSWR Tolerance | Withstands extreme broadband VSWR - critical for active antenna systems where mismatch varies dynamically across beamforming states |
| Thermal Resistance | RθJC = 4.1 °C/W - defines minimum heatsink requirement for sustained 7.6 W average power operation |
Pinout & Package
Package: DFN 7 mm × 6.5 mm with exposed thermal pad (pin-compatible with industry-standard 7×6.5 mm DFN footprints). Thermal pad must be soldered to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND | Ground reference and thermal path | Multiple GND pins connect directly to exposed thermal pad; all must be low-inductance soldered to inner/outer ground planes |
| VDDA / VDDB | Drain supply for carrier and peaking paths | Separate drain terminals allow independent decoupling and current monitoring; rated for 48 Vdc continuous operation |
| VGSA / VGSB | Gate bias inputs for carrier and peaking transistors | Depletion-mode control: negative voltage required; bias sequencing must follow strict ON/OFF order per datasheet |
| RF_IN | Differential or single-ended RF input | Internally matched to 50 Ω; requires external DC blocking and ESD protection per AN1907 layout rules |
| RF_OUT | Differential or single-ended RF output | Internally matched to 50 Ω; output power delivered into 50 Ω load; VSWR robustness validated up to 10:1 |
Key Features
| Feature | Design Value |
|---|---|
| Asymmetrical Doherty Architecture | Optimized carrier-to-peaking power ratio enables >58% efficiency at 7.6 W avg. while maintaining linearity across 200 MHz bandwidth |
| High Terminal Impedances | Enables broadband matching without external harmonic traps, simplifying filter design in compact 5G AAU RF modules |
| Wideband Ruggedness | Validated for 400 MHz ISBW at 55 Vdc and 14.2 W modulated output - supports dynamic spectrum sharing and multi-band operation |
| Low-Complexity Linearization Support | Reduced AM/PM distortion (–4° max) and flat gain variation (0.022 dB/°C) minimize DSP resource usage in real-time DPD implementations |
| Massive MIMO Optimized | Thermal and electrical symmetry between carrier/peaking paths ensures consistent beamforming performance across large antenna arrays |
Applications
| 5G Massive MIMO Active Antenna Unit (AAU) | 3.5 GHz TDD Macro Base Station |
|---|---|
|
Use Scenario: Integrated into 64T64R active antenna panels for urban macro coverage with dynamic beamforming and MU-MIMO. IC Role / Device Role / Timing Role: Final-stage RF power amplifier delivering 7.6 W avg. output per chain in dual-polarized element groups. Use Value: High 58% drain efficiency reduces total system power draw and thermal density, enabling higher element count within mechanical envelope constraints. |
Use Scenario: Deployed in outdoor macro cells operating in 3400–3600 MHz TDD bands with 100 MHz channel bandwidth and 9.9 dB PAR signals. IC Role / Device Role / Timing Role: Asymmetrical Doherty PA providing linearized output with <–31.9 dBc ACPR at 3500 MHz under W-CDMA load. Use Value: Eliminates need for external harmonic filters and reduces DPD convergence time due to stable AM/PM behavior (–4° max). |
| Dynamic Spectrum Sharing (DSS) Baseband System | 5G NR FR1 Small Cell Remote Radio Head (RRH) |
|
Use Scenario: Supporting coexistence of LTE and 5G NR in shared 3.5 GHz spectrum using time/frequency multiplexing. IC Role / Device Role / Timing Role: Wide instantaneous bandwidth (200 MHz) and fast gain flatness (0.2 dB over 200 MHz) enable seamless waveform switching. Use Value: Maintains linearity and efficiency across mixed-signal conditions without retuning, reducing control loop latency in DSS schedulers. |
Use Scenario: Used in compact, fanless RRH units deployed on street furniture with strict size and thermal limits. IC Role / Device Role / Timing Role: High-power GaN PA operating at 48 Vdc with RθJC = 4.1 °C/W, enabling 7.6 W avg. output in <10 cm³ volume. Use Value: Exposed thermal pad and DFN package allow direct conduction cooling to aluminum housing, eliminating need for forced air. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar RF power amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| A5G35H050NT4 | Same DFN 7×6.5 package and 3400–3600 MHz range, but rated for 5 W avg. output and lower 52% efficiency at 3500 MHz | Better suited for lower-power RRH or indoor small cells where thermal budget is tighter | Select when system-level output requirement is ≤5 W avg. and cost sensitivity outweighs efficiency gains |
| AFGA35H055NT4 | Same 7.6 W spec and pinout, but uses older Airfast generation with higher RθJC = 5.2 °C/W and no FEA-validated RθCHC | Limited suitability for high-reliability outdoor deployments due to less conservative thermal modeling | Choose only if legacy qualification or existing PCB footprint reuse is mandatory; not recommended for new designs |
Compared with A5G35H055NT4, A5G35H050NT4 trades 2.6 W output and 6% efficiency for lower thermal stress, while AFGA35H055NT4 lacks the updated thermal reliability validation and ruggedness specs critical for next-gen 5G AAUs.
Availability
A5G35H055NT4 is available at Aetrix Electronics and suitable for 5G massive MIMO active antenna units, 3.5 GHz TDD macro base stations, and dynamic spectrum sharing infrastructure requiring stable component supply, long-term lifecycle support, and traceable GaN sourcing.
Supply support for A5G35H055NT4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and communications markets, with deep expertise in RF power technologies.
The Airfast RF Power product line delivers GaN-based amplifiers engineered specifically for cellular infrastructure, emphasizing wide bandwidth, high efficiency, and ruggedness in 5G massive MIMO and active antenna systems.
FAQ
What is the recommended gate bias sequence for A5G35H055NT4 during power-up?
The correct biasing sequence for A5G35H055NT4 is: (1) Set VGSA and VGSB to –5 V, (2) Apply VDD = 48 Vdc to both drains, (3) Increase VGSA until IDQA = 35 mA, (4) Adjust VGSB to –4.6 Vdc, then (5) apply RF input. This prevents gate overvoltage and ensures stable Doherty operation. Deviating from this sequence risks permanent damage to the GaN HEMTs inside A5G35H055NT4.
Does A5G35H055NT4 support operation outside the 3400–3600 MHz band?
No - A5G35H055NT4 is characterized and performance-guaranteed only for 3400–3600 MHz. NXP explicitly states there is no performance guarantee outside this band. Using A5G35H055NT4 at 3300 MHz or 3700 MHz may result in degraded gain, efficiency, or linearity not covered by specification limits.
What thermal interface material is recommended beneath the A5G35H055NT4 exposed pad?
NXP recommends soldering the exposed thermal pad of A5G35H055NT4 directly to a copper thermal pad on the PCB using standard lead-free reflow per AN1907. No additional thermal interface material (TIM) is used - the solder joint provides lowest possible RθJC. Use of gap fillers or greases increases thermal resistance and violates the validated thermal model for A5G35H055NT4.
Can A5G35H055NT4 replace A5G35H050NT4 without PCB changes?
Yes - A5G35H055NT4 shares identical DFN 7×6.5 mm package, pinout, and mounting dimensions with A5G35H050NT4, enabling drop-in replacement. However, A5G35H055NT4 draws higher quiescent current and delivers +2.6 W output, so thermal and power delivery margins must be re-verified in the target design before substituting A5G35H055NT4.
What is the maximum channel temperature limit for A5G35H055NT4, and how is it enforced?
The maximum channel temperature for A5G35H055NT4 is 225 °C, derived from FEA-based RθCHC = 11.0 °C/W modeling. This limit is enforced via junction-to-case thermal design and ambient temperature derating - exceeding it accelerates degradation. MTTF estimation uses TCH in the formula MTTF = 10[–11.1 + 8366/(TCH + 273)], confirming A5G35H055NT4's reliability target under specified thermal conditions.
A5G35H055NT4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- -
- Configuration:
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- Voltage - Test:
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- Current - Test:
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- Voltage - Rated:
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A5G35H055NT4 FAQ
1.How can I place an order for A5G35H055NT4 through Aetrix?
Please submit a Request for Quotation (RFQ) for A5G35H055NT4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A5G35H055NT4 reliable?
The price and inventory of A5G35H055NT4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A5G35H055NT4 is usually 5 days.
3.What payment methods are accepted for A5G35H055NT4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A5G35H055NT4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A5G35H055NT4?
A5G35H055NT4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A5G35H055NT4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A5G35H055NT4?
For technical support, including A5G35H055NT4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A5G35H055NT4 requirements.
6.How does Aetrix verify that A5G35H055NT4 is sourced from the original manufacturer or authorized distributors?
All A5G35H055NT4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A5G35H055NT4 meets industry standards.
7.What is the process for return or replacement of A5G35H055NT4?
All A5G35H055NT4 units undergo pre-shipment inspection (PSI). If there is an issue with A5G35H055NT4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A5G35H055NT4 part is unused and in its original packaging.
Return procedure for A5G35H055NT4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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