Allegro MicroSystems A6285EET-T
- Part No.:
- A6285EET-T
- Manufacturer:
- Allegro MicroSystems
- Category:
- LED Drivers
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
A6285EET-T.pdf
- Description:
- IC LED DRIVER LINEAR 80MA 32QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
A6285EET-T from Allegro MicroSystems is a 16-channel constant-current latched LED driver with open LED detection (LOD), 7-bit dot correction (DC), and active pull-up enable. It operates from 3.0–5.5 V logic supply, supports up to 30 MHz serial data input, delivers up to 80 mA per channel, and features staggered 20 ns output delay to suppress ground bounce in LED display modules.
For engineers reviewing the A6285EET-T datasheet, A6285EET-T pinout, A6285EET-T application, or A6285EET-T equivalent, this device is selected for high-reliability LED signage, full-color displays, and backlighting where per-channel brightness calibration, fault reporting via FAULT/SDO, and cascaded architecture are required.
Technical Context
The A6285EET-T integrates dual independent shift registers-one 16-bit ON/OFF register and one 112-bit dot correction register-both controlled by MODE pin selection. Data latching occurs on LE rising edge, with clocked serial input (SDI) synchronized to CLK↑ and output (SDO) supporting daisy-chained fault/status readback.
Its constant-current sink outputs use an external REXT resistor to set maximum current (IO(max) = 38.4 × VEXT/REXT, VEXT ≈ 1.23 V), while LOD detection samples OUTx voltage < 0.4 V after turn-on and flags faults via open-drain FAULT. Thermal shutdown triggers at TJ ≥ 165°C with 15°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Channels | 16 constant-current sink drivers with individual ON/OFF and 7-bit dot correction control |
| Max Output Current | 80 mA per channel (typical, REXT = 600 Ω); adjustable down to 40 mA (REXT = 1.2 kΩ) |
| Serial Interface Speed | Up to 30 MHz CLK frequency; supports cascading via SDO-to-SDI connection |
| Dot Correction Resolution | 7-bit per channel (128 steps, 0–100% of IO(max)), enabling precise LED brightness matching |
| Open LED Detection | Detects open-circuit condition on any OUTx when VOUTx < 0.4 V; status readable via SDO |
| Fault Reporting | Open-drain FAULT pin asserts low for LOD or thermal shutdown (TSD); supports wired-OR of multiple devices |
| Staggered Output Delay | 20 ns typical delay between consecutive OUTx transitions, reducing simultaneous switching noise and ground bounce |
Pinout & Package
Package: 32-pin QFN (5 mm × 5 mm, 0.9 mm height), exposed thermal pad (PAD), lead-free with matte tin plating. Designed for high-power dissipation (RθJA = 32°C/W on 4-layer PCB).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SDI (1) | Serial Data Input | Primary serial interface input; MSB-first data accepted during MODE-selected register operation |
| OUT0–OUT15 (3–4,6–16,17–22) | Constant-Current Sink Outputs | 16 individually controllable LED drive channels; each sinks up to 80 mA with matched accuracy ±4.4% |
| CLK (32) | Data Shift Clock | Rising-edge triggered; shifts data into selected register (ON/OFF or DC) based on MODE state |
| LE (31) | Latch Enable | Rising edge latches serial data into ON/OFF or DC register; also transfers LOD status to SDO path |
| MODE (26) | Register Mode Select | Low = ON/OFF register access (16-bit); High = Dot Correction register access (112-bit) |
| OE (30) | Output Enable | Active-low global disable; forces all OUTx OFF regardless of latch state; supports PWM dimming |
| FAULT (25) | Fault Flag Output | Open-drain output pulled low for LOD or TSD; requires external pull-up to VDD |
| SDO (24) | Serial Data Output | Reads back LOD status bits or cascaded data; supports daisy-chain configuration |
| REXT (27) | Reference Current Terminal | Connects external resistor to set max output current (IO(max) = 38.4 × VEXT/REXT) |
| PE (23) | Pull-up Enable | Tied to VLED = enables active pull-ups (2.8 mA typ); tied to PGND = disables them |
| VDD (28) | Logic Supply | 3.0–5.5 V CMOS-compatible supply powering shift registers, latches, and control logic |
| VLED (19,20,21,22) | LED Load Supply | Accepts up to 13.2 V; powers LED anodes; must be decoupled with 10 μF capacitor per 2 devices |
| PGND (5,10,15,20) | Power Ground | Dedicated ground pins for high-current sink paths; separate from logic GND (pin 29) for noise isolation |
| GND (29) | Logic Ground | Reference for VDD, digital inputs, and internal logic; kept separate from PGND per layout guidelines |
| PAD | Exposed Thermal Pad | Not electrically connected; must be soldered to large copper ground plane for thermal management |
Key Features
| Feature | Design Value |
|---|---|
| 7-bit per-channel dot correction | Enables precise brightness uniformity across 16 LEDs without external DACs or resistors |
| Integrated open LED detection (LOD) | Identifies open-circuit failures on any channel and reports status via SDO/FAULT without host polling overhead |
| 20 ns staggered output timing | Reduces peak ground current by sequencing turn-on/off, lowering bypass capacitor requirements and EMI |
| Active pull-up enable (PE) | Eliminates ghosting in multiplexed displays by providing controlled anode-side pull-up current (2.8 mA typ) |
| Thermal shutdown with hysteresis | Disables outputs at TJ ≥ 165°C and re-enables only after 15°C cooldown, preventing thermal cycling damage |
| Schmitt-trigger digital inputs | Provides 250–900 mV hysteresis on CLK, SDI, LE, MODE, OE for robust noise immunity in industrial environments |
Applications
| Full-Color LED Video Wall | Outdoor LED Signboard |
|---|---|
Use Scenario: Large-area outdoor display using RGB LED modules with high pixel density and ambient light compensation. IC Role / Device Role / Timing Role: A6285EET-T drives 16 RGB sub-pixels per IC; dot correction calibrates color balance; LOD ensures reliability in unattended installations. Use Value: Eliminates manual LED binning; reduces field failure rate via real-time open-circuit detection and FAULT flagging. |
Use Scenario: Commercial signage with variable message content, operating 24/7 under wide temperature (-40°C to +85°C) and humidity conditions. IC Role / Device Role / Timing Role: A6285EET-T provides constant-current sinking for monochrome or multicolor segments; thermal shutdown protects against enclosure overheating. Use Value: Enables long-term maintenance-free operation; active pull-ups prevent ghosting during multiplexed scanning. |
| Automotive Interior Backlighting | Industrial HMI Display Panel |
Use Scenario: Dashboard and infotainment backlighting requiring dimming, color consistency, and ASIL-B–compatible fault reporting. IC Role / Device Role / Timing Role: A6285EET-T controls white LED strings; OE pin supports PWM dimming; FAULT pin feeds safety monitor circuitry. Use Value: Meets automotive EMC and thermal requirements; LOD detection satisfies functional safety diagnostics for lighting systems. |
Use Scenario: Factory-floor operator interface with high-brightness LED indicators subject to vibration, dust, and electrical noise. IC Role / Device Role / Timing Role: A6285EET-T drives status LEDs with Schmitt-trigger inputs rejecting noise; cascaded SDO/SDI simplifies wiring in modular panels. Use Value: Reduces BOM count by integrating current setting, fault detection, and serial control in single QFN package. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar constant-current LED driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLC5940RTQR | 16-channel, 12-bit PWM + 6-bit DC; no LOD detection; requires external reference; 28-pin QFN | Higher grayscale resolution but lacks integrated open-circuit fault reporting and thermal shutdown | Select when fine-grained PWM dimming outweighs fault diagnostics and thermal protection needs |
| MAX7219CWG+ | 8-digit/64-segment LED driver; 4-wire SPI interface; built-in BCD decode; no dot correction or LOD | Targeted at numeric/segment displays, not general-purpose constant-current LED arrays | Select only for 7-segment or matrix displays requiring minimal MCU GPIO usage |
Compared with TLC5940RTQR and MAX7219CWG+, the A6285EET-T uniquely combines per-channel 7-bit dot correction, open LED detection, thermal shutdown, and active pull-up enable in a single 32-pin QFN-making it optimal for high-reliability, serviceable LED display systems where fault visibility and brightness uniformity are critical.
Availability
A6285EET-T is available at Aetrix Electronics and suitable for full-color LED video walls, outdoor signboards, and automotive interior backlighting requiring stable component supply, long-lifecycle support, and traceable sourcing.
Supply support for A6285EET-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer and manufacturer of high-performance magnetic sensing and power IC solutions, founded in 1989 and headquartered in Worcester, Massachusetts.
The A6285EET-T belongs to Allegro's constant-current LED driver product line, engineered specifically for high-density, high-reliability LED display applications demanding integrated diagnostics, brightness calibration, and thermal resilience.
FAQ
What is the maximum LED load supply voltage supported by the A6285EET-T?
The A6285EET-T supports a VLED range up to 13.2 V, as specified in its Absolute Maximum Ratings. However, for reliable thermal performance, Allegro recommends limiting VLED to ≤12.0 V under normal operation and ensuring VDS remains within 1.0–3.0 V to avoid excessive package power dissipation. The actual usable VLED depends on LED forward voltage and series drop design.
How does the A6285EET-T implement dot correction, and what is its resolution?
The A6285EET-T implements dot correction using a dedicated 112-bit shift register (16 channels × 7 bits), allowing independent adjustment of each output current from 0% to 100% of IO(max) in 128 discrete steps. Dot correction data is loaded in MODE = High mode, with MSB-first serial input followed by a rising-edge LE pulse to latch values into the DC register.
Can the A6285EET-T detect open LEDs while actively driving the display?
Yes-the A6285EET-T performs open LED detection (LOD) dynamically during normal operation. When OE is low and outputs are enabled, LOD sampling occurs within 2 μs after turn-on. Detected faults are flagged on FAULT and made readable via SDO on the next LE cycle, enabling real-time diagnostics without interrupting display updates.
What is the function of the PE pin on the A6285EET-T, and how should it be connected?
The PE (Pull-up Enable) pin controls internal active pull-ups on each OUTx channel. Connect PE to VLED to enable ~2.8 mA pull-up current per output (prevents ghosting in multiplexed displays); connect PE to PGND to disable them. PE must never be left floating, and its state is sampled at power-up to configure initial pull-up behavior.
Does the A6285EET-T require external components for basic operation, and which ones are mandatory?
Yes-the A6285EET-T requires three mandatory external components: (1) REXT resistor (≥600 Ω) between REXT pin and PGND to set output current; (2) external pull-up resistor on FAULT (open-drain); and (3) decoupling capacitors-0.1 μF on VDD and 10 μF on VLED near the device. Optional but recommended: pull-up on SDO for cascaded configurations.
A6285EET-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Obsolete
- Type:
- Linear
- Topology:
- Shift Register
- Internal Switch(s):
- Yes
- Number of Outputs:
- 16
- Voltage - Supply (Min):
- 3V
- Voltage - Supply (Max):
- 5.5V
- Voltage - Output:
- 12V
- Current - Output / Channel:
- 80mA
- Frequency:
- 30MHz
- Dimming:
- -
- Applications:
- Backlight
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
A6285EET-T FAQ
1.How can I place an order for A6285EET-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A6285EET-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A6285EET-T reliable?
The price and inventory of A6285EET-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A6285EET-T is usually 5 days.
3.What payment methods are accepted for A6285EET-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A6285EET-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A6285EET-T?
A6285EET-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A6285EET-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A6285EET-T?
For technical support, including A6285EET-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A6285EET-T requirements.
6.How does Aetrix verify that A6285EET-T is sourced from the original manufacturer or authorized distributors?
All A6285EET-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A6285EET-T meets industry standards.
7.What is the process for return or replacement of A6285EET-T?
All A6285EET-T units undergo pre-shipment inspection (PSI). If there is an issue with A6285EET-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A6285EET-T part is unused and in its original packaging.
Return procedure for A6285EET-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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