Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Voltage Regulators - DC DC Switching Regulators

Allegro MicroSystems A81805KESJSR

Name: A81805KESJSR
Brand: Allegro MicroSystems
SKU: A81805KESJSR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: A81805KESJSR

Manufacturer:: Allegro MicroSystems

Category:: Voltage Regulators - DC DC Switching Regulators

Package:: 20-VFQFN Exposed Pad

Datasheet:: A81805KESJSR.pdf

Description:: IC REG BUCK 3.3V 2.5A 20QFN

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:12,000

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

A81805KESJSR from Allegro MicroSystems is a 40 V, 2.5 A synchronous buck regulator with fixed 3.3 V output, ±1.5% accuracy over −40°C to 150°C, 6 µA no-load quiescent current, and low-EMI spread-spectrum operation - designed for automotive infotainment and ADAS power rails.

For engineers reviewing the A81805KESJSR datasheet, A81805KESJSR pinout, A81805KESJSR application, or A81805KESJSR equivalent, key selection considerations include its AEC-Q100 Grade 0 qualification, 3.5–36 V input range, 2.2 MHz default switching frequency (FSET-to-VCC), programmable SYNC synchronization, and integrated loop compensation eliminating three external components.

Technical Context

The A81805KESJSR employs fixed-frequency peak current-mode control with internal slope compensation and programmable switching frequency (400 kHz–2.5 MHz) via FSET resistor or external SYNC clock. Its dual LDO-based VCC generation (VIN- and VOUT-powered) ensures robust startup and regulation across wide input transients.

It integrates 170 mΩ high-side and 130 mΩ low-side N-channel MOSFETs, supports pre-bias startup, features ultra-low IQ LP mode with automatic PWM/LP transition at ~700 mA peak inductor current, and implements comprehensive fault handling including hiccup-mode short-circuit protection, BOOT voltage monitoring, and thermal shutdown with 170°C trip threshold.

Key Specifications

Parameter	Value and Actual Design Meaning
V_IN Range	3.5 V to 36 V operating; withstands 40 V transient - enables direct battery connection in 12 V/24 V automotive systems without external TVS.
V_OUT	3.3 V ±1.5% over −40°C to 150°C - meets tight rail tolerance for MCU cores and interface ICs in harsh environments.
I_OUT Continuous	2.5 A - sufficient for powering multi-core SoCs, display controllers, or sensor fusion modules.
I_Q (No Load)	6 µA from VIN - extends battery life in always-on telematics or container tracking systems.
f_SW Default	2.2 MHz (FSET tied to VCC) - allows compact 2.2 µH inductors and avoids AM band interference.
EMI Mitigation	Spread-spectrum dithering (±5% f_SW) + optimized SW node layout - helps pass CISPR25 Class 5 conducted/radiated emissions.
Protection	Pulse-by-pulse current limit, hiccup-mode short-circuit, BOOT OV/UV, V_OUT OVP/UVP, thermal shutdown (170°C), and pin-fault robustness - reduces need for external supervision circuitry.

Pinout & Package

Supplied in a thermally enhanced 20-pin wettable flank QFN package (4 mm × 4 mm × 0.75 mm, exposed thermal pad), optimized for automotive PCB assembly and thermal dissipation on 4-layer boards (R_θJA = 31°C/W on eval board).

Pin/Terminal	Circuit Role	Design Meaning
1 VOUT	Output voltage feedback and VCC LDO supply	Connects directly to regulated 3.3 V rail; powers internal analog circuitry once output is in regulation.
3 GND	Analog ground reference	Separate from PGND pins; must be routed to quiet AGND plane to minimize noise coupling into error amplifier.
4 FSET	Switching frequency programming	Resistor to GND sets f_SW; tie to VCC for fixed 2.2 MHz - eliminates timing component count and improves EMI consistency.
5 SYNC	External clock synchronization input	Accepts 400 kHz–2.5 MHz clock with 20–70% duty cycle; forces PWM mode and applies dither to external clock - enables system-level EMI coordination.
6,7 PGND	Power ground return paths	Low-inductance connections to thermal pad and input/output capacitors - critical for minimizing ground bounce during high di/dt switching.
9–11 VIN	Main input voltage supply	Three parallel pins reduce resistance and inductance; requires local 100 nF ceramic capacitor placement within 2 mm for stable high-frequency decoupling.
12 EN	Hysteretic enable control	1.2 V typical threshold with 200 mV hysteresis; draws only 1 µA in shutdown - enables precise undervoltage brown-out control without external comparator.
13 PGOOD	Open-drain power-good status	Asserts low if V_OUT deviates >±5% (3.05–3.55 V); includes 30 µs startup delay and 120 µs UV response - provides reliable sequencing signal for downstream logic.
15 VCC	Internal regulator bypass	Requires 4.7 µF ceramic cap to PGND; supplies gate drivers and control logic - decoupling here prevents boot instability and false fault triggering.
16 BOOT	High-side MOSFET gate drive supply	Connected via 100 nF ceramic cap to SW; maintains ~3.4 V gate drive headroom - ensures full enhancement of 170 mΩ HS-FET even at low V_IN.
17–20 SW	Switch node outputs	Four parallel pins reduce trace inductance and EMI radiation; must be kept as small-area copper pour connected directly to inductor - minimizes voltage spikes and ringing.
PAD	Exposed thermal pad	Must be soldered to solid PGND plane; accounts for >75% of total heat transfer - essential for maintaining T_J < 150°C at 2.5 A continuous load.

Key Features

Feature	Design Value
Integrated loop compensation	Eliminates three external RC components - reduces BOM count, layout area, and tuning effort while maintaining stability across 10:1 load steps.
Pre-bias startup capability	Allows safe start-up into pre-charged output capacitors - prevents reverse current flow and protects downstream loads in hot-swap or redundant power systems.
Maximized duty cycle at low V_IN	Extends conduction time during cold-crank (down to ~4.5 V) - sustains 3.3 V output without dropout in automotive cranking scenarios.
Robust FMEA coverage	Detects pin open/short faults and internal component failures - meets ASIL-B functional safety requirements for instrument cluster and ADAS subsystems.
Ultra-low IQ LP mode	6 µA input current at no load with automatic PWM-to-LP transition - enables years of operation on coin-cell backup in telematics or remote sensors.

Applications

Infotainment Systems	Instrument Clusters
Use Scenario: Powering display controllers, audio codecs, and touch processors in automotive head units with 12 V battery input. IC Role / Device Role / Timing Role: Primary 3.3 V point-of-load regulator delivering up to 2.5 A with fast transient response to dynamic CPU load changes. Use Value: 92% efficiency at 12 V → 3.3 V/1 A/2 MHz reduces thermal stress in sealed enclosures; spread spectrum meets OEM EMI targets without added shielding.	Use Scenario: Supplying microcontroller, CAN transceivers, and TFT LCD bias in digital dashboards operating across −40°C to 105°C ambient. IC Role / Device Role / Timing Role: AEC-Q100 Grade 0 qualified DC-DC converter providing stable 3.3 V rail with ±1.5% accuracy over full junction temperature range. Use Value: 170°C thermal shutdown and hiccup-mode protection prevent latch-up during overtemperature events; wettable flank QFN ensures solder joint reliability in thermal cycling.
ADAS Camera Modules	Industrial Control Panels
Use Scenario: Powering image signal processors and high-speed serializers in surround-view camera ECUs exposed to engine bay temperatures. IC Role / Device Role / Timing Role: High-efficiency synchronous buck regulator with pre-bias startup supporting hot-plug insertion into live 12 V bus. Use Value: 6 µA quiescent current extends sleep-mode battery life; 40 V transient rating handles load-dump surges without external clamping diodes.	Use Scenario: Regulating 3.3 V for PLC I/O modules and HMI controllers in factory automation equipment with 24 V DC supply. IC Role / Device Role / Timing Role: Robust industrial-grade buck converter featuring wide 3.5–36 V input range and integrated protection against reverse polarity and overvoltage faults. Use Value: Internal VCC LDO powered from VOUT enables reliable restart after brown-out; SYNC pin allows synchronization to master clock for deterministic EMI behavior in multi-rail systems.

Infotainment Systems

Instrument Clusters

Use Scenario: Powering display controllers, audio codecs, and touch processors in automotive head units with 12 V battery input.

IC Role / Device Role / Timing Role: Primary 3.3 V point-of-load regulator delivering up to 2.5 A with fast transient response to dynamic CPU load changes.

Use Value: 92% efficiency at 12 V → 3.3 V/1 A/2 MHz reduces thermal stress in sealed enclosures; spread spectrum meets OEM EMI targets without added shielding.

Use Scenario: Supplying microcontroller, CAN transceivers, and TFT LCD bias in digital dashboards operating across −40°C to 105°C ambient.

IC Role / Device Role / Timing Role: AEC-Q100 Grade 0 qualified DC-DC converter providing stable 3.3 V rail with ±1.5% accuracy over full junction temperature range.

Use Value: 170°C thermal shutdown and hiccup-mode protection prevent latch-up during overtemperature events; wettable flank QFN ensures solder joint reliability in thermal cycling.

ADAS Camera Modules

Industrial Control Panels

Use Scenario: Powering image signal processors and high-speed serializers in surround-view camera ECUs exposed to engine bay temperatures.

IC Role / Device Role / Timing Role: High-efficiency synchronous buck regulator with pre-bias startup supporting hot-plug insertion into live 12 V bus.

Use Value: 6 µA quiescent current extends sleep-mode battery life; 40 V transient rating handles load-dump surges without external clamping diodes.

Use Scenario: Regulating 3.3 V for PLC I/O modules and HMI controllers in factory automation equipment with 24 V DC supply.

IC Role / Device Role / Timing Role: Robust industrial-grade buck converter featuring wide 3.5–36 V input range and integrated protection against reverse polarity and overvoltage faults.

Use Value: Internal VCC LDO powered from VOUT enables reliable restart after brown-out; SYNC pin allows synchronization to master clock for deterministic EMI behavior in multi-rail systems.

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck regulator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MPQ4420AGL-A-Z	36 V max input, 2 A output, 500 kHz–3 MHz f_SW, no spread spectrum, 17 µA I_Q	Lacks AEC-Q100 qualification and automotive thermal grade; suitable for industrial but not safety-critical automotive use.	Select when cost sensitivity outweighs automotive qualification needs and EMI margin is available.
TPS54560QDGQRQ1	60 V max input, 5 A output, 100 kHz–2.5 MHz f_SW, no integrated compensation, 14 µA I_Q	Requires external compensation network; higher I_Q and larger solution size; AEC-Q100 Grade 1 (−40°C to 125°C) only.	Choose when higher output current or wider input range is required and layout space permits additional components.

Compared with MPQ4420AGL-A-Z and TPS54560QDGQRQ1, the A81805KESJSR delivers superior automotive readiness (Grade 0, 150°C T_J), lowest quiescent current (6 µA), and smallest footprint due to integrated compensation - making it optimal for space-constrained, always-on automotive modules where EMI and thermal performance are critical.

Availability

A81805KESJSR is available at Aetrix Electronics and suitable for automotive infotainment, ADAS camera systems, and industrial control panels requiring stable component supply with AEC-Q100 compliance and long-term production support.

Supply support for A81805KESJSR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Allegro MicroSystems is a U.S.-based semiconductor company specializing in high-performance power ICs and magnetic sensors for automotive and industrial markets.

The A81805 product line delivers high-efficiency, low-EMI synchronous buck regulators targeting demanding automotive power rails - designed specifically for infotainment, instrument clusters, and ADAS subsystems requiring AEC-Q100 Grade 0 reliability.

FAQ

What is the maximum input voltage the A81805KESJSR can withstand without damage?

The A81805KESJSR has an absolute maximum input voltage rating of 40 V for transient conditions, with continuous operation supported from 3.5 V to 36 V. This 40 V rating enables direct connection to automotive 12 V and 24 V battery systems without external transient voltage suppression, covering standard load-dump events per ISO 7637-2.

Does the A81805KESJSR support synchronization to an external clock, and what are the valid frequency and duty cycle ranges?

Yes, the A81805KESJSR supports synchronization via its SYNC pin across 400 kHz to 2.5 MHz with 20–70% duty cycle and minimum 80 ns pulse width. When synchronized, the device operates in forced PWM mode with dither applied to the external clock - enabling deterministic EMI reduction in multi-converter systems.

How does the A81805KESJSR achieve ultra-low quiescent current, and what is its no-load input current?

The A81805KESJSR achieves 6 µA no-load input current through its proprietary Low Power (LP) mode, which shuts down switching and control circuitry while maintaining output regulation via a hysteretic comparator. This mode activates automatically below ~700 mA peak inductor current and is validated at 12 V input and 25°C junction temperature.

Is the A81805KESJSR qualified for automotive applications, and what is its temperature rating?

Yes, the A81805KESJSR is AEC-Q100 Grade 0 qualified, rated for operation from −40°C to +150°C junction temperature. Its thermal shutdown triggers at 170°C with 20°C hysteresis, and all electrical parameters - including ±1.5% output voltage accuracy - are guaranteed across this full range, meeting stringent automotive reliability requirements.

What package type and thermal characteristics does the A81805KESJSR use?

The A81805KESJSR uses a 20-pin wettable flank QFN package (4 mm × 4 mm × 0.75 mm) with exposed thermal pad. On Allegro's evaluation board, it achieves R_θJC = 8°C/W and R_θJA = 31°C/W, enabling 2.5 A continuous output with minimal heatsinking when the thermal pad is fully soldered to a solid PGND plane.

A81805KESJSR Specifications

Product attributes: Attribute value

Manufacturer:: Allegro MicroSystems

Series:: -

Package/Case:: 20-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Function:: Step-Down

Output Configuration:: Positive

Topology:: Buck

Output Type:: Fixed

Number of Outputs:: 1

Voltage - Input (Min):: 3.5V

Voltage - Input (Max):: 36V

Voltage - Output (Min/Fixed):: 3.3V

Voltage - Output (Max):: -

Current - Output:: 2.5A

Frequency - Switching:: 400kHz ~ 2.5MHz

Synchronous Rectifier:: Yes

Operating Temperature:: -40°C ~ 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount, Wettable Flank

Supplier Device Package:: 20-QFN (4x4)

A81805KESJSR FAQ

1.How can I place an order for A81805KESJSR through Aetrix?

Please submit a Request for Quotation (RFQ) for A81805KESJSR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for A81805KESJSR reliable?

The price and inventory of A81805KESJSR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A81805KESJSR is usually 5 days.

3.What payment methods are accepted for A81805KESJSR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A81805KESJSR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for A81805KESJSR?

A81805KESJSR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your A81805KESJSR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for A81805KESJSR?

For technical support, including A81805KESJSR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A81805KESJSR requirements.

6.How does Aetrix verify that A81805KESJSR is sourced from the original manufacturer or authorized distributors?

All A81805KESJSR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A81805KESJSR meets industry standards.

7.What is the process for return or replacement of A81805KESJSR?

All A81805KESJSR units undergo pre-shipment inspection (PSI). If there is an issue with A81805KESJSR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The A81805KESJSR part is unused and in its original packaging.

Return procedure for A81805KESJSR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…