Allegro MicroSystems A8585KLKTR-T-1
- Part No.:
- A8585KLKTR-T-1
- Manufacturer:
- Allegro MicroSystems
- Package:
- 10-LSOP (0.154", 3.90mm Width) Exposed Pad
- Datasheet:
-
A8585KLKTR-T-1.pdf
- Description:
- IC REG BUCK 3.3V 2A 10SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
A8585KLKTR-T-1 from Allegro MicroSystems is a wide-input, 2 A synchronous buck regulator with fixed 3.3 V ±1.0% output, integrated 110 mΩ high-side MOSFET, and selectable PWM/Low-IQ PFM operation mode - designed for automotive infotainment power rails requiring stable low-noise 3.3 V supply under 4–35 V input.
For engineers reviewing the A8585KLKTR-T-1 datasheet, A8585KLKTR-T-1 pinout, A8585KLKTR-T-1 application, or A8585KLKTR-T-1 equivalent, key selection considerations include its 3.3 V fixed output accuracy, ≤10 µA Low-IQ PFM quiescent current at no load, 10-pin SOIC-LK thermal package, automotive AEC-Q100 qualification, and compatibility with pre-biased startup and external synchronization.
Technical Context
The A8585KLKTR-T-1 implements current-mode control with external compensation (COMP pin), enabling stable loop tuning across ceramic or electrolytic output capacitors. Its dual-mode operation - forced PWM via PWM/PFM pin high or automatic transition to Low-IQ PFM after 2048 clock cycles when lightly loaded - ensures optimal efficiency across load ranges from 0 µA to 2 A.
Protection architecture includes pulse-by-pulse overcurrent limiting (3.5 A typ), hiccup-mode short-circuit response, BOOT open/short detection, VIN undervoltage lockout (3.6 V rising threshold), and thermal shutdown (170 °C). The NPOR output provides active-low power-on reset with 7.5 ms delay referenced to regulated VOUT.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.3 V ±1.0% (–40°C to 150°C), enabling precise logic rail regulation without external feedback resistors. |
| Max Output Current | 2 A continuous, supported by integrated 110 mΩ high-side MOSFET and thermally enhanced SOIC-10EP package. |
| Input Voltage Range | 4.0 V to 35 V, covering automotive battery transients including 40 V load dump tolerance via external protection design. |
| Low-IQ Mode Current | 7 µA (typ) at 12 VIN/3.3 VOUT, no load, 25°C - enabling always-on subsystems with ultra-low standby power. |
| Switching Frequency | Adjustable 300–550 kHz (via RFSET), extendable to 605 kHz with external sync - balancing EMI, inductor size, and light-load efficiency. |
| Soft Start Time | Fixed 5 ms internal ramp - preventing inrush current and ensuring monotonic VOUT rise during pre-biased startup. |
| Operating Temp | –40°C to +150°C junction temperature - validated for under-hood automotive environments per AEC-Q100 Grade 1. |
Pinout & Package
Package: 10-pin SOIC with exposed thermal pad (suffix LK), lead-free, matte-tin plated - requires minimum 6 vias to PCB ground plane for thermal performance (RθJA = 35 °C/W on 4-layer JEDEC board).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 - VIN | Power input for control circuitry and high-side MOSFET drain | Accepts 4–35 V input; must be decoupled with high-frequency ceramic capacitor placed near pins. |
| 3 - PWM/PFM | Mode selection control input | High = forced PWM; low = enables Low-IQ PFM after 2048 clocks if load is light and no sync signal present. |
| 4 - FSET/SYNC | Frequency setting and external clock input | Resistor-to-GND sets fSW; external clock overrides PWM/PFM state and synchronizes switching. |
| 5 - VOUT | Regulated output and feedback node | Connects to output capacitor and internal voltage divider; kelvin connection recommended for accuracy. |
| 6 - NPOR | Active-low power-on reset output | Open-drain; asserts low until VOUT reaches regulation and holds for 7.5 ms (typ) before releasing. |
| 7 - COMP | Error amplifier output and compensation node | External RZ/CZ/CP network sets loop stability; supports wide range of output capacitor types. |
| 8 - GND | Analog and power ground reference | Must be connected to PCB ground plane; shared with exposed thermal pad for thermal and noise integrity. |
| 9 - SW | Switch node (high-side MOSFET source) | Connects to external diode cathode and inductor; requires short, wide trace routing to minimize EMI and losses. |
| 10 - BOOT | High-side gate drive bootstrap supply | 47 nF ceramic capacitor between BOOT and SW required to sustain high-side MOSFET gate drive. |
| PAD - Exposed Pad | Thermal and electrical ground connection | Must be soldered to PCB ground plane with ≥6 thermal vias; critical for RθJA and reliability at full 2 A load. |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 qualified | Validated for automotive applications including instrument clusters and infotainment systems across –40°C to +150°C. |
| Pre-biased startup capability | VOUT rises monotonically even when output capacitor is pre-charged - prevents reverse current and system instability. |
| EMI reduction features | Integrated frequency dithering and controlled SW node slew rate (0.72 V/ns typ) reduce peak radiated emissions. |
| External synchronization | FSET/SYNC pin accepts 375–605 kHz external clock - enabling multi-rail timing alignment and deterministic EMI management. |
| Stable with ceramic or electrolytic capacitors | Compensation flexibility eliminates need for specific capacitor chemistry - simplifies BOM and improves supply chain resilience. |
Applications
| Instrument Clusters | Audio Systems |
|---|---|
Use Scenario: Powering microcontroller, display driver, and CAN transceiver in digital instrument cluster with cold-cranking support down to 3.6 VIN. IC Role / Device Role / Timing Role: Primary 3.3 V buck regulator supplying logic and interface rails; delivers regulated output during engine start-stop cycles. Use Value: ±1.0% output accuracy ensures reliable MCU operation; Low-IQ PFM mode draws only 7 µA in vehicle sleep state. | Use Scenario: Supplying DSP, ADC, and DAC in premium car audio head unit with stringent noise and transient requirements. IC Role / Device Role / Timing Role: High-efficiency 3.3 V power stage with external sync capability to align switching with audio clock domain and suppress beat frequencies. Use Value: Adjustable 300–550 kHz fSW avoids sensitive audio bands; EMI dithering reduces narrowband emissions affecting analog audio paths. |
| Navigation Systems | HVAC Control Units |
Use Scenario: Providing clean 3.3 V supply to GPS module, touchscreen controller, and wireless connectivity IC in embedded navigation system. IC Role / Device Role / Timing Role: Fixed-output buck regulator with NPOR output used to sequence processor boot and peripheral initialization. Use Value: 7.5 ms NPOR delay ensures stable VOUT before host MCU release from reset; pre-biased startup prevents brownout during hot-plug events. | Use Scenario: Powering HVAC microcontroller, sensor interface, and motor driver logic in climate control module operating across battery voltage extremes. IC Role / Device Role / Timing Role: Robust 3.3 V regulator tolerant of 40 V load dump transients and functional down to 3.4 VIN (typ) for idle-stop operation. Use Value: Integrated protection (hiccup OCP, UVLO, TSD) eliminates need for discrete fault management circuitry - reducing board area and cost. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| A8586KEJTR-T | Successor device with improved 3.3 V version; lower RDS(on) (90 mΩ), wider fSW range (200–2200 kHz), and enhanced light-load efficiency. | Direct replacement path recommended by Allegro for new designs; supports same SOIC-10EP footprint but requires updated compensation. | Select A8586KEJTR-T for new designs requiring longer product lifecycle, higher efficiency, or programmable soft-start. |
| LM61480RQRJR | TI 3.3 V fixed-output buck (2.5 A); no Low-IQ PFM mode; uses internal compensation; lacks AEC-Q100 qualification. | Suitable for industrial or consumer applications where automotive qualification and ultra-low standby current are not required. | Choose LM61480RQRJR only for non-automotive use cases where simplified layout (no COMP network) and higher output current margin are priorities. |
Compared with A8585KLKTR-T-1, A8586KEJTR-T offers superior thermal performance and broader frequency flexibility while maintaining pin compatibility and automotive qualification; LM61480RQRJR provides higher current and simpler design but lacks automotive compliance and ultra-low IQ operation.
Availability
A8585KLKTR-T-1 is available at Aetrix Electronics and suitable for automotive instrument clusters, infotainment systems, navigation units, and HVAC control modules requiring stable component supply despite end-of-life status.
Supply support for A8585KLKTR-T-1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based designer and manufacturer of high-performance power ICs and magnetic sensors, specializing in automotive and industrial motion control solutions.
The A8585 family was developed specifically for next-generation car audio and infotainment systems, delivering high-current, wide-input, low-quiescent-power regulation with comprehensive automotive-grade protection and AEC-Q100 qualification.
FAQ
What is the output voltage specification of the A8585KLKTR-T-1?
The A8585KLKTR-T-1 provides a fixed 3.3 V output with ±1.0% accuracy over temperature (–40°C to +150°C junction), verified by characterization and specified in the Electrical Characteristics table. This tight tolerance ensures reliable operation of 3.3 V logic, communication interfaces, and analog peripherals without external feedback adjustment.
Is the A8585KLKTR-T-1 still in production?
No - the A8585KLKTR-T-1 is discontinued. Allegro MicroSystems announced end-of-life effective September 30, 2024. It is no longer available for new designs, and samples are unavailable. A8586KEJTR-T is the officially recommended replacement part.
Does the A8585KLKTR-T-1 support pre-biased startup?
Yes, the A8585KLKTR-T-1 supports pre-biased startup: VOUT increases monotonically even when the output capacitor is initially charged. This prevents reverse current flow through the internal high-side MOSFET and ensures safe power sequencing in systems with multiple regulated rails.
What is the Low-IQ PFM quiescent current of the A8585KLKTR-T-1?
At 12 VIN, 3.3 VOUT, and no load, the A8585KLKTR-T-1 draws 7 µA (typ) in Low-IQ PFM mode at 25°C, rising to 12 µA at 65°C. This ultra-low current enables always-on functionality in automotive body electronics and infotainment standby modes.
What package type does the A8585KLKTR-T-1 use?
The A8585KLKTR-T-1 uses a 10-pin SOIC package with exposed thermal pad (suffix LK), RoHS-compliant and lead-free, with 100% matte-tin leadframe plating. Thermal performance requires direct connection of the exposed pad to PCB ground plane using at least six thermal vias.
A8585KLKTR-T-1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 10-LSOP (0.154", 3.90mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4V
- Voltage - Input (Max):
- 35V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Current - Output:
- 2A
- Frequency - Switching:
- 300kHz ~ 550kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-SOIC
A8585KLKTR-T-1 FAQ
1.How can I place an order for A8585KLKTR-T-1 through Aetrix?
Please submit a Request for Quotation (RFQ) for A8585KLKTR-T-1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A8585KLKTR-T-1 reliable?
The price and inventory of A8585KLKTR-T-1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A8585KLKTR-T-1 is usually 5 days.
3.What payment methods are accepted for A8585KLKTR-T-1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A8585KLKTR-T-1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A8585KLKTR-T-1?
A8585KLKTR-T-1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A8585KLKTR-T-1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A8585KLKTR-T-1?
For technical support, including A8585KLKTR-T-1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A8585KLKTR-T-1 requirements.
6.How does Aetrix verify that A8585KLKTR-T-1 is sourced from the original manufacturer or authorized distributors?
All A8585KLKTR-T-1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A8585KLKTR-T-1 meets industry standards.
7.What is the process for return or replacement of A8585KLKTR-T-1?
All A8585KLKTR-T-1 units undergo pre-shipment inspection (PSI). If there is an issue with A8585KLKTR-T-1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A8585KLKTR-T-1 part is unused and in its original packaging.
Return procedure for A8585KLKTR-T-1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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