Allegro MicroSystems A8654KLPTR-T
- Part No.:
- A8654KLPTR-T
- Manufacturer:
- Allegro MicroSystems
- Package:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
A8654KLPTR-T.pdf
- Description:
- IC REG BUCK ADJ 3A 16TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
A8654KLPTR-T from Allegro MicroSystems is a high-efficiency, automotive-grade synchronous buck regulator integrating 80 mΩ high-side and 55 mΩ low-side N-channel MOSFETs. It delivers up to 3 A continuous output current, supports 4–36 V input range (operational down to 2.6 V), and features adjustable PWM switching frequency from 100 kHz to 2.2 MHz - enabling optimized EMI performance and thermal management in automotive infotainment and ADAS power rails.
For engineers reviewing the A8654KLPTR-T datasheet, A8654KLPTR-T pinout, A8654KLPTR-T application, or A8654KLPTR-T equivalent, key selection considerations include its AEC-Q100 qualification, external compensation flexibility, NPOR open-drain reset output with ±10 mV OV/UV hysteresis, pre-bias startup capability, and robust fault tolerance (open-circuit, adjacent-pin short, and short-to-ground protection at every pin).
Technical Context
The A8654KLPTR-T employs peak current-mode control with internal slope compensation scaled to switching frequency - enabling stable operation at duty cycles >50% across wide VIN/VOUT ratios and inductor values. Its transconductance error amplifier (750 µA/V typ.) operates in dual-mode: soft-start regulation (SS − 400 mV) followed by precision reference (800 mV ±1%) tracking.
Protection architecture includes pulse-by-pulse OCP (4.7 A typ.), hiccup-mode short-circuit response (240 OCP pulses), UVLO with 800 mV hysteresis (3.4 V start / 2.6 V stop), BOOT over/undervoltage detection, and thermal shutdown at 170°C (20°C hysteresis). All pins are tolerant to open, adjacent-short, and ground-short faults - meeting stringent automotive functional safety requirements.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4–36 V nominal; remains operational down to 2.6 V VIN - enables cold-crank support in 12 V/24 V automotive systems |
| Output Current | 3 A steady-state - sufficient for powering SoCs, radar MMICs, or display controllers without external boost stages |
| Switching Frequency | 100 kHz to 2.2 MHz, resistor- or clock-adjustable - allows EMI spread-spectrum tuning and layout optimization |
| Feedback Reference | 800 mV ±1% (−40°C to 125°C) - enables precise 3.3 V, 5 V, or custom rail generation with standard resistor dividers |
| MOSFET RDS(on) | 80 mΩ (HS) / 55 mΩ (LS) - minimizes conduction loss and thermal rise at full load on compact PCBs |
| Thermal Resistance | RθJA = 34°C/W (4-layer JEDEC board) - supports 3 A operation without forced airflow in eTSSOP-16 LP package |
| NPOR Accuracy | VOUT(OV) = 880 mV ±40 mV; VOUT(UV) = 740 mV ±25 mV - provides reliable system-level power-good signaling |
Pinout & Package
Package: 16-pin eTSSOP (LP) with exposed thermal pad (4.4 mm × 5 mm, 1.2 mm height); lead-free, 100% matte-tin plating; requires ≥6 vias under pad for thermal integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN (Pin 1) | Enable input | Active-high logic; 1.41 V typical turn-on threshold - allows direct connection to microcontroller GPIO or VIN for automatic startup |
| VIN (Pin 2) | Main power input | Supplies control circuitry and high-side MOSFET drain; requires local 2×4.7 µF ceramic decoupling |
| SS (Pin 3) | Soft-start timing node | Capacitor-connected node setting ramp time and hiccup period; sources −20 µA during startup |
| FB (Pin 5) | Feedback sense input | High-impedance (−8 nA bias) node for resistor-divider monitoring of VOUT - sets regulation point via 800 mV reference |
| COMP (Pin 8) | Error amplifier output | Compensation node requiring external RZ/CZ/CP network - enables loop stability across wide component variations |
| SYNC/FSET (Pin 9) | Frequency control | Resistor-to-GND sets fSW; accepts external 100 kHz–2.2 MHz clock - enables synchronized multi-rail noise reduction |
| NPOR (Pin 10) | Power-on reset output | Open-drain active-low signal with 2.5 ms delay after regulation - requires external pull-up for MCU reset assertion |
| PGND (Pins 13,14) | Power ground return | Dedicated low-impedance path for high di/dt switch-node currents - must be separated from SGND plane |
| SW (Pin 15) | Switch-node output | Connection to inductor; high dv/dt (0.75 V/ns typ.) - demands short, wide trace routing and minimized loop area |
| BOOT (Pin 16) | High-side gate drive boost | Connects to SW via 100 nF ceramic capacitor - sustains gate voltage above VIN for HS MOSFET turn-on |
Key Features
| Feature | Design Value |
|---|---|
| Automotive qualification | AEC-Q100 Grade 1 (−40°C to +125°C ambient, 150°C junction) - validated for engine bay and cabin electronics |
| Low-dropout operation | Maximized duty cycle at low VIN - maintains regulation when input drops to within ~500 mV of VOUT (e.g., 5.9 V → 4.9 V @ 3 A) |
| EMI mitigation | Frequency dithering (±13%) and synchronization capability - reduces peak spectral energy in sensitive RF bands |
| Fault resilience | Pin-level open-circuit, adjacent-pin short, and short-to-ground tolerance - eliminates need for external fault isolation components |
| Startup flexibility | Pre-bias startup compatibility and externally adjustable soft-start - prevents output capacitor discharge and inrush overshoot |
Applications
| Automotive Infotainment | ADAS Radar Systems |
|---|---|
Use Scenario: Powering audio DSPs, video processors, and touch-screen controllers in head units and rear-seat displays. IC Role / Device Role / Timing Role: Primary 3.3 V/5 V buck converter supplying core logic and interface I/O with tight ripple (<20 mVpp) and fast transient response. Use Value: AEC-Q100 qualification and 2.6 V UVLO stop enable reliable operation during cold-crank; NPOR ensures clean system reset before firmware execution. |
Use Scenario: Generating stable 1.2 V and 3.3 V rails for 77 GHz radar transceivers and signal-conditioning ASICs. IC Role / Device Role / Timing Role: High-efficiency, low-noise DC/DC stage placed near RF modules to minimize conducted EMI into sensitive analog front-ends. Use Value: Adjustable 2.2 MHz switching avoids critical IF bands; frequency synchronization eliminates beat frequencies between multiple converters. |
| Industrial 24 V Systems | Telematics Control Units |
Use Scenario: Converting unregulated 24 V industrial bus to 5 V for PLC I/O modules and sensor interfaces. IC Role / Device Role / Timing Role: Robust primary regulator handling line surges up to 40 V and wide temperature swings (−40°C to +105°C). Use Value: Integrated 80/55 mΩ MOSFETs eliminate discrete FET losses; thermal shutdown with 20°C hysteresis prevents latch-up during overload. |
Use Scenario: Supplying 3.3 V to cellular modems, GNSS receivers, and CAN transceivers in vehicle telematics gateways. IC Role / Device Role / Timing Role: Secondary buck stage with pre-bias startup supporting hot-plug SIM card insertion and battery-backed RTC retention. Use Value: SS pin programmability allows matched ramp rates across multiple rails; NPOR coordination ensures deterministic boot sequencing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ4433AGL-AEC1-Z | 4 A rated, 3.5–36 V input, fixed 2.2 MHz fSW, no SYNC pin, integrated compensation | Lacks frequency synchronization and external compensation - less flexible for EMI-sensitive multi-rail designs | Choose when simplicity and higher current margin outweigh need for EMI tuning or loop customization |
| LM61480QRNXTQ1 | 4.5 A rated, 3.5–36 V input, 200 kHz–2.2 MHz adjustable fSW, pin-compatible SYNC, but no NPOR output | Missing dedicated power-on reset signal - requires external supervisor IC for system reset functionality | Choose when higher output current and identical sync capability are needed, and NPOR can be implemented externally |
Compared with MPQ4433AGL-AEC1-Z and LM61480QRNXTQ1, the A8654KLPTR-T uniquely combines AEC-Q100 Grade 1 rating, NPOR with built-in OV/UV thresholds, and full pin-level fault tolerance - making it optimal for safety-critical automotive subsystems where reset integrity and pin robustness are non-negotiable.
Availability
A8654KLPTR-T is available at Aetrix Electronics and suitable for automotive infotainment, ADAS radar modules, and industrial 24 V power conversion requiring stable component supply, long-term lifecycle assurance, and AEC-Q100-compliant sourcing.
Supply support for A8654KLPTR-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Allegro MicroSystems is a U.S.-based semiconductor company specializing in high-performance power ICs and magnetic sensors for automotive and industrial markets.
The A8654 belongs to Allegro's automotive-qualified buck regulator product line, designed specifically for demanding power rails in infotainment, ADAS, and telematics - emphasizing fault resilience, thermal robustness, and EMI control.
FAQ
What is the minimum input voltage at which A8654KLPTR-T remains operational?
The A8654KLPTR-T remains operational down to 2.6 V input voltage - its UVLO STOP threshold - allowing continued regulation during automotive cold-crank events. Below this level, the device disables switching and pulls COMP low. This behavior is confirmed in the Electrical Characteristics table (VUVLO(STOP) = 2.6 V typ.) and Functional Description section of the A8654 datasheet.
Does A8654KLPTR-T support pre-bias startup, and how does it behave?
Yes, the A8654KLPTR-T supports pre-bias startup: if the output is already biased at a nonzero voltage, the error amplifier delays activation until the SS pin voltage reaches approximately VFB + 400 mV, preventing reverse current flow into the output capacitors. This behavior is explicitly documented in the Functional Description section and verified in Typical Performance Characteristics waveforms.
What protection features are implemented at the pin level for A8654KLPTR-T?
The A8654KLPTR-T provides open-circuit, adjacent-pin short-circuit, and short-to-ground tolerance at every pin - a feature emphasized in both the Features and Protection sections of the datasheet. This eliminates the need for external fault-isolation components and satisfies stringent automotive reliability requirements beyond standard overcurrent or thermal shutdown.
Can A8654KLPTR-T synchronize to an external clock, and what is the supported frequency range?
Yes, the A8654KLPTR-T supports synchronization via its SYNC/FSET pin across 100 kHz to 2.2 MHz - matching its internally set frequency range. The datasheet specifies synchronization input timing requirements including rise/fall times (10–15 ns), off-time (0.2–1.3 µs), and threshold voltages (0.5–2.0 V), ensuring deterministic phase alignment in multi-converter systems.
What is the purpose and electrical behavior of the NPOR pin on A8654KLPTR-T?
The NPOR pin on A8654KLPTR-T is an active-low, open-drain power-on reset output that transitions high only after VOUT has remained within regulation (±5% of setpoint) for 2500 PWM cycles. It asserts low during overvoltage (880 mV), undervoltage (740 mV), or thermal shutdown - providing a hardware-validatable system reset signal without external supervision.
A8654KLPTR-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Allegro MicroSystems
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4V
- Voltage - Input (Max):
- 36V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 36V
- Current - Output:
- 3A
- Frequency - Switching:
- 100kHz ~ 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 150°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-eTSSOP-EP
A8654KLPTR-T FAQ
1.How can I place an order for A8654KLPTR-T through Aetrix?
Please submit a Request for Quotation (RFQ) for A8654KLPTR-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for A8654KLPTR-T reliable?
The price and inventory of A8654KLPTR-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for A8654KLPTR-T is usually 5 days.
3.What payment methods are accepted for A8654KLPTR-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for A8654KLPTR-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for A8654KLPTR-T?
A8654KLPTR-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your A8654KLPTR-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for A8654KLPTR-T?
For technical support, including A8654KLPTR-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your A8654KLPTR-T requirements.
6.How does Aetrix verify that A8654KLPTR-T is sourced from the original manufacturer or authorized distributors?
All A8654KLPTR-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that A8654KLPTR-T meets industry standards.
7.What is the process for return or replacement of A8654KLPTR-T?
All A8654KLPTR-T units undergo pre-shipment inspection (PSI). If there is an issue with A8654KLPTR-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The A8654KLPTR-T part is unused and in its original packaging.
Return procedure for A8654KLPTR-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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