Skyworks Solutions Inc. AAT3672IWO-4.2-2-T1
- Part No.:
- AAT3672IWO-4.2-2-T1
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Battery Chargers
- Package:
- 14-WFDFN Exposed Pad
- Datasheet:
-
AAT3672IWO-4.2-2-T1.pdf
- Description:
- IC BATT CHG LI-ION 1CELL 14TDFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,515
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AAT3672IWO-4.2-2-T1 from Skyworks Solutions is a single-cell 4.2V Li-ion/polymer battery charger and dynamic power manager IC that simultaneously delivers system load power and battery charging from one input (AC adapter or USB). It supports up to 1.6A ADP charge current, programmable termination current via RTERM, digitally controlled thermal regulation, and dual open-drain STAT1/STAT2 status outputs for LED indication - deployed in portable GPS units and digital cameras.
For engineers reviewing the AAT3672IWO-4.2-2-T1 datasheet, AAT3672IWO-4.2-2-T1 pinout, AAT3672IWO-4.2-2-T1 application, or AAT3672IWO-4.2-2-T1 equivalent, this device requires attention to its ADPSET/RSET programming interface, dual-status reporting architecture, thermal loop entry at 115°C, 3×3mm TDFN-14 package layout, and compatibility with 4.2V ±1% regulated battery voltage.
Technical Context
The AAT3672IWO-4.2-2-T1 implements a three-path dynamic power architecture: ADP-to-OUT, ADP-to-BAT, and BAT-to-OUT switches, enabling concurrent charging and system operation. Its digitally controlled thermal loop adjusts charge current based on junction temperature, entering regulation at 115°C and exiting at 95°C.
It features dual open-drain status outputs (STAT1 and STAT2), fixed 4.2V ±1% charge regulation, user-programmable fast-charge current (100–1600 mA via ADPSET), and adaptive charge reduction triggered when ADP voltage falls below 4.5V - all within a -25°C to +85°C operating range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Charge Voltage Regulation | 4.20 V ±1% - precisely targets standard single-cell Li-ion full-charge threshold without external feedback. |
| Max ADP Charge Current | 1.6 A - sets upper bound for simultaneous battery charging and system load sourcing from adapter input. |
| Thermal Loop Entry Temp | 115 °C - triggers automatic digital reduction of charge current to prevent thermal shutdown. |
| ADP Under-Voltage Lockout | 3.4 V rising edge - disables charging if adapter supply drops below safe operating level. |
| Status Outputs | Two open-drain MOSFETs (STAT1, STAT2) - drive external LEDs directly for real-time charge state indication. |
| Package | 14-pin 3 × 3 mm TDFN - thermally enhanced, space-efficient footprint with exposed paddle tied to GND. |
| Operating Temperature | -25°C to +85°C - validated performance range for consumer portable electronics environments. |
Pinout & Package
Package: 14-pin TDFN (3 mm × 3 mm, 0.75 mm height), thermally enhanced with exposed paddle (EP) connected to GND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ADPSET | Current programming input | Resistor-to-GND sets ADP fast-charge constant current (100–1600 mA); 2.0 V regulated reference enables precise KI_CC_ADP scaling. |
| ADP | Adapter input supply | Main power source (4.0–6.5 V); powers system load and charges battery; requires ≥1 μF ceramic decoupling to GND. |
| STAT1, STAT2 | Open-drain status outputs | Drive external LEDs for charge status; low-active; require pull-up to OUT or ADP for indicator operation. |
| GND | Common reference node | System ground return for all analog/digital functions; must be low-impedance connection to EP. |
| EN | Enable control input | Active-high (≥1.6 V) enables ADP switch and battery charging path; internal pull-down ensures default disable. |
| ENO | ADP-to-OUT enable | Active-high control of adapter-to-system power path; independent of battery path control. |
| ENBAT | Battery-to-OUT enable | Active-high control of battery-to-system power path; allows battery-only operation when ADP is absent. |
| CHRADP | Charge reduction threshold | Adjusts ADP charge reduction trigger point (default 4.5 V); voltage divider between ADP and GND sets custom threshold. |
| TERM | Termination current setting | Resistor-to-GND programs charge termination current (e.g., 100 mA with 40 kΩ); logic-high disables termination. |
| TS | Battery temperature sense | Accepts NTC thermistor network; monitors battery pack temp; disables charging if out-of-range (TS1/TS2 thresholds). |
| BAT | Battery anode connection | Direct connection to Li-ion cell (+); requires ≥1 μF ceramic capacitor to GND for stability. |
| OUT | Dynamic system output | Supplies system load from ADP, BAT, or both; requires ≥10 μF bulk capacitance to GND. |
| CT | Charge timer capacitor | Capacitor-to-GND sets ADP charge timeout (e.g., 0.1 μF = 7 hours); direct GND connection disables timer. |
| EP | Exposed thermal paddle | Must be soldered to PCB GND plane for thermal dissipation; contributes to θJA = 50°C/W rating. |
Key Features
| Feature | Design Value |
|---|---|
| Dynamic Power Path Management | Simultaneous ADP-to-OUT, ADP-to-BAT, and BAT-to-OUT switching enables seamless source handover and uninterrupted system operation during charging. |
| Digitally Controlled Thermal Loop | Regulates junction temperature at 100°C by dynamically scaling charge current - avoids thermal shutdown while maximizing charge rate under ambient constraints. |
| Programmable Charge Termination | RTERM resistor sets precise end-of-charge current (e.g., 100 mA), ensuring consistent battery capacity utilization and preventing overcharge stress. |
| Adaptive Charge Reduction (CHR) | Reduces battery charge current when ADP voltage drops below 4.5 V - protects weak/USB-limited sources while sustaining system load. |
| Dual Status Reporting | STAT1 and STAT2 provide independent open-drain outputs for multi-state LED indication (e.g., charging, done, fault) without external logic. |
Applications
| Portable GPS Receivers | Digital Still Cameras |
|---|---|
Use Scenario: GPS unit operates continuously from battery while charging via car adapter or USB port during vehicle use. IC Role / Device Role / Timing Role: AAT3672IWO-4.2-2-T1 manages dual-power sourcing, prevents battery over-discharge below 2.9 V, and reports charge status via STAT1/STAT2 LEDs. Use Value: Enables hot-swap battery operation and maintains navigation uptime during charging - critical for automotive and outdoor tracking applications. |
Use Scenario: DSLR or mirrorless camera draws high burst current during image capture while charging from USB or wall adapter. IC Role / Device Role / Timing Role: AAT3672IWO-4.2-2-T1 supplies peak system load from both ADP and BAT, regulates 4.2 V battery voltage, and terminates charge at programmed ITERM. Use Value: Prevents brownout during flash charging or sensor readout by dynamically supplementing ADP current with battery discharge - improves shot-to-shot responsiveness. |
| Handheld PCs | MP3 Audio Players |
Use Scenario: Tablet-style handheld PC runs OS and apps while charging from 5 V USB-C or proprietary adapter. IC Role / Device Role / Timing Role: AAT3672IWO-4.2-2-T1 controls power routing between ADP/BAT and system rail, enforces 2.9 V UVLO to avoid deep discharge, and monitors TS for thermal safety. Use Value: Extends usable runtime during mixed-use scenarios (e.g., video playback + charging) by intelligently balancing source contributions without manual intervention. |
Use Scenario: Portable audio player charges via USB while playing back high-bitrate FLAC files, drawing variable load current. IC Role / Device Role / Timing Role: AAT3672IWO-4.2-2-T1 delivers stable 4.2 V battery charge, limits system current to prevent adapter overload, and signals full charge via STAT1 LED. Use Value: Eliminates need for external load switches or discrete charge controllers - reduces BOM count and PCB area in compact audio devices. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar battery charger and power manager applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| BQ24075RGTR | Single-input linear charger with integrated LDO; no dynamic power path; fixed 4.2 V regulation; 1.2 A max charge current. | Lacks dual-path power management and STAT2 output; suited for simpler systems where battery-only backup is sufficient. | Select BQ24075RGTR when board space is constrained and dynamic source handover is unnecessary. |
| MAX1555 | Linear charger with USB/adapter input selection; no programmable termination; fixed 4.2 V; 500 mA max charge current; no thermal loop. | No digital thermal regulation or charge reduction loop; limited to low-power devices with minimal thermal risk. | Choose MAX1555 only for ultra-low-cost, low-current (<500 mA) applications where advanced protection is not required. |
Compared with BQ24075RGTR and MAX1555, the AAT3672IWO-4.2-2-T1 uniquely supports simultaneous charging and system operation with adaptive current limiting, dual-status reporting, and digitally regulated thermal management - making it suitable for higher-power portable devices requiring robust power orchestration.
Availability
AAT3672IWO-4.2-2-T1 is available at Aetrix Electronics and suitable for portable GPS receivers, digital still cameras, and handheld PCs requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for AAT3672IWO-4.2-2-T1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for mobile, infrastructure, and automotive markets.
The AAT3672IWO-4.2-2-T1 belongs to Skyworks' BatteryManager product line, designed specifically for compact, high-efficiency portable electronics requiring integrated Li-ion charging and intelligent power path control.
FAQ
What is the function of the CHRADP pin on the AAT3672IWO-4.2-2-T1?
The CHRADP pin on the AAT3672IWO-4.2-2-T1 sets the adapter voltage threshold (default 4.5 V) at which the charge reduction loop activates. When ADP voltage drops below this threshold, the IC automatically lowers battery charge current to prevent adapter overload while maintaining system output - a key feature for USB-powered devices with marginal source capability. This behavior is confirmed in the Functional Description section and Electrical Characteristics table of the AAT3672IWO-4.2-2-T1 datasheet.
Does the AAT3672IWO-4.2-2-T1 support USB enumeration or data communication?
No, the AAT3672IWO-4.2-2-T1 does not support USB enumeration or data communication. It is a dedicated power management IC that accepts USB voltage (5 V) as an input source but contains no USB transceiver, protocol engine, or D+/D− pins. Its USB-related functionality is limited to accepting 5 V power and supporting two fixed charge current levels (USBL/USBH) only in AAT3672-3 variants - not applicable to the AAT3672IWO-4.2-2-T1, which uses EN/STAT2 configuration.
How is battery charge termination configured on the AAT3672IWO-4.2-2-T1?
Battery charge termination on the AAT3672IWO-4.2-2-T1 is configured using an external resistor (RTERM) connected between the TERM pin and GND. The termination current follows ICH_TERM = 2000 × (2 V / RTERM), allowing precise setting (e.g., 40 kΩ yields ~100 mA). Logic-high on TERM disables termination. This method is validated in the Electrical Characteristics table and Functional Description section of the AAT3672IWO-4.2-2-T1 datasheet.
What thermal protection mechanisms does the AAT3672IWO-4.2-2-T1 implement?
The AAT3672IWO-4.2-2-T1 implements two thermal protections: (1) a digitally controlled thermal loop that enters regulation at 115°C and exits at 95°C to sustain maximum possible charge current without shutdown, and (2) hard thermal shutdown at 140°C with 15°C hysteresis. Both are measured at the die junction and documented in Absolute Maximum Ratings and Electrical Characteristics tables of the AAT3672IWO-4.2-2-T1 datasheet.
Can the AAT3672IWO-4.2-2-T1 operate without a battery connected?
Yes, the AAT3672IWO-4.2-2-T1 can operate without a battery connected. With EN high and ENO high, it delivers power from ADP to OUT for system load only. BAT pin is left floating or disconnected; no damage occurs. However, battery-dependent features - including charging, recharge sequencing, and TS monitoring - remain inactive. This mode is explicitly supported in the Functional Description and Pin Descriptions sections of the AAT3672IWO-4.2-2-T1 datasheet.
AAT3672IWO-4.2-2-T1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- BatteryManager™
- Package/Case:
- 14-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Battery Chemistry:
- Lithium Ion/Polymer
- Number of Cells:
- 1
- Current - Charging:
- Constant - Programmable
- Programmable Features:
- Current, Timer
- Fault Protection:
- Over Current, Over Temperature, Over Voltage
- Charge Current - Max:
- 1.6A
- Battery Pack Voltage:
- 4.2V
- Voltage - Supply (Max):
- 6.5V
- Interface:
- USB
- Operating Temperature:
- -25°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TDFN (3x3)
AAT3672IWO-4.2-2-T1 FAQ
1.How can I place an order for AAT3672IWO-4.2-2-T1 through Aetrix?
Please submit a Request for Quotation (RFQ) for AAT3672IWO-4.2-2-T1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AAT3672IWO-4.2-2-T1 reliable?
The price and inventory of AAT3672IWO-4.2-2-T1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AAT3672IWO-4.2-2-T1 is usually 5 days.
3.What payment methods are accepted for AAT3672IWO-4.2-2-T1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AAT3672IWO-4.2-2-T1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AAT3672IWO-4.2-2-T1?
AAT3672IWO-4.2-2-T1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AAT3672IWO-4.2-2-T1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AAT3672IWO-4.2-2-T1?
For technical support, including AAT3672IWO-4.2-2-T1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AAT3672IWO-4.2-2-T1 requirements.
6.How does Aetrix verify that AAT3672IWO-4.2-2-T1 is sourced from the original manufacturer or authorized distributors?
All AAT3672IWO-4.2-2-T1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AAT3672IWO-4.2-2-T1 meets industry standards.
7.What is the process for return or replacement of AAT3672IWO-4.2-2-T1?
All AAT3672IWO-4.2-2-T1 units undergo pre-shipment inspection (PSI). If there is an issue with AAT3672IWO-4.2-2-T1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AAT3672IWO-4.2-2-T1 part is unused and in its original packaging.
Return procedure for AAT3672IWO-4.2-2-T1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AAT3672IWO-4.2-2-T1 Tags

-
BQ21040DBVR
Texas Instruments

-
MCP73812T-420I/OT
Microchip Technology

-
MCP73831T-2ACI/OT
Microchip Technology

-
MCP73832T-2ACI/OT
Microchip Technology

-
MCP73831T-2DCI/OT
Microchip Technology

-
MCP73832T-2DCI/OT
Microchip Technology

-
MCP73831T-2ATI/OT
Microchip Technology

-
MCP73832T-2ATI/OT
Microchip Technology

-
MCP73831T-5ACI/OT
Microchip Technology
-
MCP73832T-2ACI/MC
Microchip Technology
-
MCP73831T-2ACI/MC
Microchip Technology
-
MCP73831T-2ATI/MC
Microchip Technology
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

