Analog Devices Inc. AD13280AF

Overview

AD13280AF from Analog Devices is a dual-channel, 12-bit, 80 MSPS analog-to-digital converter with integrated analog input signal conditioning, on-chip track-and-hold, and laser-trimmed thin-film resistor networks for channel matching. It delivers 90 dB channel-to-channel isolation, 80 dB spurious-free dynamic range at 10 MHz, and supports ±0.5 V / ±1.0 V selectable bipolar input ranges - optimized for radar I/Q baseband processing.

For engineers reviewing the AD13280AF datasheet, AD13280AF pinout, AD13280AF application, or AD13280AF equivalent, key selection considerations include its guaranteed 80 MSPS sample rate, dual independent encode inputs, 12-bit twos-complement CMOS outputs at 3.3 V, and ceramic gull-wing 68-lead package with fully characterized channel-to-channel gain/offset matching.

Technical Context

The AD13280AF employs a three-pipeline multipass architecture with on-board AD8045 amplifiers, AD8138 differential drivers, and a custom ADC core. Each channel features independent ±5.0 V analog signal conditioning (AVEE/AVCC), 3.3 V digital output supply (DVCC), and dual analog input paths: single-ended (AMP-IN-A/B-1/-2) or differential (A+/A−IN, B+/B−IN).

It integrates precision laser-trimmed resistor networks for impedance control (100 Ω / 200 Ω single-ended, 618 Ω differential), on-chip reference tracking, and 100 Ω series-terminated CMOS outputs. Aperture uncertainty is 0.3 ps rms, aperture delay matching is 500 ps max, and transient response is 25 ns - enabling high-fidelity sampling in phased array and GPS antijamming receivers.

Key Specifications

Pinout & Package

The AD13280AF is housed in a 68-lead ceramic gull-wing package (ES package), with θ_JA = 24.3°C/W and θ_JC = 2.2°C/W. Pin 1 identifier located at top-left corner; internal shield pins (1, 35) isolate analog channels.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel, 12-bit, high-speed ADC applications.

Compared with AD9238BCPZ-80 and ADS5272IPFP, the AD13280AF uniquely integrates analog signal conditioning, channel matching, and ceramic packaging - reducing bill-of-materials count and improving phase coherence in radar and navigation receivers without requiring external trimming or layout compensation.

Availability

AD13280AF is available at Aetrix Electronics and suitable for radar processing, phased array receivers, and GPS antijamming systems requiring stable component supply, long-term obsolescence management, and traceable sourcing for defense and aerospace programs.

Supply support for AD13280AF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD13280AF belongs to Analog Devices' high-speed data acquisition product line, designed specifically for demanding RF and communications applications where channel matching, low jitter, and integrated analog front-ends are critical to system-level performance.

FAQ

What is the guaranteed maximum sample rate for the AD13280AF?

The AD13280AF guarantees a maximum conversion rate of 80 MSPS across its full operating temperature range (−40°C to +85°C), with minimum conversion rate of 30 MSPS. This rating is validated per Table 1 in the Rev. C datasheet under Test Level VI, with aperture delay matching ≤500 ps and SNR ≥64.5 dBFS at 10 MHz input.

Does the AD13280AF support differential analog inputs, and what is the nominal input impedance?

Yes, the AD13280AF supports differential analog inputs via A+IN/A−IN and B+IN/B−IN pins, with a nominal differential input impedance of 618 Ω and full-scale range of ±1 V (1.2 V p-p). This configuration bypasses the internal AD8045 amplifier and connects directly to the AD8138 differential driver for improved SNR and reduced even-order harmonics.

What power supply voltages does the AD13280AF require, and how are they partitioned per channel?

The AD13280AF requires three independent supply domains per channel: AVCCA/AVCCB (+5.0 V), AVEEA/AVEEB (−5.0 V), and DVCCA/DVCCB (+3.3 V). Each channel has dedicated analog and digital supplies to minimize crosstalk; total supply current per channel is 375–459 mA, yielding 3.7–4.3 W total power dissipation.

How is channel-to-channel isolation measured for the AD13280AF, and what is the specified value?

Channel-to-channel isolation for the AD13280AF is measured with one channel grounded and a full-scale signal applied to the other, resulting in a guaranteed 90 dB minimum across temperature. This specification reflects the effectiveness of internal shielding (Pins 1 and 35), separate analog grounds (AGNDA/AGNDB), and physical separation of A/B signal paths in the ceramic package.

What digital output format and logic compatibility does the AD13280AF use?

The AD13280AF uses twos-complement output coding with 12-bit parallel CMOS-compatible outputs (D0A–D11A, D0B–D11B) referenced to DVCC = 3.3 V. Logic 1 voltage is 2.5 V min, logic 0 is 0.5 V max, and outputs include on-chip 100 Ω series termination resistors - eliminating need for external source-series resistors in standard PCB trace environments.