My Inquiry
My Account
Analog Devices Inc. AD1380JD
- Part No.:
- AD1380JD
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 32-CDIP (0.910", 23.12mm)
- Datasheet:
-
AD1380JD.pdf
- Description:
- IC ADC 16BIT SAR 32BBDIP
- Quantity:
- Payment:
- Shipping:
Inventory:4,431
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD1380JD from Analog Devices is a complete, low-cost 16-bit sampling analog-to-digital converter with integrated reference, clock, and sample-and-hold amplifier. It delivers 50 kHz throughput, ±0.006% FSR linearity error, and parallel TTL/5 V CMOS-compatible output - enabling high-accuracy data acquisition in medical instrumentation and professional audio systems.
For engineers reviewing the AD1380JD datasheet, AD1380JD pinout, AD1380JD application, or AD1380JD equivalent, key selection considerations include its guaranteed no-missing-codes performance over 0°C to +70°C, ±10 V bipolar input support, 14 μs max conversion time, and 32-lead hermetic ceramic DIP package requiring separate analog/digital ground handling.
Technical Context
The AD1380JD implements a 16-bit successive-approximation register (SAR) architecture with monolithic DAC and thin-film-on-silicon scaling resistors. Its combined ADC/Sample-and-Hold transfer characteristics are fully specified - including gain, offset, and linearity - ensuring system-level accuracy without external calibration for many applications.
It supports five analog input ranges (±10 V, ±5 V, ±2.5 V, 0–5 V, 0–10 V) via pin-strapping (Pins 4, 6, 7, 32), uses complementary offset binary (COB) coding for bipolar ranges and complementary straight binary (CSB) for unipolar, and features TTL-compatible digital outputs with STATUS (BUSY) flag and CLOCK OUT synchronized to conversion completion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit - provides 65,536 discrete quantization levels for high dynamic range signal digitization |
| Throughput Rate | 50 kHz - enables real-time sampling of signals up to ~20 kHz (Nyquist-limited) without aliasing |
| Linearity Error | ±0.006% FSR - guarantees monotonicity and <1 LSB integral nonlinearity across full temperature range |
| Conversion Time | 14 μs maximum - defines minimum inter-conversion interval for burst-mode or continuous acquisition |
| Analog Input Ranges | ±10 V, ±5 V, ±2.5 V, 0–5 V, 0–10 V - selectable via external pin connections, supporting both bipolar and unipolar sensor interfaces |
| Power Dissipation | 900 mW - low for a 16-bit SAR ADC with integrated SHA and reference, reducing thermal drift and board-level cooling needs |
| Temperature Range | 0°C to +70°C (specified), −25°C to +85°C (operating) - suitable for commercial and industrial-grade embedded systems |
Pinout & Package
AD1380JD is housed in a 32-lead hermetic bottom-brazed ceramic dual-in-line package (DH-32E, BBDIP_H), with 0.100" lead pitch and metal lid grounded internally to supplies and signals. Requires external connection between ANALOG COMMON (Pin 8) and DIGITAL COMMON (Pin 30) at a single point near the device.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 8, 29, 30 | Power & Ground | Pins 1 (−15 V), 2 (+15 V), 8 (ANALOG COMMON), 29 (+5 V), 30 (DIGITAL COMMON) - require local 1 μF + 0.1 μF decoupling; analog/digital grounds must be joined externally |
| 3 | GAIN ADJ | Input for external 100 ppm/°C potentiometer to trim gain error to ≤±0.053% FSR |
| 4 | BIPOLAR | Logic control for bipolar mode; tied high for COB coding (±10 V, ±5 V, ±2.5 V ranges) |
| 5 | COMPARATOR IN | Noise-sensitive input for zero-offset adjustment circuit; must be guarded by ANALOG COMMON |
| 6, 7 | SPAN Select | Pin 6 (+10 V SPAN) and Pin 7 (+20 V SPAN) configure input range scaling (e.g., tie Pin 7 high for ±10 V full-scale) |
| 26 | CLOCK OUT | Asynchronous TTL-compatible clock output active only during conversion; low otherwise |
| 27 | BUSY (STATUS) | Active-high TTL output indicating conversion in progress; falls on LSB decision completion |
| 28 | START CONVERT | TTL-compatible trigger; conversion initiated on trailing edge of ≥50 ns pulse |
| 31 | S/H IN | Analog input node for sampled signal; high-impedance (4 kΩ) with 900 kHz small-signal bandwidth |
| 9–24 | Digital Output | Parallel 16-bit output: Pin 9 (LSB) to Pin 24 (MSB); negative-true logic (Logic 1 = 0 V) |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Sample-and-Hold | Low-noise SHA with 300 μVp-p noise, 50 ns aperture time, and 100 ps rms jitter - preserves signal integrity during conversion |
| Guaranteed No Missing Codes | Valid across 0°C to +70°C for ≥13-bit resolution - eliminates code gaps that cause nonmonotonic behavior in control loops |
| Flexible Input Scaling | Five factory-supported ranges implemented via pin-strapping (no external op amps required) - simplifies front-end design for multi-range sensors |
| System-Level Accuracy Guarantee | Transfer specs (gain, offset, linearity) apply to combined ADC+SHA block - eliminates need for separate SHA characterization |
| Hermetic Ceramic Package | DH-32E package with metal lid ensures long-term reliability in humid or high-reliability environments (e.g., medical, test equipment) |
Applications
| Medical Instrumentation | Professional Audio Digitization |
|---|---|
Use Scenario: High-fidelity ECG and EEG signal capture in portable diagnostic devices requiring DC-coupled, low-drift digitization. IC Role / Device Role / Timing Role: Primary 16-bit sampling ADC capturing analog bio-potential waveforms at 50 kSPS with ±10 V input range and minimal harmonic distortion. Use Value: ±0.006% FSR linearity and 85 μVrms noise in 10 V unipolar mode ensure accurate amplitude representation of microvolt-level physiological signals. |
Use Scenario: Studio-grade analog-to-digital conversion in multichannel audio interfaces where THD < −96 dB is mandatory. IC Role / Device Role / Timing Role: Precision SAR ADC providing synchronous parallel output for FPGA-based digital signal processing pipelines. Use Value: 14 μs conversion time and TTL-compatible BUSY/CLOCK OUT enable deterministic timing alignment with FPGA logic clocks. |
| Automatic Test Equipment (ATE) | Data Acquisition Systems |
Use Scenario: DC parametric testing of precision analog components using calibrated voltage sweeps and digitized response measurement. IC Role / Device Role / Timing Role: Reference-grade ADC in metrology-grade ATE subsystems, operating in 0–10 V unipolar mode with external gain/offset trim. Use Value: Adjustable gain/offset pins (3, 5) and ±0.023% FSR unipolar offset error allow sub-LSB calibration stability over temperature. |
Use Scenario: Modular rack-mounted DAQ modules for industrial process monitoring with multiple sensor types (RTD, strain gauge, thermocouple). IC Role / Device Role / Timing Role: Standalone 16-bit ADC interfaced to microcontroller via parallel bus; configured for ±5 V bipolar input to accommodate differential sensor outputs. Use Value: 32-pin DIP footprint allows direct socketing on carrier boards; hermetic package ensures long-term calibration retention in harsh environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit sampling ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD1380KD | Lower linearity error (±0.003% FSR vs. ±0.006%), same package and pinout | Preferred for metrology-grade calibration systems requiring tighter monotonicity guarantee | Select AD1380KD when system-level linearity budget demands <±0.004% FSR over temperature |
| ADS8588S | 8-channel simultaneous-sampling, 16-bit SAR; 1 MSPS rate; SPI interface; QFN-64 package | Replaces AD1380JD in multi-channel, high-speed DAQ where parallel bus is impractical | Choose ADS8588S for channel density and speed; retain AD1380JD for single-channel, low-noise, hermetic-reliability applications |
Compared with AD1380KD, the AD1380JD trades 0.003% FSR linearity for lower cost while retaining identical timing, power, and package - making it optimal for volume commercial instrumentation. Versus ADS8588S, AD1380JD offers superior noise floor (85 μVrms) and hermetic reliability but lacks multi-channel capability and serial interface flexibility.
Availability
AD1380JD is available at Aetrix Electronics and suitable for medical instrumentation, professional audio digitization, and automatic test equipment requiring stable component supply and long-term calibration consistency.
Supply support for AD1380JD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design and manufacturing expertise spanning over 50 years.
The AD1380JD belongs to Analog Devices' legacy high-accuracy sampling ADC product line, engineered specifically for applications demanding guaranteed monotonicity, integrated signal conditioning, and hermetic packaging - such as clinical diagnostics and precision test systems.
FAQ
What is the maximum sampling rate supported by the AD1380JD?
The AD1380JD supports a maximum throughput rate of 50 kHz, corresponding to a minimum conversion cycle time of 20 μs. This is achieved with a 14 μs conversion time plus 6 μs acquisition time for a 20 V step input. The internal clock runs at 1.1 MHz, generating exactly 17 cycles per conversion to drive the 16-bit SAR logic and status flag.
Does the AD1380JD require external reference or clock circuitry?
No - the AD1380JD integrates both a precision voltage reference and clock generator. Its internal reference enables full-scale ranges of ±10 V, ±5 V, ±2.5 V, 0–5 V, and 0–10 V without external components. The internal clock drives the conversion sequence and produces the CLOCK OUT signal; no external oscillator is needed for basic operation.
How is bipolar versus unipolar mode selected on the AD1380JD?
Bipolar mode is selected by asserting Pin 4 (BIPOLAR) high, which configures the output coding as complementary offset binary (COB). Unipolar mode is selected by leaving Pin 4 open or low, resulting in complementary straight binary (CSB) coding. Input range selection (±10 V, 0–10 V, etc.) is further controlled by strapping Pins 6 and 7 according to Table 3 in the datasheet.
What are the grounding requirements for optimal performance of the AD1380JD?
The AD1380JD requires strict separation of analog and digital return paths: Pin 8 (ANALOG COMMON) and Pin 30 (DIGITAL COMMON) must be connected at a single point near the device, not internally. Each supply rail (+15 V, −15 V, +5 V) must be decoupled locally with a 1 μF tantalum capacitor in parallel with a 0.1 μF ceramic capacitor - bypassed to their respective ground pins to minimize noise coupling into the SHA and comparator.
Is the AD1380JD still in active production?
The AD1380JD is marked "OBSOLETE" in the official Rev. D datasheet (2005), indicating it is no longer in active production by Analog Devices. However, Aetrix Electronics maintains verified legacy inventory with full traceability, conforming to original specifications and packaged in original manufacturer-sealed containers for continued use in repair, replacement, and legacy system support.
AD1380JD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-CDIP (0.910", 23.12mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 50k
- Number of Inputs:
- 16
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- ±14.5V ~ 15.5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 32-BBDIP-H
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
AD1380JD FAQ
1.How can I place an order for AD1380JD through Aetrix?
Please submit a Request for Quotation (RFQ) for AD1380JD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD1380JD reliable?
The price and inventory of AD1380JD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD1380JD is usually 5 days.
3.What payment methods are accepted for AD1380JD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD1380JD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD1380JD?
AD1380JD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD1380JD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD1380JD?
For technical support, including AD1380JD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD1380JD requirements.
6.How does Aetrix verify that AD1380JD is sourced from the original manufacturer or authorized distributors?
All AD1380JD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD1380JD meets industry standards.
7.What is the process for return or replacement of AD1380JD?
All AD1380JD units undergo pre-shipment inspection (PSI). If there is an issue with AD1380JD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD1380JD part is unused and in its original packaging.
Return procedure for AD1380JD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD1380JD Tags
-
ADC081C021CIMKX/NOPB
Texas Instruments
-
MCP3021A5T-E/OT
Microchip Technology
-
TLA2024IRUGR
Texas Instruments
-
MCP3221A5T-E/OT
Microchip Technology
-
MCP3221A5T-I/OT
Microchip Technology
-
MCP3221A4T-E/OT
Microchip Technology
-
MCP3221A6T-E/OT
Microchip Technology
-
MCP3221A0T-E/OT
Microchip Technology
-
MCP3221A1T-E/OT
Microchip Technology
-
ADC121S021CIMFX/NOPB
Texas Instruments
-
MCP3001-I/MS
Microchip Technology
-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
