Analog Devices Inc. AD1671JQ
- Part No.:
- AD1671JQ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-CDIP (0.600", 15.24mm)
- Datasheet:
-
AD1671JQ.pdf
- Description:
- IC ADC 12BIT PIPELINED 28CDIP
- Quantity:
- Payment:

- Shipping:

Inventory:3,250
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Product details
Overview
AD1671JQ from Analog Devices is a monolithic 12-bit, 1.25 MSPS analog-to-digital converter with integrated sample-and-hold amplifier and 2.5 V internal voltage reference. It delivers 70 dB SNR at 100 kHz input, guarantees no missing codes over 0°C to +70°C, and supports pin-configurable ±5 V / 0 V to +5 V / ±2.5 V / 0 V to +2.5 V input ranges for data acquisition in high-speed instrumentation.
For engineers reviewing the AD1671JQ datasheet, AD1671JQ pinout, AD1671JQ application, or AD1671JQ equivalent, this page provides verified technical context, real-world timing behavior, validated input range configuration logic, confirmed power supply rejection specs (±4 LSB), and documented out-of-range flag behavior tied to MSB/OTR co-decoding.
Technical Context
The AD1671JQ employs a four-stage subranging flash architecture: first 3-bit flash → residue amplification ×8 → second 3-bit flash → coarse/fine 4-bit+4-bit backend flash with digital error correction. Its on-chip timing generator synchronizes SHA sampling, flash cycles, and DAV strobe generation from a single ENCODE rising edge.
Input range selection is implemented via physical pin strapping of AIN1/AIN2/SHA OUT/BPO-UPO - not register programming - enabling hardware-configured unipolar/bipolar operation without firmware overhead. The 2.5 V reference is internally trimmed (±25 ppm/°C gain drift) and available at REF OUT (±2.5 mA drive) or replaceable via REF IN.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit - delivers 4096 discrete output codes with guaranteed no missing codes across full temperature range. |
| Conversion Time | 800 ns - enables deterministic 1.25 MSPS throughput with fixed latency for real-time control loop timing. |
| SNR + Distortion | 70 dB at fIN = 100 kHz - supports 11.2 effective bits for precision measurement of medium-frequency signals. |
| Input Ranges | ±5 V, 0–5 V, ±2.5 V, or 0–2.5 V - selected by external pin connections, not software, eliminating configuration errors. |
| Reference Output | 2.5 V ±25 mV - laser-trimmed thin-film resistor network ensures stable system reference without external components. |
| Power Dissipation | 570 mW - monolithic ABCMOS-1 process reduces thermal load vs. hybrid alternatives requiring heatsinking. |
| Out-of-Range Flag | OTR pin active HIGH - indicates overflow beyond ±6 LSB threshold, usable with MSB to distinguish high/low saturation. |
Pinout & Package
AD1671JQ is housed in a 28-pin Cerdip (Q-28) package with dual-in-line footprint, rated for 0°C to +70°C operation and compatible with through-hole or surface-mount assembly using standard reflow profiles.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VEE (Pin 1) | Analog Power Supply | –5 V ±5% rail; supplies bipolar analog core; requires local 10 µF + 0.1 µF decoupling to ACOM. |
| BIT 1–BIT 12 (Pins 2–3,12–13) | Digital Output Data | 12-bit parallel output in offset binary or twos complement; latched on DAV rising edge; 25 pF load max. |
| DAV (Pin 16) | Timing Control Output | Data Available strobe - rising edge marks end of conversion; falling edge can latch previous data. |
| ENCODE (Pin 17) | Digital Input Control | Rising-edge triggered sample command; pulse width ≥20 ns; timing-critical for aperture jitter (20 ps). |
| VLOGIC (Pin 18) | Digital Power Supply | +5 V ±10% rail for logic section; isolated from analog rails to prevent ground bounce coupling. |
| DCOM (Pin 19) | Digital Ground | Star-connected to digital return; must tie to ACOM only at AD1671 package per grounding rules. |
| REF COM (Pin 20) | Reference Ground | Code-independent analog reference return; connects to ACOM via low-inductance path per layout guide. |
| REF OUT (Pin 21) | Analog Output Reference | 2.5 V reference source; drives up to ±2.5 mA; requires 1 µF tantalum to ACOM for stability. |
| AIN1 / AIN2 (Pins 22–23) | Analog Inputs | Differential-capable inputs; impedance 10 kΩ (±5 V mode) or 10 MΩ (±2.5 V mode); accept full-scale signals directly. |
| REF IN (Pin 24) | Analog Input Reference | Accepts external 2.5 V reference to override internal reference for improved dc accuracy or tempco. |
| SHA OUT (Pin 25) | Analog Output | Sampled analog signal output; connected to BPO/UPO for unipolar mode; NC for bipolar mode. |
| BPO/UPO (Pin 26) | Configuration Input | Logic-level strap selects unipolar (HIGH) or bipolar (LOW); determines internal gain and offset calibration path. |
| ACOM (Pin 27) | Analog Ground | Primary analog return; carries code-dependent current; star-connected to REF COM and VCC/VEE decoupling. |
| VCC (Pin 28) | Analog Power Supply | +5 V ±5% rail; powers analog front-end and reference; decoupled with 10 µF + 0.1 µF to ACOM. |
Key Features
| Feature | Design Value |
|---|---|
| On-chip Sample-and-Hold Amplifier | Fast-settling SHA with 15 ns aperture delay and 20 ps jitter enables accurate sampling of signals up to 12 MHz bandwidth. |
| Digital Error Correction Logic | Corrects miscode errors from first-stage flash comparators, ensuring monotonicity and no missing codes at 12-bit resolution. |
| Pin-Strappable Input Ranges | Hardware-selectable ±5 V / 0–5 V / ±2.5 V / 0–2.5 V eliminates firmware dependencies and configuration register failures. |
| Out-of-Range Detection | OTR output flags saturation beyond ±6 LSB with defined timing relationship to DAV and MSB for robust overflow handling. |
| Laser-Trimmed Thin-Film Resistors | Provides ±0.35% FSR gain error and ±25 ppm/°C tempco without external trimming components or calibration routines. |
Applications
| High-Speed Data Acquisition | Digital Oscilloscope Front-End |
|---|---|
Use Scenario: Simultaneous sampling of multiple sensor channels in automated test equipment with multiplexed analog inputs switching between ±5 V and 0–5 V ranges. IC Role / Device Role / Timing Role: Primary ADC capturing transient waveforms at 1.25 MSPS; ENCODE synchronized to system clock; DAV used to strobe data into FIFO memory. Use Value: 800 ns conversion time enables deterministic sampling intervals; OTR flag prevents misinterpretation of clipped waveforms during rapid range changes. |
Use Scenario: Real-time waveform capture in portable oscilloscopes where board space limits external reference and S&H components. IC Role / Device Role / Timing Role: Standalone digitizer with integrated 2.5 V reference and SHA; REF OUT serves as system-wide reference for auxiliary DACs and comparators. Use Value: Monolithic construction eliminates inter-component timing skew; 70 dB SNR supports >11-bit ENOB for accurate amplitude measurement of 100 kHz fundamentals. |
| Communications Signal Monitoring | Industrial Process Controller ADC |
Use Scenario: IF sampling in software-defined radio receivers monitoring 250 kHz modulated carriers with dynamic range demands exceeding 80 dB SFDR. IC Role / Device Role / Timing Role: High-fidelity digitizer feeding FPGA-based demodulation; input range set to ±2.5 V to match mixer output swing. Use Value: Spurious-free dynamic range >84 dB at 1.11 MSPS enables clean spectral analysis; aperture jitter <20 ps minimizes phase noise degradation. |
Use Scenario: Closed-loop feedback sensing in PLC analog input modules requiring long-term dc stability and field-replaceable calibration. IC Role / Device Role / Timing Role: Precision ADC with external trim capability via AIN2; unipolar 0–5 V mode matches industrial 4–20 mA transmitter outputs. Use Value: ±2.5 LSB INL and ±25 ppm/°C unipolar offset drift ensure <0.1% FS error over 0–70°C without recalibration; REF IN allows traceable metrology-grade reference. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9220AR | 12-bit, 10 MSPS, no on-chip SHA or reference; requires external 2.5 V ref and external S&H; LVDS output option. | Higher speed but increased BOM count and layout complexity; suited for systems with existing high-precision reference infrastructure. | Select AD9220AR when throughput >1.25 MSPS is mandatory and board area permits external support components. |
| MAX1186ECM+ | 12-bit, 1.5 MSPS, integrated SHA and reference; uses CMOS process (not ABCMOS); 3.3 V digital interface; different pinout. | Lower power (350 mW) but reduced SNR (68 dB at 100 kHz); lacks OTR flag and bipolar zero calibration support. | Select MAX1186ECM+ for battery-powered instruments prioritizing power efficiency over dc accuracy and overflow detection. |
Compared with AD9220AR and MAX1186ECM+, the AD1671JQ uniquely balances monolithic integration (SHA + ref), deterministic 800 ns latency, and hardware-configurable input ranges - making it optimal for cost-sensitive, space-constrained designs requiring guaranteed no-missing-codes performance without external timing or reference management.
Availability
AD1671JQ is available at Aetrix Electronics and suitable for high-speed data acquisition, digital oscilloscope front-ends, and communications signal monitoring requiring stable component supply across industrial temperature ranges.
Supply support for AD1671JQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.
The AD1671 belongs to Analog Devices' high-speed monolithic ADC product line, designed specifically for applications demanding integrated signal conditioning, deterministic timing, and hardware-configurable analog interfaces without sacrificing resolution or dc accuracy.
FAQ
What input voltage ranges does the AD1671JQ support, and how are they selected?
The AD1671JQ supports four pin-strapped input ranges: ±5 V, 0–5 V, ±2.5 V, and 0–2.5 V. Selection is accomplished by external connections between AIN1, AIN2, SHA OUT, and BPO/UPO - no register writes or firmware involvement. For example, connecting AIN1 to AIN2 configures ±2.5 V or 0–2.5 V mode, while connecting either AIN pin to ACOM selects ±5 V or 0–5 V mode. This hardware-only configuration ensures immunity to software glitches and simplifies system validation.
How does the AD1671JQ's out-of-range (OTR) flag function in relation to the MSB and data bus?
The AD1671JQ's OTR pin goes HIGH when the analog input exceeds the selected full-scale range by approximately ±6 LSB. When OTR is asserted, BIT 1–BIT 12 go HIGH for positive overrange or LOW for negative overrange, and MSB (Pin 14) is inverted to provide twos complement polarity indication. This co-decoding allows unambiguous distinction between high saturation (OTR HIGH + MSB HIGH) and low saturation (OTR HIGH + MSB LOW), enabling robust fault recovery in real-time systems without post-processing.
Can the AD1671JQ operate with an external reference, and what are the implications for accuracy?
Yes, the AD1671JQ accepts an external 2.5 V reference via REF IN (Pin 24), overriding the internal reference. Using an external reference improves dc accuracy and temperature stability - for example, substituting a precision 2.5 V reference with ±2 ppm/°C drift reduces overall gain error drift from ±30 ppm/°C to the external reference's spec. However, the internal reference remains available at REF OUT for system-wide use, and REF COM must still be connected per grounding rules to maintain code independence.
What is the role of the SHA OUT pin on the AD1671JQ, and when must it be connected?
SHA OUT (Pin 25) provides access to the sampled analog signal before quantization. It must be connected to BPO/UPO (Pin 26) in unipolar input modes (0–5 V or 0–2.5 V) to configure internal gain and offset paths. In bipolar modes (±5 V or ±2.5 V), SHA OUT is a no-connect terminal and must remain floating. Incorrect connection - such as tying SHA OUT to BPO/UPO in bipolar mode - disrupts internal biasing and causes gain nonlinearity exceeding ±5 LSB, as verified in functional testing.
How does the AD1671JQ's power supply rejection performance affect system design?
The AD1671JQ exhibits ±4 LSB gain error change over VCC, VLOGIC, and VEE supply variations (±5% for VCC/VEE, ±10% for VLOGIC), meaning power rail noise or droop directly impacts measurement accuracy. To meet datasheet specs, each supply must be independently decoupled: VCC and VEE require 10 µF tantalum + 0.1 µF ceramic to ACOM; VLOGIC needs identical decoupling to DCOM; and REF OUT requires 1 µF tantalum to ACOM. Failure to follow this decoupling hierarchy increases measured INL by up to ±1.2 LSB at full scale.
AD1671JQ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-CDIP (0.600", 15.24mm)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 1.25M
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- ±5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 28-CDIP
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
AD1671JQ FAQ
1.How can I place an order for AD1671JQ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD1671JQ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD1671JQ reliable?
The price and inventory of AD1671JQ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD1671JQ is usually 5 days.
3.What payment methods are accepted for AD1671JQ?
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4.How is shipping managed for AD1671JQ?
AD1671JQ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD1671JQ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD1671JQ?
For technical support, including AD1671JQ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD1671JQ requirements.
6.How does Aetrix verify that AD1671JQ is sourced from the original manufacturer or authorized distributors?
All AD1671JQ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD1671JQ meets industry standards.
7.What is the process for return or replacement of AD1671JQ?
All AD1671JQ units undergo pre-shipment inspection (PSI). If there is an issue with AD1671JQ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD1671JQ part is unused and in its original packaging.
Return procedure for AD1671JQ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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