Analog Devices Inc. AD1671KP
- Part No.:
- AD1671KP
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-LCC (J-Lead)
- Datasheet:
-
AD1671KP.pdf
- Description:
- IC ADC 12BIT PIPELINED 28PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:3,665
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD1671KP from Analog Devices is a monolithic 12-bit, 1.25 MSPS analog-to-digital converter with integrated sample-and-hold amplifier and 2.5 V voltage reference. It delivers 70 dB SNR at 100 kHz input, guarantees no missing codes over 0°C to +70°C, and supports pin-configurable ±5 V / 0 V to +5 V input ranges. It is used in high-speed data acquisition systems requiring precise dc accuracy and fast settling.
For engineers reviewing the AD1671KP datasheet, AD1671KP pinout, AD1671KP application, or AD1671KP equivalent, key selection criteria include conversion time (800 ns), internal reference stability (±25 ppm/°C gain drift), bipolar/unipolar output format flexibility, and out-of-range flag behavior for signal integrity monitoring in real-time sampling systems.
Technical Context
The AD1671KP employs a subranging flash architecture with digital error correction across four internal conversion stages: two 3-bit flash converters followed by coarse/fine 4-bit flash sections. Its on-chip timing generator synchronizes SHA control, DAC subtraction, and residue amplification without external clocks.
It uses Analog Devices' ABCMOS-1 process-integrating high-speed bipolar circuitry for analog front-end linearity and low-power CMOS for logic-to achieve 570 mW power consumption at 1.25 MSPS. Input range selection (±5 V, 0–5 V, ±2.5 V, 0–2.5 V) is determined by strapping AIN1/AIN2, BPO/UPO, and SHA OUT pins per Figure 2 of the datasheet.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit - guarantees full-scale quantization with 4096 distinct output codes |
| Conversion Time | 800 ns - defines minimum inter-conversion interval for 1.25 MSPS throughput |
| SNR + Distortion | 70 dB at fIN = 100 kHz - sets usable dynamic range for medium-bandwidth signals |
| Input Range Options | ±5 V, 0–5 V, ±2.5 V, 0–2.5 V - selected via pin strapping, not software or register |
| Reference Output | 2.5 V ±25 mV - stable internal reference usable as system-wide precision voltage source |
| Power Consumption | 570 mW - enables high-speed sampling without hybrid-level thermal management |
| INL (Max) | ±2 LSB - ensures monotonicity and predictable transfer function across full temperature range |
Pinout & Package
AD1671KP is supplied in a 28-pin plastic leaded chip carrier (P-28A) package with gull-wing leads, compatible with surface-mount reflow assembly. Thermal resistance θJA is 50°C/W; maximum junction temperature is +150°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VEE (Pin 1) | Analog Power Supply | –5 V supply rail; must be decoupled with 0.1 µF + 10 µF capacitors near pin |
| BIT 12 (LSB) (Pin 2) | Digital Output | Least significant bit of 12-bit parallel output; active during DAV high pulse |
| BIT 11–BIT 2 (Pins 3–12) | Digital Outputs | Mid-order data bits; all driven CMOS-compatible with 2.4 V VOH / 0.4 V VOL |
| BIT 1 (MSB) (Pin 13) | Digital Output | Most significant bit; used with MSB (Pin 14) to determine twos complement polarity |
| MSB (Pin 14) | Digital Output | Inverted MSB for twos complement format; distinguishes positive/negative overflow |
| OTR (Pin 15) | Digital Output | Active-HIGH out-of-range flag; asserts when input exceeds ±5 V or selected range by ≥½ LSB |
| DAV (Pin 16) | Digital Output | Data Available strobe; rising edge latches current conversion result into external registers |
| ENCODE (Pin 17) | Digital Input | Rising-edge triggered command; initiates SHA acquisition and full 4-stage conversion cycle |
| VLOGIC (Pin 18) | Digital Power Supply | +5 V digital supply; separate from analog rails to minimize noise coupling into logic outputs |
| DCOM (Pin 19) | Digital Ground | Return path for VLOGIC; must be star-connected to ACOM at single point per layout guidelines |
| REF COM (Pin 20) | Analog Reference Ground | Internal reference ground node; requires low-impedance connection to ACOM for accuracy |
| REF OUT (Pin 21) | Analog Output | 2.5 V reference output; capable of sourcing +2.5 mA in unipolar mode for system reference use |
| AIN1 / AIN2 (Pins 22–23) | Analog Inputs | Differential-capable inputs; pin-strapped with BPO/UPO and SHA OUT to select input range and polarity |
| REF IN (Pin 24) | Analog Input | Accepts external 2.5 V reference to override internal reference for improved dc accuracy or tempco |
| SHA OUT (Pin 25) | Analog Output | Sample-and-hold amplifier output; connected to BPO/UPO for unipolar configurations only |
| BPO/UPO (Pin 26) | Analog Input | Bipolar/Unipolar configuration control; logic level determines input range interpretation |
| ACOM (Pin 27) | Analog Ground | Primary analog return; carries code-dependent currents; must be isolated from DCOM except at single tie-point |
| VCC (Pin 28) | Analog Power Supply | +5 V analog supply; decoupling critical to maintain SNR performance above 10 MHz bandwidth |
Key Features
| Feature | Design Value |
|---|---|
| On-chip Sample-and-Hold Amplifier | Fast-settling SHA enables accurate sampling up to Nyquist rate without external components |
| Pin-Configurable Input Ranges | Four selectable ranges (±5 V, 0–5 V, ±2.5 V, 0–2.5 V) via hardware strapping-no firmware overhead |
| Out-of-Range Detection | Dedicated OTR output flags over/under-range conditions independently of MSB state for robust fault handling |
| Twos Complement or Offset Binary Output | Hardware-selectable data format simplifies interface to DSPs (twos complement) or microcontrollers (offset binary) |
| Laser-Trimmed Thin-Film Resistors | Ensures <±2 LSB INL and stable tempco (±25 ppm/°C) without external calibration in most applications |
Applications
| High-Speed Data Acquisition | Digital Oscilloscope Front-End |
|---|---|
Use Scenario: Simultaneous sampling of multiple sensor channels in automated test equipment operating at 1 MSPS. IC Role / Device Role / Timing Role: Primary ADC capturing transient waveforms with 800 ns conversion latency and deterministic DAV timing. Use Value: Integrated SHA eliminates external hold amplifier, reducing board area and aperture jitter to 20 ps for clean FFT results. |
Use Scenario: Real-time waveform capture in portable oscilloscopes with 12-bit vertical resolution and >10 MHz small-signal bandwidth. IC Role / Device Role / Timing Role: Core digitizer providing 1.25 MSPS sampling with 70 dB SNR+D at 100 kHz for accurate harmonic analysis. Use Value: On-chip 2.5 V reference and ±5 V input range support direct connection to probe amplifier outputs without level-shifting. |
| Communications Baseband Processing | Industrial Process Monitoring |
Use Scenario: Digitizing I/Q baseband signals in software-defined radio receivers with SFDR >84 dB at 1.11 MSPS. IC Role / Device Role / Timing Role: High-linearity ADC enabling clean demodulation of QAM-64 signals with minimal adjacent-channel interference. Use Value: Subranging architecture with digital error correction achieves ENOB of 11.2 bits-critical for maintaining EVM under modulation. |
Use Scenario: Continuous monitoring of motor phase currents and voltages in servo drives with ±5 V isolation amplifier outputs. IC Role / Device Role / Timing Role: Precision ADC interfaced to isolated analog front-end, delivering calibrated 12-bit readings over 0°C to +70°C industrial range. Use Value: Guaranteed no missing codes and ±2 LSB INL ensure reliable detection of overcurrent events without code gaps or dead zones. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9220ARZ | 12-bit, 10 MSPS; requires external REF and SHA; higher power (1.2 W); LVDS outputs | Higher speed needed; system already includes precision reference and clock distribution | Select AD9220ARZ only if throughput >1.25 MSPS is mandatory and board space allows external support circuitry. |
| MAX1186ECM+ | 12-bit, 1.5 MSPS; internal REF (2.048 V); SPI interface; no parallel bus; smaller 32-pin QFN | Space-constrained design; firmware-controlled configuration preferred over hardware strapping | Choose MAX1186ECM+ when serial interface and compact footprint outweigh need for parallel DAV/OTR signaling. |
Compared with AD1671KP, AD9220ARZ trades integration for speed and AD9220ARZ requires external timing and reference infrastructure, while MAX1186ECM+ sacrifices parallel interface simplicity and pin-strappable ranges for size and configurability-making AD1671KP optimal for fixed-function, high-reliability sampling where hardware control and self-contained operation are prioritized.
Availability
AD1671KP is available at Aetrix Electronics and suitable for high-speed data acquisition, digital oscilloscope front-ends, and communications baseband processing requiring stable component supply across extended production cycles.
Supply support for AD1671KP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.
The AD1671KP belongs to Analog Devices' high-speed monolithic ADC product line, designed specifically for applications demanding integrated signal conditioning, low-latency conversion, and guaranteed monotonicity without external calibration.
FAQ
What is the maximum sampling rate supported by the AD1671KP?
The AD1671KP supports a maximum throughput rate of 1.25 MSPS, corresponding to a minimum conversion time of 800 ns. This rate is achievable across its full specified temperature range (0°C to +70°C) with proper power supply decoupling and layout per Figure 8 in the datasheet. The AD1671KP does not require external clocking-the internal timing generator synchronizes all conversion phases upon each ENCODE pulse.
Does the AD1671KP require an external voltage reference?
No, the AD1671KP includes a laser-trimmed 2.5 V internal voltage reference with ±25 mV initial tolerance and ±25 ppm/°C gain drift. REF OUT (Pin 21) provides this reference for system-wide use. However, REF IN (Pin 24) accepts an external 2.5 V reference if tighter dc accuracy or lower temperature coefficient is required-enabling flexible system-level calibration strategies without redesigning the AD1671KP interface.
How is the input voltage range selected on the AD1671KP?
The AD1671KP supports four input ranges-±5 V, 0–5 V, ±2.5 V, and 0–2.5 V-selected exclusively by hardware pin strapping. Configuration depends on connections between AIN1 (Pin 22), AIN2 (Pin 23), BPO/UPO (Pin 26), and SHA OUT (Pin 25), as shown in Figure 2 of the datasheet. No register writes or digital commands are involved; the setting is static and determined at power-up based on physical traces or jumpers.
What does the OTR pin indicate on the AD1671KP?
The OTR (Out of Range) pin (Pin 15) is an active-HIGH digital output that asserts when the analog input voltage exceeds the selected full-scale range by ≥½ LSB. It remains HIGH until the input returns within range and a new conversion completes. OTR works independently of the MSB and BIT 1–12 outputs, allowing unambiguous detection of over/under-range conditions even during overflow-critical for safety-critical monitoring and automatic gain control loops in the AD1671KP-based system.
Can the AD1671KP operate with different logic and analog supply voltages?
Yes, the AD1671KP uses separate supply domains: VCC (Pin 28) and VEE (Pin 1) for analog circuitry (+5 V / –5 V), and VLOGIC (Pin 18) for digital I/O (+5 V). VLOGIC may operate from +4.5 V to +5.5 V independent of analog rails, supporting mixed-voltage system designs. Power supply rejection is specified at ±4 LSB for VCC, VLOGIC, and VEE variations-ensuring stable conversion accuracy despite moderate supply ripple or sequencing mismatches in the AD1671KP power delivery network.
AD1671KP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 1.25M
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- ±5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 28-PLCC (11.51x11.51)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD1671KP FAQ
1.How can I place an order for AD1671KP through Aetrix?
Please submit a Request for Quotation (RFQ) for AD1671KP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD1671KP reliable?
The price and inventory of AD1671KP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD1671KP is usually 5 days.
3.What payment methods are accepted for AD1671KP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD1671KP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD1671KP?
AD1671KP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD1671KP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD1671KP?
For technical support, including AD1671KP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD1671KP requirements.
6.How does Aetrix verify that AD1671KP is sourced from the original manufacturer or authorized distributors?
All AD1671KP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD1671KP meets industry standards.
7.What is the process for return or replacement of AD1671KP?
All AD1671KP units undergo pre-shipment inspection (PSI). If there is an issue with AD1671KP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD1671KP part is unused and in its original packaging.
Return procedure for AD1671KP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD1671KP Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

