Analog Devices Inc. AD1671KQ

Overview

AD1671KQ from Analog Devices is a monolithic 12-bit, 1.25 MSPS analog-to-digital converter with integrated sample-and-hold amplifier and 2.5 V voltage reference. It delivers 70 dB SNR at 100 kHz input, guarantees no missing codes over 0°C to +70°C, and supports pin-configurable ±2.5 V, ±5 V, 0–2.5 V, or 0–5 V input ranges. It is used in high-speed data acquisition systems requiring precise dc accuracy and dynamic performance.

For engineers reviewing the AD1671KQ datasheet, AD1671KQ pinout, AD1671KQ application, or AD1671KQ equivalent, key selection considerations include its 800 ns conversion time, ±2 LSB integral nonlinearity (INL), dual output formats (twos complement/offset binary), out-of-range (OTR) flag, and compatibility with TTL/CMOS logic levels on digital I/O pins.

Technical Context

The AD1671KQ employs a subranging flash architecture with four internal conversion stages: two 3-bit flash ADCs followed by coarse and fine 4-bit flash sections, all coordinated by an on-chip timing generator. Digital error correction compensates for residue errors from early-stage DACs, enabling 12-bit accuracy without hybrid construction.

Its front-end SHA settles in <20 ns aperture delay with only 20 ps jitter, supporting Nyquist-rate sampling up to 1.25 MSPS. Input range selection is implemented via external pin strapping of AIN1, AIN2, BPO/UPO, and SHA OUT - no configuration registers or serial interface are involved.

Key Specifications

Pinout & Package

AD1671KQ is housed in a 28-lead CERDIP (Q-28) package with 0.6-inch width, hermetically sealed ceramic body, and through-hole compatible footprint. Pin layout follows standard dual-in-line convention with analog/digital ground separation and dedicated power rails for analog (VCC/VEE) and logic (VLOGIC) domains.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed 12-bit ADC applications.

Compared with AD1671JQ, AD1671KQ offers tighter ±2 LSB INL for improved dc accuracy in calibration-sensitive instrumentation; compared with AD9220AR, AD1671KQ reduces BOM count and layout complexity by integrating SHA and reference but trades off maximum sample rate.

Availability

AD1671KQ is available at Aetrix Electronics and suitable for high-speed data acquisition, communications receiver front-ends, and industrial process control requiring stable component supply across extended production lifecycles.

Supply support for AD1671KQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.

The AD1671 product line was designed for monolithic, high-speed, high-accuracy data acquisition in instrumentation, military, and industrial systems where hybrid ADCs previously dominated - delivering superior reliability and lower total system cost.

FAQ

What is the maximum sampling rate supported by the AD1671KQ?

The AD1671KQ supports a maximum throughput rate of 1.25 million samples per second (MSPS), corresponding to a minimum conversion time of 800 ns. This rate is achievable under specified operating conditions: VCC = +5 V ±5%, VEE = –5 V ±5%, VLOGIC = +5 V ±10%, and f_IN = 100 kHz. The ENCODE input must be driven with pulses meeting t_ENC ≥ 20 ns high time and t_ENCL ≥ 20 ns low time. Exceeding 1.25 MSPS violates timing specifications and may cause data corruption or missing codes in the AD1671KQ output stream.

Does the AD1671KQ require an external voltage reference?

No, the AD1671KQ does not require an external voltage reference because it integrates a laser-trimmed 2.5 V reference with ±1% initial accuracy and ±25 ppm/°C temperature coefficient. REF OUT (Pin 21) provides this reference for internal conversion and can also serve as a system-level reference. However, an external 2.5 V reference may be applied to REF IN (Pin 24) to improve dc accuracy or reduce temperature drift in metrology-grade applications - doing so disables the internal reference in the AD1671KQ.

How is input range selection implemented on the AD1671KQ?

Input range selection on the AD1671KQ is implemented exclusively via passive pin strapping - no registers, clocks, or digital commands are involved. Four configurations are supported: ±2.5 V, ±5 V, 0–2.5 V, and 0–5 V. Selection depends on connections between AIN1 (Pin 22), AIN2 (Pin 23), BPO/UPO (Pin 26), and SHA OUT (Pin 25), as detailed in Figure 2 of the AD1671KQ datasheet. For example, connecting AIN1 to AIN2 configures ±2.5 V or 0–2.5 V ranges, while connecting either AIN pin to ACOM selects ±5 V or 0–5 V ranges.

What does the OTR pin indicate on the AD1671KQ?

The OTR (Out of Range) pin on the AD1671KQ is an active-HIGH digital output that signals when the analog input voltage exceeds the selected full-scale range by more than ±6 LSB. It remains HIGH until the input returns within range and a new conversion completes. OTR works in conjunction with BIT 1 (MSB) to distinguish high overflow (MSB = 1, OTR = 1) from low overflow (MSB = 0, OTR = 1). This hardware flag eliminates the need for software-based range checking in real-time systems using the AD1671KQ.

Is the AD1671KQ pin-compatible with other grades in the AD1671 family?

Yes, the AD1671KQ is fully pin-compatible with all other AD1671 variants (e.g., AD1671JQ, AD1671AQ, AD1671SQ) in the Q-28 CERDIP package. All share identical pin numbering, electrical interface behavior, and functional block diagram. Differences are limited to grade-specific parameters: INL (±2 LSB for K-grade vs. ±2.5 LSB for J/A-grade), temperature range (0°C to +70°C for KQ), and screening level. No PCB layout changes are required when substituting AD1671KQ for another Q-28 variant, provided system-level specs align with the K-grade performance envelope.