Analog Devices Inc. AD1803JRU

Overview

AD1803JRU from Analog Devices is a low-power, 16-bit AC'97 Rev 2.1–compliant modem/telephony codec with dual-path sigma-delta ADC/DAC, programmable sample rates (6.4–16 kHz), and integrated digital interpolation/decimation filters. It operates from 3.3 V or 5 V supplies, supports AC'97 primary/secondary and DSP serial interfaces, and delivers 90 dB ADC dynamic range at 0 dB PGA gain - enabling voice-band signal processing in PC modems and embedded telephony systems.

For engineers reviewing the AD1803JRU datasheet, AD1803JRU pinout, AD1803JRU application, or AD1803JRU equivalent, this page provides verified functional identity, validated TSSOP-24 pin mapping, confirmed AC'97/DSP interface behavior, real-world power consumption data across operating modes, and two rigorously cross-checked alternative codecs for voiceband modem applications.

Technical Context

The AD1803JRU implements a dual-path sigma-delta architecture: its ADC path includes a 0–42.5 dB programmable gain amplifier (PGA) with 1.0–2.0 dB step resolution and analog input impedance ranging from 10 kΩ (at +20 dB gain) to 110 kΩ (at 0 dB gain); its DAC path features a 45.5–48 dB attenuation span and 85 dB dynamic range at 0 dB output gain. Both paths use digital decimation/interpolation filters with 0.445 × f_S pass-band edge and –78 dB stop-band rejection.

It supports three clocking configurations (12.288/24.576/32.768 MHz XTALI input), offers selectable serial interface modes latched on first RESET deassertion (G[3]/G[2] pins), and integrates seven GPIOs with wake interrupt capability (G[3]/WAKE), monitor output (G[4]/MOUT), and MIC input (G[1]/MIC). Power management includes multiple low-power states with supply currents as low as 1.0 mA (3.3 V, XTAL low-power mode).

Key Specifications

Pinout & Package

AD1803JRU is housed in a 24-lead Thin Shrink Small Outline Package (TSSOP, RU-24) with 0.65 mm lead pitch and exposed thermal pad (not electrically connected). The package supports JEDEC-standard reflow soldering and achieves θ_JA = 83.8°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar modem/telephony codec applications.

Compared with AD1803JRU, AD1881A adds stereo audio capability at the cost of higher supply complexity and reduced design flexibility for pure modem applications, while TLV320AIC10 sacrifices AC'97 compliance and dynamic range to achieve lower unit cost in non-telecom-specific voice interfaces.

Availability

AD1803JRU is available at Aetrix Electronics and suitable for PC modem cards, embedded fax machines, PBX endpoint terminals, and smart appliance voice interfaces requiring stable component supply and long-term industrial availability.

Supply support for AD1803JRU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.

The AD1803JRU belongs to Analog Devices' telephony codec product line, engineered specifically for AC'97-compliant modem and voiceband communication systems requiring low power, high SNR, and flexible serial interface options.

FAQ

What serial interface modes does the AD1803JRU support, and how is mode selection performed?

The AD1803JRU supports AC'97 Rev 2.1 primary/secondary and DSP serial interface modes. Mode selection occurs during power-up: the logic states of G[3]/WAKE (Pin 12) and G[2] (Pin 13) are sampled on the first deassertion of RESET and latched permanently until next power cycle. AD1803JRU then configures BIT_CLK, SYNC, and data framing accordingly - e.g., 12.288 MHz BIT_CLK in AC'97 primary mode or 4.096 MHz BIT_CLK in DSP mode. This hardware-latched mechanism ensures deterministic interface behavior without software configuration overhead.

Does the AD1803JRU require an external crystal, and what clock frequencies are supported?

Yes, the AD1803JRU requires an external clock source on XTALI (Pin 5) for all operational modes except AC'97 secondary mode with no wake-from-event requirement. Supported crystal/clock frequencies are 12.288 MHz, 24.576 MHz, and 32.768 MHz - selected via XTAL[1:0] bits in Register 0x5C. The AD1803JRU uses this clock to derive BIT_CLK and SYNC signals; for example, a 24.576 MHz input yields 4.096 MHz BIT_CLK and 8 kHz SYNC in DSP mode. XTALO (Pin 4) must be floated when using an external clock driver.

How does the AD1803JRU handle programmable gain in the ADC path, and what is the input impedance range?

The AD1803JRU implements a two-stage ADC gain structure: a 0–22.5 dB variable-gain amplifier (VGA) plus a 20 dB fixed-gain stage, yielding total programmable gain from 0 dB to 42.5 dB in 1.0–2.0 dB steps. Input impedance varies with gain setting: 110 kΩ at 0 dB PGA gain and 10 kΩ at +20 dB gain (enabling the 20 dB stage), as specified in the AD1803JRU datasheet Table "Resistance-Rx Input". This impedance shift must be accounted for in anti-alias filter design when interfacing to line transformers or op-amp buffers.

What is the function of the G[4]/MOUT pin on the AD1803JRU, and how is it configured?

G[4]/MOUT (Pin 11) serves as a digital monitor output that mixes ADC and DAC channel data for call-progress tone monitoring. When enabled via GPMON = 1 in Register 0x5E, it delivers a filtered 1 V_p-p signal with ~1500 Hz corner frequency using an external RC network (1 kΩ + parallel 4.7 kΩ/100 nF to DGND). This eliminates external analog mixers and op-amps in speakerphone or fax tone-detection circuits. The AD1803JRU's MOUT path operates independently of main DAC output, allowing simultaneous transmit and monitor functions without signal degradation.

What power supply configurations are supported by the AD1803JRU, and what are the absolute maximum ratings?

The AD1803JRU supports independent 3.3 V ±10% (3.0–3.6 V) or 5.0 V ±10% (4.75–5.25 V) supplies for both AVDD and DVDD - no level-shifting required between analog and digital domains. Absolute maximum ratings are –0.3 V to +6.0 V on all supply pins, with operating ambient temperature limited to 0°C to +70°C. Exceeding 6.0 V on AVDD/DVDD risks permanent damage, as confirmed in the AD1803JRU Absolute Maximum Ratings table. Thermal resistance is θ_JA = 83.8°C/W in TSSOP package, requiring minimal copper area for thermal relief in standard 2-layer PCBs.