Analog Devices Inc. AD1847JP-REEL
- Part No.:
- AD1847JP-REEL
- Manufacturer:
- Analog Devices Inc.
- Category:
- CODECS
- Package:
- 44-LCC (J-Lead)
- Datasheet:
-
AD1847JP-REEL.pdf
- Description:
- 16-BIT SOUNDCOMM CODEC
- Quantity:
- Payment:

- Shipping:

Inventory:15,400
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Product details
Overview
AD1847JP-REEL from Analog Devices is a single-chip 16-bit stereo audio codec integrating ∑∆ ADCs and DACs, programmable gain amplifiers, analog/digital mixing, and on-chip interpolation/decimation filters. It operates from a +5 V supply, supports sample rates from 5.5 kHz to 48 kHz, and delivers 70 dB ADC and 76 dB DAC dynamic range for PC multimedia, business audio, and game sound applications.
For engineers reviewing the AD1847JP-REEL datasheet, AD1847JP-REEL pinout, AD1847JP-REEL application, or AD1847JP-REEL equivalent, key selection considerations include its PLCC-44 package, serial TDM interface compatible with ADSP-21xx DSPs, dual-crystal clock support (16.9344 MHz / 24.576 MHz), independent 1.5 dB-step digital/analog attenuation, and ac-coupled line-level I/O architecture.
Technical Context
The AD1847JP-REEL implements fourth-order ∑∆ modulation for both ADC and DAC paths, with 64× oversampling enabling minimal external anti-aliasing filtering. Its digital datapath processes 16-bit linear PCM, 8-bit µ-law/A-law, or 8-bit unsigned linear data, all internally converted to 16-bit linear format for mixing and filtering.
It features dual crystal oscillators (XTAL1/XTAL2), selectable via internal register, generating precise sample rates including 44.1 kHz and 48 kHz. The serial interface uses Time Division Multiplexing with configurable TSSEL mode (1-wire or 2-wire), supporting up to 32 time slots and synchronized frame sync (SDFS) and clock (SCLK) signals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit ADC and DAC - enables 96 dB theoretical dynamic range in linear PCM mode |
| Dynamic Range (A-weighted) | 70 dB (ADC), 76 dB (DAC) - meets CD-quality audio fidelity requirements |
| Sample Rate Range | 5.5 kHz to 48 kHz - covers telephony, voice, CD, and professional audio sampling standards |
| Supply Voltage | +4.75 V to +5.25 V - compatible with standard 5 V logic and power rails |
| Power Consumption | 140 mA operating, 4 mW power-down - supports low-power suspend modes in portable systems |
| Analog Input Options | Four stereo analog inputs (LINE1/LINE2/AUX1/AUX2) - enables flexible signal routing and mixing |
| Digital Interface | TDM serial port with SCLK/SDFS/SDI/SDO - interoperable with ADSP-21xx and other multi-channel DSP serial ports |
Pinout & Package
AD1847JP-REEL is housed in a 44-lead Plastic Leaded Chip Carrier (PLCC) package, surface-mountable with J-lead geometry and 1.27 mm pitch. Thermal and mechanical characteristics comply with JEDEC MS-026.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SCLK | Serial Clock I/O | Bidirectional clock signal; outputs 12.288 MHz (XTAL1) or 11.2896 MHz (XTAL2) when BM = HI; required for synchronous TDM data transfer |
| SDFS | Frame Sync I/O | Generates or accepts frame synchronization at half or full sample rate; defines time slot boundaries for 16-bit data words |
| SDI/SDO | Serial Data In/Out | SDI accepts 16-bit control/playback data (MSB-first); SDO returns status/capture data; three-state output enables bus sharing |
| L_LINE1 / R_LINE1 | Analog Input | Primary stereo line input pair; ac-coupled, 10 kΩ input impedance, ±2.8 Vp-p full-scale range |
| L_OUT / R_OUT | Analog Output | Line-level stereo outputs; 0.707 Vrms full-scale, 600 Ω output impedance, mute settles near VREF (2.25 V) |
| XTAL1I / XTAL1O | Clock Input/Output | 24.576 MHz crystal oscillator pins; default clock source powering 48 kHz and related sample rates |
| VREF / VREFI | Voltage Reference | VREF = 2.25 V buffered reference for dc-biasing; VREFI requires 1 µF bypass to GNDA for stability |
| BM / RESET / PWRDOWN | Control Inputs | BM configures master/slave TDM role; RESET initializes registers; PWRDOWN disables analog circuitry and reduces current to 400 µA |
Key Features
| Feature | Design Value |
|---|---|
| On-chip analog filters | Integrated switched-capacitor and continuous-time anti-imaging filters eliminate need for external reconstruction components |
| Independent channel attenuation | 1.5 dB step resolution across –94.5 dB range for both analog DAC output and digital mix paths |
| Zero-crossing volume control | Attenuation changes occur only at signal zero crossings, eliminating audible "zipper" noise during playback |
| Dual crystal clock support | Simultaneous 16.9344 MHz and 24.576 MHz crystal inputs enable precise generation of 44.1 kHz and 48 kHz sample rates |
| Flexible digital data formats | Hardware-supported conversion between 16-bit linear PCM, 8-bit µ-law, A-law, and unsigned linear - simplifies host software integration |
Applications
| PC Audio Subsystem | Game Console Sound Engine |
|---|---|
Use Scenario: Integrated audio processing on ISA/PCI motherboard or PCMCIA sound card with Windows Sound System compliance. IC Role / Device Role / Timing Role: Primary stereo codec handling simultaneous analog capture and playback, clocked by onboard crystal, interfacing directly to host CPU or DSP via serial TDM. Use Value: Single-chip integration reduces BOM count and PCB area; 76 dB DAC dynamic range ensures CD-quality output without external op-amps. | Use Scenario: Real-time audio mixing and effects processing in cartridge-based or embedded gaming hardware. IC Role / Device Role / Timing Role: Audio front-end providing low-latency analog I/O, digital mixing of game audio streams, and programmable gain for microphone or line-in sources. Use Value: Independent 1.5 dB-step analog attenuation per channel enables precise volume balancing across multiple game audio layers. |
| Business VoIP Terminal | Multimedia Kiosk Controller |
Use Scenario: Full-duplex voice communication terminal supporting µ-law companding for PSTN gateway compatibility. IC Role / Device Role / Timing Role: Codec performing A-law/µ-law expansion/compression, echo cancellation preprocessing, and jitter-tolerant serial interface to baseband processor. Use Value: Hardware µ-law/A-law support eliminates host CPU overhead; 70 dB ADC dynamic range captures speech clearly even in noisy office environments. | Use Scenario: Public-access kiosk requiring robust audio feedback, background music, and voice prompt playback in retail or transportation settings. IC Role / Device Role / Timing Role: Central audio interface managing multiple analog inputs (microphone, line-in) and driving amplified line outputs to speakers or headphones. Use Value: Four stereo analog inputs allow concurrent monitoring of ambient audio, user voice, and auxiliary media sources without external multiplexers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar stereo audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD1845JST | 44-lead TQFP package; identical electrical specs and register map; lacks CLKOUT pin functionality | Preferred for space-constrained PCB layouts where PLCC footprint is prohibitive | Select AD1845JST only if TQFP assembly infrastructure is available and CLKOUT is unused |
| CS4231-KQZ | AC'97-compliant interface; different register structure; 18-bit internal path; higher THD+N (–70 dB vs –72 dB) | Designed for AC'97 motherboard architectures; requires different driver stack and timing setup | Choose CS4231-KQZ only when targeting AC'97-compliant host platforms and firmware support exists |
Compared with AD1847JP-REEL, AD1845JST offers identical audio performance in a smaller TQFP package but removes CLKOUT utility, while CS4231-KQZ provides AC'97 system integration at the cost of non-drop-in register compatibility and slightly lower DAC SNR.
Availability
AD1847JP-REEL is available at Aetrix Electronics and suitable for PC audio subsystems, game console sound engines, business VoIP terminals, multimedia kiosks, and legacy industrial audio interfaces requiring stable component supply and long-term obsolescence management.
Supply support for AD1847JP-REEL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design and manufacturing operations worldwide.
The AD1847JP-REEL belongs to Analog Devices' SoundPort® family of integrated audio codecs, engineered specifically for cost-sensitive, single-supply PC and multimedia applications requiring high-fidelity analog I/O and flexible digital audio interfacing.
FAQ
What is the primary function of the AD1847JP-REEL in an audio system?
The AD1847JP-REEL serves as a complete stereo audio codec, performing simultaneous analog-to-digital conversion (ADC) and digital-to-analog conversion (DAC) with integrated programmable gain, analog/digital mixing, and on-chip filtering. In systems using the AD1847JP-REEL, it replaces discrete ADC/DAC, PGA, and filter components, reducing design complexity and board space while maintaining 70–76 dB dynamic range across its supported sample rates.
Does the AD1847JP-REEL support both 44.1 kHz and 48 kHz sample rates natively?
Yes, the AD1847JP-REEL supports both 44.1 kHz and 48 kHz sample rates natively through its dual-crystal architecture: a 16.9344 MHz crystal enables 44.1 kHz and related rates (e.g., 22.05 kHz), while a 24.576 MHz crystal enables 48 kHz and related rates (e.g., 24 kHz). The AD1847JP-REEL selects between crystals via internal register control, and initialization times are specified as 171 ms for power-up selection and 6 ms for subsequent switching.
How does the AD1847JP-REEL handle volume control to avoid audible artifacts?
The AD1847JP-REEL implements zero-crossing detection for analog and digital attenuation changes, ensuring that volume adjustments occur only when the audio signal crosses 0 V. This prevents discontinuities that cause "zipper" noise. Each channel has its own detector and timer (8 ms timeout at 48 kHz), guaranteeing smooth transitions even during silent passages - a critical behavior confirmed in the AD1847JP-REEL's functional description and timing specifications.
Can the AD1847JP-REEL operate with a single 5 V supply, and what are the supply current requirements?
Yes, the AD1847JP-REEL is fully specified for operation from a single +5 V supply (4.75 V to 5.25 V), with separate VDD (digital) and VCC (analog) pins that may be tied together. Total operating supply current is 140 mA (70 mA analog + 70 mA digital) into a 10 kΩ line output load; in power-down mode, current drops to 400 µA per supply rail, reducing total dissipation to 4 mW - values explicitly measured and guaranteed in the AD1847JP-REEL datasheet under standard test conditions.
What digital audio formats does the AD1847JP-REEL support, and how are they selected?
The AD1847JP-REEL supports four digital audio formats: 16-bit two's-complement linear PCM, 8-bit unsigned linear PCM, 8-bit µ-law, and 8-bit A-law. Format selection is controlled by dedicated bits in the AD1847JP-REEL's Control Word register. Internally, all data is processed as 16-bit linear PCM; compression/expansion occurs only at the SDI/SDO interface, preserving precision throughout the signal chain as documented in Figures 2 and 3 of the datasheet.
AD1847JP-REEL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- AD1847
- Package/Case:
- 44-LCC (J-Lead)
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- Stereo Audio
- Data Interface:
- Parallel, Serial
- Resolution (Bits):
- 16 b
- Number of ADCs / DACs:
- 2 / 2
- Sigma Delta:
- Yes
- S/N Ratio, ADCs / DACs (db) Typ:
- -
- Dynamic Range, ADCs / DACs (db) Typ:
- 70 / 76
- Voltage - Supply, Analog:
- 4.75V ~ 5.25V
- Voltage - Supply, Digital:
- 4.75V ~ 5.25V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 44-PLCC (16.59x16.59)
AD1847JP-REEL FAQ
1.How can I place an order for AD1847JP-REEL through Aetrix?
Please submit a Request for Quotation (RFQ) for AD1847JP-REEL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD1847JP-REEL reliable?
The price and inventory of AD1847JP-REEL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD1847JP-REEL is usually 5 days.
3.What payment methods are accepted for AD1847JP-REEL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD1847JP-REEL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD1847JP-REEL?
AD1847JP-REEL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD1847JP-REEL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD1847JP-REEL?
For technical support, including AD1847JP-REEL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD1847JP-REEL requirements.
6.How does Aetrix verify that AD1847JP-REEL is sourced from the original manufacturer or authorized distributors?
All AD1847JP-REEL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD1847JP-REEL meets industry standards.
7.What is the process for return or replacement of AD1847JP-REEL?
All AD1847JP-REEL units undergo pre-shipment inspection (PSI). If there is an issue with AD1847JP-REEL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD1847JP-REEL part is unused and in its original packaging.
Return procedure for AD1847JP-REEL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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