Analog Devices Inc. AD1955ARSRL
- Part No.:
- AD1955ARSRL
- Manufacturer:
- Analog Devices Inc.
- Category:
- Digital to Analog Converters (DAC)
- Package:
- 28-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
AD1955ARSRL.pdf
- Description:
- IC DAC STEREO 24BIT SACD 28SSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD1955ARSRL from Analog Devices is a high-performance, 24-bit stereo multibit sigma-delta DAC with integrated digital interpolation filters and differential current-output architecture, supporting PCM up to 192 kHz and native DSD (64fS/128fS) SACD playback. It delivers 120 dB A-weighted SNR (stereo), –110 dB THD+N, and 110 dB stop-band attenuation at 48 kHz, targeting premium audio playback in DVD-Audio, SACD, and home theater systems.
For engineers reviewing the AD1955ARSRL datasheet, AD1955ARSRL pinout, AD1955ARSRL application, or AD1955ARSRL equivalent, key selection criteria include its 28-lead SSOP package, dual-channel differential current output (8.64 mA p-p), SPI-configurable serial interface (I²S/right-justified/DSP/left-justified), and hardware/software mute with zero-detection flags for real-time signal monitoring.
Technical Context
The AD1955ARSRL implements a multibit sigma-delta modulator with "Perfect Differential Linearity Restoration" to suppress idle tones and reduce noise floor, combined with data-directed scrambling for low jitter sensitivity. Its digital filter engine supports 8×, 4×, and 2× oversampling modes with programmable pass-band ripple (±0.0002 dB) and group delay as low as 903.8 µs in INT8 mode at 48 kHz.
It operates in three primary data path modes: PCM (16–24-bit, 32–192 kHz), External Digital Filter (8fS/4fS/2fS input), and SACD (DSD bitstream with Normal or Phase Modulation mode). Master clock support includes 256fS, 512fS, and 768fS for SACD, and variable fS ratios for PCM and external filter modes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 24-bit - Full dynamic range for high-fidelity audio reproduction without dithering artifacts |
| SNR / DNR (A-weighted) | 120 dB (stereo), 123 dB (mono) - Enables >20-bit effective resolution in quiet listening environments |
| THD + N | –110 dB - Meets Class A audio system linearity requirements at full-scale 1 kHz output |
| Differential Output Range | 8.64 mA p-p - Matches standard I/V converter biasing for ±3 V RMS analog swing with 2 kΩ termination |
| Stop-Band Attenuation | 110 dB at 44.1/48 kHz - Prevents aliasing energy from folding into audible band during digital filtering |
| Sample Rate Support | 32 kHz to 192 kHz PCM; 64fS/128fS DSD - Covers Red Book CD, DVD-Audio, SACD, and studio master formats |
| Supply Voltage | 5 V ±10% (AVDD & DVDD) - Simplifies single-rail power design with no LDO requirement |
Pinout & Package
AD1955ARSRL is housed in a 28-lead Shrink Small Outline Package (SSOP), RoHS-compliant, rated for –40°C to +85°C operation. Thermal resistance is θJA = 109.0°C/W, requiring minimal heatsinking in typical audio PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, DVDD | Digital power supply | 5 V digital rail; requires local 0.1 µF + 10 µF bypassing per datasheet Figure 6 |
| 10, 19, AGND | Analog ground reference | Separate analog ground plane required; must be tied to DGND at single point near AVDD/DVDD decoupling |
| 11–12, 17–18, IOUTR+/–, IOUTL+/– | Differential current outputs | Active-sink outputs; require external I/V converters with bias current capability (–3.24 mA per output) |
| 20–21, ZEROR/ZEROL | Zero-detection flag outputs | Indicate silent input (1024 LRCLK periods) or SACD mute pattern detection; configurable active-high/low via register |
| 22, MUTE | Hardware mute control | Asynchronous active-high signal; provides >100 dB analog attenuation without click/pop |
| 23, PD/RST | Power-down/reset input | Active-low reset; places device in low-power state and clears SPI registers to defaults on rising edge |
| 24–26, CDATA/CLATCH/CCLK | SPI control interface | 16-bit MSB-first serial port; CCLK may be continuous or burst-mode; CLATCH latches data on rising edge |
| 27, MCLK | Master clock input | Accepts 256fS/512fS/768fS for SACD or variable fS ratios for PCM/external filter modes |
Key Features
| Feature | Design Value |
|---|---|
| "Perfect Differential Linearity Restoration" | Eliminates harmonic distortion from DAC element mismatch, enabling <–110 dB THD+N without trimming |
| Data-Directed Scrambling | Reduces sensitivity to input clock jitter, preserving SNR even with low-cost crystal oscillators or PLL-based clocks |
| On-chip clickless volume control | 14-bit unsigned attenuation per channel via SPI; zero-crossing update prevents audible transients during level changes |
| SACD mute pattern detection | Identifies standardized DSD mute sequences (~22 ms duration), asserting ZEROL/ZEROR for downstream silence management |
| Flexible serial port modes | Supports I²S, left/right-justified, DSP, and packed-mode timing-enables glueless interface to DSPs, SACD decoders, and AES/EBU receivers |
Applications
| High-End DVD Audio Players | SACD Playback Systems |
|---|---|
Use Scenario: Decoding and converting 24-bit/192 kHz PCM streams from DVD-Audio discs into analog line-level signals. IC Role / Device Role / Timing Role: Final-stage stereo DAC with integrated digital filtering and hardware mute; synchronized to disc transport's master clock. Use Value: Delivers 120 dB SNR and <–110 dB THD+N, meeting critical dynamic range and distortion targets for audiophile-grade playback without external post-filtering. |
Use Scenario: Native DSD bitstream conversion in SACD players using 64fS or 128fS sampling rates. IC Role / Device Role / Timing Role: Dedicated SACD-mode DAC with phase modulation support and DSD_SCLK/DSD_PHASE interface; operates as master or slave to decoder IC. Use Value: Eliminates need for external DSD-to-PCM conversion, preserving native DSD signal integrity and enabling true 1-bit high-resolution playback. |
| Home Theater AV Receivers | Professional Digital Mixing Consoles |
Use Scenario: Multi-format audio decoding backend handling PCM, Dolby Digital, DTS, and SACD sources in a single chassis. IC Role / Device Role / Timing Role: Dual-role DAC supporting both PCM and SACD paths; uses ZEROL/ZEROR flags to auto-mute unused channels during format switching. Use Value: Reduces firmware complexity by offloading zero-detection and mute sequencing to hardware, ensuring seamless source transitions without audible glitches. |
Use Scenario: High-precision monitor path DAC in 24-track digital mixers requiring ultra-low-noise analog output for critical listening. IC Role / Device Role / Timing Role: Stereo current-output DAC with differential signaling; interfaces to discrete op-amp I/V stages (e.g., AD797) for lowest possible THD+N. Use Value: 123 dB mono SNR and ±0.1° interchannel phase deviation preserve stereo imaging accuracy and transient fidelity across the full 20 Hz–20 kHz band. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar stereo audio DAC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AK4396VT | 24-bit, 192 kHz delta-sigma DAC; 118 dB SNR; single-ended voltage output; no native DSD support | Lacks SACD/DSD interface pins and zero-detection flags; requires external de-emphasis circuitry | Preferred where cost-sensitive designs omit SACD and rely on PCM-only sources with simpler analog output stage |
| TI PCM1794A | 24-bit, 192 kHz multibit DAC; 120 dB SNR; differential current output; no DSD or zero-flag functionality | Supports identical PCM sample rates and package (28-SSOP), but lacks SACD mode, DSD pins, and ZEROL/ZEROR outputs | Valid alternative when SACD playback is not required and existing layout uses same pin-compatible footprint |
Compared with AK4396VT and PCM1794A, AD1955ARSRL uniquely integrates SACD-native DSD processing, hardware zero-detection flags, and Perfect Differential Linearity Restoration-making it the only option among the three that satisfies full DVD-Audio + SACD compliance without external logic or firmware compensation.
Availability
AD1955ARSRL is available at Aetrix Electronics and suitable for high-end DVD audio players, SACD playback systems, and home theater AV receivers requiring stable component supply, long-term lifecycle support, and guaranteed RoHS-compliant manufacturing.
Supply support for AD1955ARSRL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with over 50 years of innovation in precision signal chain solutions.
The AD1955ARSRL belongs to Analog Devices' high-fidelity audio DAC product line, engineered specifically for premium consumer and professional audio equipment demanding uncompromised dynamic range, ultra-low distortion, and multi-format playback compatibility.
FAQ
What is the maximum supported PCM sample rate for AD1955ARSRL?
The AD1955ARSRL supports PCM sample rates up to 192 kHz in INT2 mode, with corresponding master clock frequencies of 384fS (for 192 kHz nominal input). It also accepts 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, and 96 kHz, all with full 24-bit resolution and A-weighted SNR ≥120 dB. The AD1955ARSRL maintains consistent performance across this range due to its adaptive digital filter architecture.
Does AD1955ARSRL support native DSD playback, and what clocking modes are required?
Yes, AD1955ARSRL supports native DSD playback in both Normal Mode (64fS or 128fS) and Phase Modulation Mode (128fS or 256fS), with fS = 44.1 kHz. In Normal Mode, DSD_SCLK runs at 2.8224 MHz (64fS) or 5.6448 MHz (128fS); DSD_PHASE is grounded. In Phase Mode, DSD_PHASE carries a 2.8224 MHz reference while DSD_SCLK runs at 5.6448 MHz or 11.2896 MHz. The AD1955ARSRL configures mode via Control Register 1, Bit 6.
How does the zero-detection feature work on AD1955ARSRL, and which pins indicate it?
The AD1955ARSRL asserts ZEROL (Pin 21) and ZEROR (Pin 20) when detecting sustained silence: 1024 consecutive LRCLK periods of zero data in PCM mode, or ~22 ms of SACD mute pattern in DSD mode. Polarity is software-selectable (active-high or active-low) via Control Register 1, Bit 8. These flags enable downstream mute control or display indicators without CPU polling, reducing system latency and firmware overhead in the AD1955ARSRL implementation.
What are the power supply requirements for AD1955ARSRL, and how should supplies be decoupled?
AD1955ARSRL requires separate 5 V ±10% analog (AVDD) and digital (DVDD) supplies, each drawing ~20 mA (analog) and ~22 mA (digital) under typical operation. Per datasheet Figure 6, each supply must be decoupled with parallel 0.1 µF ceramic + 10 µF tantalum capacitors placed within 5 mm of Pins 1 (DVDD) and 15 (AVDD). AGND and DGND must connect at a single point near the decoupling network to minimize ground bounce in the AD1955ARSRL layout.
Can AD1955ARSRL operate without an external reference voltage, and what impact does that have on performance?
Yes, AD1955ARSRL can use the internal FILTR reference (2.39 V typical) instead of an external 2.80 V bias, simplifying BOM count. However, THD+N degrades slightly at elevated temperatures when using FILTR due to reduced IREF headroom. For best THD+N stability across –40°C to +85°C, Analog Devices recommends using an external 2.80 V reference (e.g., AD1582) with the AD1955ARSRL's VBIAS pin, as specified in the "Audio Outputs" section of the datasheet.
AD1955ARSRL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SSOP (0.209", 5.30mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Number of Bits:
- -
- Number of D/A Converters:
- -
- Settling Time:
- -
- Output Type:
- -
- Differential Output:
- -
- Data Interface:
- -
- Reference Type:
- -
- Voltage - Supply, Analog:
- -
- Voltage - Supply, Digital:
- -
- INL/DNL (LSB):
- -
- Architecture:
- -
- Operating Temperature:
- -
- Supplier Device Package:
- 28-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD1955ARSRL FAQ
1.How can I place an order for AD1955ARSRL through Aetrix?
Please submit a Request for Quotation (RFQ) for AD1955ARSRL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD1955ARSRL reliable?
The price and inventory of AD1955ARSRL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD1955ARSRL is usually 5 days.
3.What payment methods are accepted for AD1955ARSRL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD1955ARSRL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD1955ARSRL?
AD1955ARSRL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD1955ARSRL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD1955ARSRL?
For technical support, including AD1955ARSRL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD1955ARSRL requirements.
6.How does Aetrix verify that AD1955ARSRL is sourced from the original manufacturer or authorized distributors?
All AD1955ARSRL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD1955ARSRL meets industry standards.
7.What is the process for return or replacement of AD1955ARSRL?
All AD1955ARSRL units undergo pre-shipment inspection (PSI). If there is an issue with AD1955ARSRL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD1955ARSRL part is unused and in its original packaging.
Return procedure for AD1955ARSRL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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