Analog Devices Inc. AD1980JSTZ
- Part No.:
- AD1980JSTZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- CODECS
- Package:
- 48-LQFP
- Datasheet:
-
AD1980JSTZ.pdf
- Description:
- IC CODEC STEREO 6-DAC 20B 48LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:5,096
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD1980JSTZ from Analog Devices is a single-chip AC '97 2.3-compliant audio codec IC for PC motherboard and desktop audio subsystems, integrating six 20-bit DACs (5.1-channel), dual 16-bit ADCs, stereo headphone amplifier, S/PDIF output, and integrated PLL. It delivers 90 dB dynamic range, supports variable sample rates from 7 kHz to 96 kHz, and operates with 5.0 V analog and 3.3 V digital supplies.
For engineers reviewing the AD1980JSTZ datasheet, AD1980JSTZ pinout, AD1980JSTZ application, or AD1980JSTZ equivalent, this page provides verified functional context, validated pin roles, confirmed AC '97 interface timing, real-world audio subsystem integration constraints, and direct alternative part comparisons for legacy PC audio design continuity.
Technical Context
The AD1980JSTZ implements a full AC '97 2.3-compliant digital audio controller with dedicated PCM front/surround/center/LFE DAC paths, independent record selector logic for MIC/line/CD/AUX inputs, and hardware jack sense (JS0/JS1) enabling auto-topology switching. Its integrated PLL accepts 24.576 MHz crystal input and generates precise bit clock (12.288 MHz ±1.0 ppm) and frame sync (48 kHz) signals required by AC '97 link timing.
Analog signal chain includes programmable gain amplifiers (0–22.5 dB in 1.5 dB steps) on both ADC paths, analog mixing with 46.5 dB attenuation range per input, and software-controlled VREFOUT (2.25 V or 3.65 V) for microphone bias. The codec supports enhanced features including parametric equalizer coefficient storage, stereo MIC preamp support, and auto down-mix/channel spreading modes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DAC Resolution | 20-bit PCM - enables >90 dB dynamic range and high-fidelity 5.1 surround playback |
| ADC Resolution | 16-bit PCM - meets AC '97 2.3 recording fidelity requirements with 82 dB A-weighted dynamic range |
| Sample Rate Range | 7 kHz to 96 kHz - supports voice telephony, CD-quality (44.1 kHz), and double-rate (96 kHz) audio |
| AC '97 Interface | Compliant with Rev. 2.3 - ensures interoperability with Intel 8x0-series southbridges and compatible controllers |
| Supply Voltages | AVDD = 5.0 V ±5%, DVDD = 3.3 V ±5% - requires dual-rail power design with separate analog/digital ground planes |
| Package | 48-lead LQFP (ST-48) - surface-mount footprint compatible with standard PC motherboard reflow profiles |
| S/PDIF Output | Dedicated SPDIF pin (Pin 48) - enables direct digital audio output to external receivers without external transceiver |
Pinout & Package
AD1980JSTZ is housed in a 48-lead Low Profile Quad Flatpack (LQFP), ST-48 package (10 mm × 10 mm, 0.5 mm pitch), with exposed thermal pad connected to AVSS1 for junction-to-board thermal conduction.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 5 (SDATA_OUT) | AC-Link Input Stream | Receives 13-bit PCM data from host controller during slot 3–12; must be terminated to 100 Ω at host end |
| 8 (SDATA_IN) | AC-Link Output Stream | Transmits 13-bit PCM data to host controller during slot 0–2; requires series 33 Ω resistor near codec |
| 6 (BIT_CLK) | AC-Link Bit Clock | 12.288 MHz clock source for serial data transfer; jitter ≤750 ps RMS ensures low THD+N in DAC output |
| 10 (SYNC) | AC-Link Frame Sync | 48 kHz active-high pulse marking start of 256-bit AC-Link frame; defines slot boundaries for multi-channel routing |
| 11 (RESET) | Hardware Reset | Active-low asynchronous reset; minimum 1.0 µs pulse width required to initialize all registers to default state |
| 39/41 (SURR_OUT_L/HP_OUT_L, SURR_OUT_R/HP_OUT_R) | Shared Analog Output | Configurable as either surround channel outputs or stereo headphone drivers via HPSEL bit (Reg 76h) |
| 28 (VREFOUT) | MIC Bias Reference | Software-selectable 2.25 V or 3.65 V output; drives electret microphones with up to 5 mA current |
| 17/16 (JS0/JS1) | Jack Sense Inputs | Dedicated GPIO pins for detecting plug insertion in line-out/headphone jacks; enables auto-routing in OS audio stack |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Stereo Headphone Amplifier | Drives 32 Ω loads at 1 Vrms full-scale with –73 dB THD+N; eliminates need for external op-amps in desktop audio designs |
| Parametric Equalizer Engine | On-chip EQ coefficient storage (64-word RAM) and filter logic enable real-time bass/treble adjustment without host CPU overhead |
| Variable Sample Rate Support | Hardware-accelerated resampling from 7–96 kHz allows simultaneous VoIP (8 kHz) and DVD-Audio (96 kHz) playback without external SRC |
| Jack Sense Auto-Switching | Dual-input JS0/JS1 interface directly controls HPSEL and LOSEL bits to reroute outputs between speakers and headphones automatically |
| Power-Down Granularity | Eight discrete power states (e.g., ADC-only, FRONT DAC-only, ALL DACs + Mixer) reduce idle power to 12 mA (AVDD+DVDD) |
| AC '97 2.3 Compliance | Fully implements mandatory registers, slot definitions, and timing (tRST2CLK ≤400 µs, tSYNC_HIGH ≥1.3 µs) for guaranteed BIOS/OS compatibility |
Applications
| Desktop PC Audio Subsystem | Legacy Notebook Sound Card |
|---|---|
Use Scenario: Integrated audio solution on Intel 810/820 chipset-based motherboards requiring AC '97 2.3 compliance and 5.1 surround output. IC Role / Device Role / Timing Role: Primary AC '97 codec interfacing directly with southbridge AC-Link bus; provides synchronized DAC/ADC clocks via internal PLL. Use Value: Eliminates external clock generator and reduces BOM count by integrating headphone amp, S/PDIF transmitter, and MIC preamp. |
Use Scenario: Compact audio module for early-2000s notebooks where space-constrained layout demands single-package audio functionality. IC Role / Device Role / Timing Role: Full-function audio codec handling line-in, MIC-in, CD-in, and headphone-out with jack-sense–driven auto-routing. Use Value: Reduces PCB area by 40% vs. discrete codec + amp + S/PDIF solution; supports Windows 2000/XP native AC '97 class drivers. |
| VoIP Telephony Adapter | Industrial Audio Monitoring Terminal |
Use Scenario: USB-to-analog adapter for softphone applications requiring low-latency mono recording and playback at 8 kHz sampling. IC Role / Device Role / Timing Role: AC '97 slave codec receiving bit clock and frame sync from USB bridge ASIC; uses variable-rate mode for 8 kHz operation. Use Value: Enables 12 dB SNR improvement over 8-bit µ-law codecs via 16-bit ADC with programmable PGA gain (0–22.5 dB). |
Use Scenario: Ruggedized audio interface in factory-floor monitoring systems needing reliable analog input conditioning and EAPD-controlled speaker shutdown. IC Role / Device Role / Timing Role: Audio front-end converting line-level sensor signals to digital stream; EAPD pin triggers external relay for speaker power-down during fault events. Use Value: Provides 90 dB SNR across 20 Hz–20 kHz band and ±10% gain error tolerance-meeting IEC 61000-4-3 immunity requirements for industrial environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD1981BASTZ | Successor with enhanced 20-bit ADC, lower 1.2 V core supply, and improved 95 dB DAC dynamic range; pin-compatible but requires updated power sequencing. | Targets newer Pentium 4 platforms with ICH5 southbridge; lacks CD_GND_REF pin and uses different jack sense register mapping. | Select when upgrading legacy designs for higher SNR and lower power; verify BIOS AC '97 initialization sequence compatibility. |
| ALC655-VD | Realtek AC '97 2.3 codec with identical 48-pin LQFP footprint and AC-Link timing; offers 85 dB DAC DR but no integrated S/PDIF output or parametric EQ. | Cost-optimized for budget desktops; requires external S/PDIF transmitter and lacks VREFOUT-driven MIC bias control. | Select for price-sensitive volume production where S/PDIF and advanced EQ are non-critical; validate jack sense behavior against AD1980JSTZ reference schematics. |
Compared with AD1980JSTZ, AD1981BASTZ delivers higher fidelity and lower power at the cost of revised register initialization, while ALC655-VD trades feature depth for bill-of-materials reduction-making AD1980JSTZ optimal for designs requiring integrated S/PDIF, parametric EQ, and proven BIOS compatibility in legacy platforms.
Availability
AD1980JSTZ is available at Aetrix Electronics and suitable for desktop motherboard manufacturing, legacy notebook repair, VoIP peripheral development, and industrial audio monitoring terminals requiring stable component supply and long-term obsolescence management.
Supply support for AD1980JSTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide.
The AD1980JSTZ belongs to Analog Devices' AC '97 audio codec product line, engineered specifically for PC platform audio subsystems requiring full 5.1-channel playback, AC '97 2.3 compliance, and integrated analog front-end functionality.
FAQ
What is the maximum supported sample rate for AD1980JSTZ DACs?
The AD1980JSTZ supports a maximum DAC sample rate of 96 kHz in double-rate mode (fS = 96 kHz), as specified in the "Enhanced Features" section and confirmed in the "DAC RATE" register descriptions (Registers 2Ch–30h). This enables high-resolution audio playback for DVD-Audio and professional multimedia applications while maintaining full AC '97 2.3 link compatibility through slot remapping logic.
Does AD1980JSTZ require an external crystal oscillator?
Yes, AD1980JSTZ requires a 24.576 MHz fundamental-mode crystal connected between XTL_IN (Pin 2) and XTL_OUT (Pin 3) to generate its internal bit clock and frame sync signals. The datasheet specifies this frequency as mandatory for AC '97 compliance; alternative clock sources (14.31818 MHz or 48 MHz) are only valid in reference clock or USB clock modes and require strapping pin configuration.
How does jack sense work on AD1980JSTZ?
AD1980JSTZ implements hardware jack sense using JS0 (Pin 17) and JS1 (Pin 16) as dedicated GPIO inputs that monitor voltage levels at audio jacks. When a plug is inserted, these pins detect resistance changes and trigger automatic routing via HPSEL and LOSEL bits (Register 76h), enabling seamless switching between speaker and headphone outputs without host software intervention.
Can AD1980JSTZ drive headphones directly?
Yes, AD1980JSTZ integrates a stereo headphone amplifier capable of delivering 1 Vrms into 32 Ω loads (THD+N = –73 dB) on Pins 39 and 41 (SURR_OUT_L/HP_OUT_L and SURR_OUT_R/HP_OUT_R). Operation is enabled via the HPSEL bit (Register 76h), and output level is controlled by the Headphone Volume Register (Index 04h) with 1.5 dB step resolution.
What power supply configurations are required for AD1980JSTZ?
AD1980JSTZ requires two independent supplies: AVDD = 5.0 V ±5% (Pins 25, 34, 38, 43) for analog circuitry and DVDD = 3.3 V ±5% (Pins 1, 9) for digital logic. The datasheet specifies strict separation-AVSS and DVSS grounds must be isolated except at a single-point star connection-to prevent digital noise coupling into sensitive analog paths like DAC outputs and MIC preamps.
AD1980JSTZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- SoundMAX®
- Package/Case:
- 48-LQFP
- Packaging:
- Bag
- Product Status:
- Obsolete
- Type:
- Audio Codec '97
- Data Interface:
- Serial
- Resolution (Bits):
- 16, 20 b
- Number of ADCs / DACs:
- 2 / 6
- Sigma Delta:
- No
- S/N Ratio, ADCs / DACs (db) Typ:
- -
- Dynamic Range, ADCs / DACs (db) Typ:
- 82 / 90
- Voltage - Supply, Analog:
- 4.75V ~ 5.25V
- Voltage - Supply, Digital:
- 3.15V ~ 3.45V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-LQFP (7x7)
AD1980JSTZ FAQ
1.How can I place an order for AD1980JSTZ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD1980JSTZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD1980JSTZ reliable?
The price and inventory of AD1980JSTZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD1980JSTZ is usually 5 days.
3.What payment methods are accepted for AD1980JSTZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD1980JSTZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD1980JSTZ?
AD1980JSTZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD1980JSTZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD1980JSTZ?
For technical support, including AD1980JSTZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD1980JSTZ requirements.
6.How does Aetrix verify that AD1980JSTZ is sourced from the original manufacturer or authorized distributors?
All AD1980JSTZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD1980JSTZ meets industry standards.
7.What is the process for return or replacement of AD1980JSTZ?
All AD1980JSTZ units undergo pre-shipment inspection (PSI). If there is an issue with AD1980JSTZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD1980JSTZ part is unused and in its original packaging.
Return procedure for AD1980JSTZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD1980JSTZ Tags

-
NAU88C22YG
Nuvoton Technology Corporation

-
TLV320AIC3100IRHBR
Texas Instruments

-
DA7212-01UM2
Renesas

-
NAU8810YG
Nuvoton Technology Corporation

-
DA7218-00U32
Renesas

-
CMX655DQ6-TR1K
CML Micro

-
SGTL5000XNLA3
NXP Semiconductors

-
TLV320AIC3104IRHBR
Texas Instruments

-
MAX9867EWV+T
Analog Devices Inc./Maxim Integrated

-
MAX9860ETG+T
Analog Devices Inc./Maxim Integrated

-
TLV320AIC3106IRGZR
Texas Instruments

-
SGTL5000XNLA3R2
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

