Analog Devices Inc. AD1983JCPZ-REEL
- Part No.:
- AD1983JCPZ-REEL
- Manufacturer:
- Analog Devices Inc.
- Category:
- CODECS
- Package:
- 32-VFQFN Exposed Pad, CSP
- Datasheet:
-
AD1983JCPZ-REEL.pdf
- Description:
- IC CODEC HD AUDIO 32-LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:95,298
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Product details
Overview
AD1983JCPZ-REEL from Analog Devices is a high-definition audio codec IC designed for PC motherboard and notebook audio subsystems. It integrates dual 24-bit DACs (front headphone/line out), dual 20-bit ADCs (mic/line in), S/PDIF output, digital PC beep generator, and jack-sensing GPIOs in a single 32-lead LFCSP_VQ package. It supports HD Audio sample rates up to 48 kHz with >90 dB dynamic range and integrated headphone amplifiers driving 32 Ω loads.
For engineers reviewing the AD1983JCPZ-REEL datasheet, AD1983JCPZ-REEL pinout, AD1983JCPZ-REEL application, or AD1983JCPZ-REEL equivalent, key selection criteria include HD Audio compliance, jack presence detection architecture, programmable microphone bias (MIC_BIAS-B/C), analog mixer routing, and S/PDIF_TX capability at 16-/24-bit resolution.
Technical Context
The AD1983JCPZ-REEL implements an HD Audio-compliant interface with 24 MHz BIT_CLK, SYNC frame sync, and SDATA_IN/SDATA_OUT serial streams. Its internal architecture includes independent 20-bit Σ-Δ ADCs (NID 04) and 24-bit Σ-Δ DACs (NID 03), each with dedicated gain control (±22.5 dB PGA, −46.5 dB to +3 dB output gain), and a full analog mixer (NID 0E) supporting stereo-to-mono conversion (NID 0F).
Jack sensing uses a single SENSE_A line with resistor-tree encoding across four ports (A–D), supported by GPIO_0/JS_1 and GPIO_1/JS_0 for classical DC jack sense on headphone and line-out jacks. The device supports verb-based configuration per Intel HD Audio specification, including unsolicited event reporting and configurable power-down modes per functional node.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DAC Resolution | 24-bit, enabling high-fidelity playback with ≥90 dB dynamic range and −86 dB THD+N on line out. |
| ADC Resolution | 20-bit, supporting high-SNR recording with −85 dB A-weighted dynamic range and −92 dB THD. |
| HD Audio Sample Rates | 8–48 kHz (including 44.1 kHz), fully compliant with Intel High Definition Audio specification for PC audio subsystems. |
| S/PDIF Output | 16-/24-bit, 32/44.1/48 kHz, providing isolated digital audio output compatible with external receivers or DACs. |
| Microphone Bias Outputs | MIC_BIAS-B and MIC_BIAS-C, programmable (0%/50%/80%), delivering up to 5 mA each for electret condenser microphones. |
| Analog Supply | AVDD = 5.0 V ±10%, required for analog signal path integrity; AVDD pins (22, 26) must be well filtered to avoid noise coupling. |
| Digital Supply | DVDD = 3.3 V ±10%, powering HD Audio link interface and digital logic; DVSS (Pin 4, 29) forms dedicated return path. |
| Package | 32-lead Pb-free LFCSP_VQ (5 mm × 5 mm, CP-32-4), thermally enhanced with exposed pad for θJA = 58.8°C/W. |
Pinout & Package
AD1983JCPZ-REEL is housed in a 32-lead, 5 mm × 5 mm, very thin quad LFCSP_VQ package (JEDEC MO-220-VHHD-2, CP-32-4) with exposed thermal pad. The package supports reflow soldering and provides low thermal resistance (θJC bottom = 1.52°C/W) for sustained audio performance in space-constrained PC platforms.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PORT-A_L / PORT-A_R | Headphone output channels | Drive 32 Ω stereo headphones with −46.5 dB to +3 dB gain; mute automatically when jack sensed via GPIO_0/JS_1. |
| PORT-D_L / PORT-D_R | Line output channels | Deliver −46.5 dB to +3 dB analog line-level signals (1 V rms); muted when headphones are inserted. |
| MONO_OUT | Monaural telephony output | Provides mono mix for speakerphone subsystem; supports microphone-to-MONO routing for hands-free operation. |
| PORT-B_L / PORT-B_R | Front microphone inputs | Accept mic or line signals with 0–30 dB boost; bias supplied via MIC_BIAS-B; support stereo array capture. |
| PORT-C_L / PORT-C_R | Rear line/mic inputs | Accept line or mic signals with 0–30 dB boost; bias supplied via MIC_BIAS-C; selectable source for record path. |
| GPIO_0/JS_1 | Headphone jack sense / GPIO | Configurable as classical DC jack sense (high = HP present) or general-purpose I/O for external circuit control. |
| GPIO_1/JS_0 | Line-out jack sense / GPIO | Configurable as classical DC jack sense (high = line-out jack present) or general-purpose I/O. |
| SENSE_A | Multi-jack presence input | Single analog input for resistor-tree jack detection across Ports A–D; requires 2.67 kΩ pull-up to AVDD or SENSE_SRC. |
| S/PDIF_OUT | Digital audio output | Transmits 16-/24-bit S/PDIF stream at 32/44.1/48 kHz; electrically isolated from analog ground paths. |
| SDATA_IN / SDATA_OUT | HD Audio serial data | Full-duplex 24-bit PCM data interface; SDATA_IN carries host-to-codec commands/audio; SDATA_OUT returns codec-to-host audio. |
| BIT_CLK / SYNC / RESET | HD Audio timing/control | 24 MHz bit clock, frame sync, and hardware reset enable strict HD Audio link synchronization and initialization. |
Key Features
| Feature | Design Value |
|---|---|
| HD Audio-compliant interface | Fully implements Intel HD Audio specification (NID mapping, verb support, unsolicited events) for plug-and-play OS integration. |
| Integrated jack sensing engine | Supports up to four jacks (A–D) on one SENSE_A line using resistor-tree encoding; eliminates need for external sense ICs. |
| Programmable microphone bias | Dual independent bias outputs (MIC_BIAS-B/C) with 0%/50%/80% settings, enabling flexible electret mic support across front/rear ports. |
| Digital PC beep generator | On-chip 32-step (3 dB steps) beep tone generator (NID 10), eliminating external beep circuitry and reducing BOM cost. |
| Advanced power management | Per-node power-down (DAC, ADC, mixer) reduces dissipation to ≤26 mA AVDD/30 mA DVDD in idle states. |
| No AFILT pins | Removes external anti-aliasing filter components, simplifying layout and lowering system cost without compromising audio fidelity. |
Applications
| Desktop Motherboard Audio | Notebook Integrated Audio |
|---|---|
Use Scenario: Primary audio codec on ATX/mATX motherboards supporting front-panel headphone, rear-panel line-in/out, and mic jacks. IC Role / Device Role / Timing Role: HD Audio link slave device handling all analog/digital conversion, mixing, and jack presence detection under host controller orchestration. Use Value: Enables full HD Audio feature set (S/PDIF, jack sense, mono speakerphone) with single-chip integration and no AFILT components. | Use Scenario: Embedded audio solution in 13–15" notebooks requiring compact footprint, low power, and front-panel headphone/mic support. IC Role / Device Role / Timing Role: System-level audio hub managing headphone drive, mic preamp, line-in routing, and S/PDIF output synchronized to 24 MHz BIT_CLK. Use Value: Reduces board area via 5 mm × 5 mm LFCSP_VQ package and lowers power consumption with per-block power-down during suspend. |
| VoIP Speakerphone Systems | HD Audio Reference Designs |
Use Scenario: Telephony subsystem in all-in-one PCs or conference devices needing mono speakerphone output with echo cancellation support. IC Role / Device Role / Timing Role: Provides MONO_OUT pin and microphone-to-mono routing (via NID 0B/0F) for real-time speakerphone signal path. Use Value: Eliminates external mono mixer; enables software-controlled mic boost (0–30 dB) and mute sequencing for clean acoustic coupling. | Use Scenario: Validation platform for Intel HD Audio driver stack, BIOS integration, and jack-sense autoconfiguration testing. IC Role / Device Role / Timing Role: Reference HD Audio codec demonstrating full verb support (F00–F0D, 715–723), GPIO wake, and unsolicited event handling. Use Value: Accelerates firmware development with documented NID/widget mapping (Tables 6–10) and verified jack sense resistor values (Table 13). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar HD Audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Realtek ALC887-GR | Integrated 8-channel DAC/ADC; supports 7.1 surround; lacks S/PDIF output and mono speakerphone output pin. | Targeted at mainstream desktops with multi-channel audio; not suitable for mono telephony or S/PDIF-only systems. | Select AD1983JCPZ-REEL when mono speakerphone (MONO_OUT), S/PDIF_TX, or precise jack-sense resistor-tree implementation is required. |
| Cirrus Logic CS4207-KQZ | 24-bit/96 kHz DAC/ADC; supports AC'97 and I²S; no HD Audio verb interface or jack sense GPIOs. | Designed for legacy AC'97 or embedded I²S systems; incompatible with Intel HD Audio host controllers. | Choose AD1983JCPZ-REEL for native HD Audio compliance, GPIO-based jack sense, and Windows driver certification readiness. |
Compared with ALC887-GR and CS4207-KQZ, AD1983JCPZ-REEL delivers targeted HD Audio functionality-jack presence detection with resistor-tree encoding, dedicated MONO_OUT for telephony, and S/PDIF output-without unnecessary channel expansion or legacy interface overhead.
Availability
AD1983JCPZ-REEL is available at Aetrix Electronics and suitable for desktop motherboard audio, notebook integrated audio, VoIP speakerphone systems, and HD Audio reference designs requiring stable component supply and long-term industrial availability.
Supply support for AD1983JCPZ-REEL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The AD1983JCPZ-REEL belongs to Analog Devices' HD Audio codec product line, engineered specifically for Intel High Definition Audio-compliant PC audio subsystems with emphasis on jack sensing, low-power operation, and system-level integration.
FAQ
What is the primary function of the AD1983JCPZ-REEL in a PC audio system?
The AD1983JCPZ-REEL serves as a high-definition audio codec IC that performs analog-to-digital and digital-to-analog conversion, audio mixing, jack presence detection, and S/PDIF output generation. It interfaces directly with an Intel HD Audio host controller via a 24 MHz BIT_CLK and serial data links, enabling full Windows audio stack compatibility. The AD1983JCPZ-REEL handles all critical audio signal paths-including front headphone, rear line-in/out, microphone preamplification, and mono speakerphone-within a single 32-lead LFCSP_VQ package.
Does the AD1983JCPZ-REEL support S/PDIF output, and what are its operational parameters?
Yes, the AD1983JCPZ-REEL supports S/PDIF output via Pin 32 (S/PDIF_OUT). It operates at sample rates of 32 kHz, 44.1 kHz, and 48 kHz with 16-bit or 24-bit resolution. The output complies with IEC 60958 standards and is electrically isolated from analog ground paths to prevent noise coupling. The AD1983JCPZ-REEL does not require external level-shifting circuitry and drives standard S/PDIF receivers directly, making it suitable for connecting to external DACs or AV receivers.
How does jack presence detection work on the AD1983JCPZ-REEL, and which pins are involved?
Jack presence detection on the AD1983JCPZ-REEL uses a resistor-tree method on the SENSE_A pin (Pin 9), allowing up to four jacks (Ports A–D) to be identified by unique pull-down resistor values (5.1 kΩ, 10.0 kΩ, 20.0 kΩ, 39.2 kΩ). Additional support comes from GPIO_0/JS_1 (Pin 30) for headphone jack sense and GPIO_1/JS_0 (Pin 31) for line-out jack sense. The AD1983JCPZ-REEL's internal sensing engine interprets these inputs to trigger OS-level auto-configuration, and SENSE_SRC (Pin 21) enables current-reduced sensing mode when connected via a 2.67 kΩ resistor.
What are the power supply requirements for the AD1983JCPZ-REEL, and how are they distributed?
The AD1983JCPZ-REEL requires two independent supplies: AVDD = 5.0 V ±10% (Pins 22, 26) for the analog signal path, and DVDD = 3.3 V ±10% (Pin 6) for digital logic and the HD Audio interface. AVSS (Pins 17, 29) and DVSS (Pin 4) must be separated and routed to dedicated ground planes to minimize noise coupling. The AD1983JCPZ-REEL draws 33 mA from AVDD and 38 mA from DVDD under active 48 kHz operation, with power-down modes reducing current to ≤26 mA (AVDD) and ≤30 mA (DVDD).
Can the AD1983JCPZ-REEL drive headphones directly, and what are the output specifications?
Yes, the AD1983JCPZ-REEL integrates stereo headphone amplifiers on PORT-A_L and PORT-A_R (Pins 27, 28), capable of driving 32 Ω loads with a full-scale output of 1 V rms (2.83 V p-p) and adjustable gain from −46.5 dB to +3 dB. It features automatic muting when a headphone is detected via GPIO_0/JS_1, and supports 1.5 dB gain steps for precise volume control. The AD1983JCPZ-REEL achieves −76 dB THD+N into 32 Ω, meeting high-fidelity playback requirements for consumer notebooks and desktops.
AD1983JCPZ-REEL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- SoundMAX®
- Package/Case:
- 32-VFQFN Exposed Pad, CSP
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Type:
- Audio Codec, HD
- Data Interface:
- Serial
- Resolution (Bits):
- 24 b
- Number of ADCs / DACs:
- 2 / 2
- Sigma Delta:
- No
- S/N Ratio, ADCs / DACs (db) Typ:
- 85 / 85
- Dynamic Range, ADCs / DACs (db) Typ:
- 85 / 90
- Voltage - Supply, Analog:
- 4.5V ~ 5.5V
- Voltage - Supply, Digital:
- 2.97V ~ 3.63V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-LFCSP-VQ (5x5)
AD1983JCPZ-REEL FAQ
1.How can I place an order for AD1983JCPZ-REEL through Aetrix?
Please submit a Request for Quotation (RFQ) for AD1983JCPZ-REEL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD1983JCPZ-REEL reliable?
The price and inventory of AD1983JCPZ-REEL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD1983JCPZ-REEL is usually 5 days.
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5.How can I obtain technical support or documentation for AD1983JCPZ-REEL?
For technical support, including AD1983JCPZ-REEL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD1983JCPZ-REEL requirements.
6.How does Aetrix verify that AD1983JCPZ-REEL is sourced from the original manufacturer or authorized distributors?
All AD1983JCPZ-REEL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD1983JCPZ-REEL meets industry standards.
7.What is the process for return or replacement of AD1983JCPZ-REEL?
All AD1983JCPZ-REEL units undergo pre-shipment inspection (PSI). If there is an issue with AD1983JCPZ-REEL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD1983JCPZ-REEL part is unused and in its original packaging.
Return procedure for AD1983JCPZ-REEL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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