My Inquiry
My Account
Analog Devices Inc. AD1985JST-REEL
- Part No.:
- AD1985JST-REEL
- Manufacturer:
- Analog Devices Inc.
- Category:
- CODECS
- Package:
- 48-LQFP
- Datasheet:
-
AD1985JST-REEL.pdf
- Description:
- IC CODEC STEREO 6-DAC 20B 48LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:160,250
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD1985JST-REEL from Analog Devices is an AC '97 2.3-compliant stereo audio codec IC with six DAC channels for 5.1 surround sound, 20-bit resolution on all DACs, >90 dB dynamic range, integrated stereo headphone amplifiers, and S/PDIF output. It serves as the primary audio interface in desktop motherboards and legacy PC platforms requiring high-fidelity multichannel playback and flexible analog input routing.
For engineers reviewing the AD1985JST-REEL datasheet, AD1985JST-REEL pinout, AD1985JST-REEL application, or AD1985JST-REEL equivalent, key selection criteria include AC '97 v2.3 timing compliance, jack-sense–enabled topology switching, software-configurable VREFOUT for microphone bias, and support for variable sample rates from 7 kHz to 96 kHz with 1 Hz resolution in standard mode.
Technical Context
The AD1985JST-REEL implements a dual-path sigma-delta architecture: 16-bit ADCs for analog inputs (MIC, LINE_IN, CD, AUX, PHONE_IN) and six independent 20-bit sigma-delta DACs for FRONT, SURR, CENTER, LFE, MONO, and HP outputs. Its integrated PLL accepts 24.576 MHz, 14.31818 MHz, or 48 MHz reference clocks to generate internal bit clock (12.288 MHz) and sample rate timing.
It features full AC '97 v2.3 link interface (SYNC, BITCLK, SDATA_IN/OUT), hardware EAPD control, four jack sense inputs (JS0–JS3), and register-mapped digital functions including parametric EQ, auto down-mix, channel spreading, and stereo microphone passthrough - all controllable via AC '97 index/data register protocol.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DAC Resolution | 20-bit - enables ≥90 dB dynamic range and low THD (–90 dB for line outputs) |
| ADC Resolution | 16-bit - supports high-SNR recording paths with programmable PGA gain up to +22.5 dB |
| Sample Rate Range | 7 kHz to 96 kHz in 1 Hz steps - allows precise matching to legacy AC '97 host controllers and custom audio workflows |
| Analog Supply | AVDD = 4.5–5.5 V - powers analog core including 20-bit DACs, headphone drivers, and VREFOUT circuitry |
| Digital Supply | DVDD = 2.97–3.63 V - supplies AC '97 interface logic, register control, and digital filters |
| Dynamic Range | >90 dB A-weighted - meets CD-quality playback requirements for front/surround/C/LFE DACs |
| Package | 48-lead LQFP - surface-mount footprint compatible with standard PC motherboard layout practices |
Pinout & Package
AD1985JST-REEL is housed in a 48-lead LQFP (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow AC '97 v2.3 signal grouping: dual analog I/O banks (MIC1/2, LINE_IN_L/R, CD_L/R, AUX_L/R, PHONE_IN), six DAC output pairs (FRONT/SURR/CENTER/LFE/MONO/HP), four jack sense inputs (JS0–JS3), EAPD control, SPDIF output, and full AC '97 digital interface (SYNC, BITCLK, SDATA_IN/OUT, ID0/ID1, RESET).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| XTL_IN / XTL_OUT | Clock oscillator interface | Accepts 24.576 MHz crystal or external clock; generates internal 12.288 MHz BITCLK and sample timing |
| SDATA_IN / SDATA_OUT | AC '97 serial data path | SDATA_IN carries host-to-codec commands and PCM data; SDATA_OUT returns ADC samples and status |
| SYNC / BIT_CLK | AC '97 frame sync and bit clock | SYNC defines slot boundaries; BIT_CLK at 12.288 MHz times all 256-bit AC '97 frames |
| MIC1 / MIC2 | Differential stereo microphone inputs | Support +10/+20/+30 dB PGA gain; share bias via software-controlled VREFOUT (2.25 V or 3.7 V) |
| LINE_OUT_L/R / SURR_OUT_L/R | Configurable analog outputs | LOSEL bit swaps function between front line-out and surround outputs; HPSEL enables headphone drive on same pins |
| EAPD | External amplifier power-down | Open-drain output that disables external power amps during low-power states or jack insertion events |
| JS0–JS3 | Jack sense inputs | Four GPIOs detect plug insertion/removal; enable auto topology switching (e.g., mono mic → stereo headset) |
| VREFOUT | Programmable microphone bias voltage | Software-selectable 0 V / +2.25 V / +3.7 V output; reduces crosstalk when sharing MIC/CENTER-LFE jacks |
Key Features
| Feature | Design Value |
|---|---|
| Integrated parametric equalizer (EQ) | 10-band configurable filter stored in on-chip coefficient RAM; applied pre-DAC for real-time tone shaping without host CPU load |
| Advanced jack sensing with auto topology switching | Four dedicated JS inputs detect plug type and position; automatically reconfigures signal routing (e.g., stereo mic → mono line-in) |
| Variable-rate audio from 7 kHz to 96 kHz | Independent rate control per DAC/ADC channel; 1 Hz resolution below 48 kHz enables precise synchronization with non-standard audio sources |
| Stereo microphone analog passthrough | Direct analog path from MIC1/MIC2 to SURR_OUT_L/R or HP_OUT_L/R; bypasses ADC/DAC for ultra-low-latency voice communication |
| Software-enabled outputs for jack sharing | Center/LFE and MIC pins share physical connectors; VREFOUT and OMS register bits prevent crosstalk and enable safe dual-role operation |
| Auto down-mix and channel spreading | Hardware-accelerated matrixing converts 5.1 content to stereo or mono; eliminates need for host-side DSP in basic playback scenarios |
Applications
| Desktop Motherboard Audio Subsystem | Legacy Industrial PC Audio Interface |
|---|---|
Use Scenario: Primary audio codec on ATX/BTX motherboard supporting Windows XP-era AC '97 host controller. IC Role / Device Role / Timing Role: AC '97 v2.3 slave device handling bidirectional PCM streaming, mixer control, and jack detection via standard index/data registers. Use Value: Eliminates need for discrete op-amps, clock buffers, or external mic bias; integrates 5.1 DACs, stereo ADCs, headphone drivers, and S/PDIF TX in one 48-pin LQFP. |
Use Scenario: Audio I/O module in ruggedized IPC used for machine monitoring and operator voice feedback. IC Role / Device Role / Timing Role: Fixed-function audio interface with deterministic AC '97 timing, EAPD-triggered amp shutdown, and robust jack-sense–driven state transitions. Use Value: Enables hot-plug detection of headsets/mics without OS driver changes; supports mono telephony (MONO_OUT) and stereo line monitoring simultaneously. |
| Embedded SoundMAX® Reference Design | PC Beep Generator + Audio Hub |
Use Scenario: Core component in Analog Devices' SoundMAX® reference platform for OEM audio validation. IC Role / Device Role / Timing Role: Fully featured AC '97 codec demonstrating EQ, jack enumeration, SPDIF output, and variable-rate playback across multiple Windows/Linux drivers. Use Value: Provides production-ready register map, layout guidelines, and thermal design (θJA = 50.1°C/W) validated for 70°C ambient operation. |
Use Scenario: System-level beep generator and analog audio concentrator in BIOS/firmware-controlled embedded systems. IC Role / Device Role / Timing Role: Generates PC speaker tones via internal waveform generator while routing analog inputs to DACs or ADCs based on runtime configuration. Use Value: Replaces discrete beep circuitry; supports simultaneous LINE_IN monitoring and HP_OUT playback with independent volume control per channel. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD1984JST-REEL | 16-bit DAC resolution (vs. 20-bit); no S/PDIF output; lower dynamic range (84 dB) | Targeted at cost-sensitive desktop boards without 5.1 or digital audio output requirements | Select when system does not require >90 dB SNR or S/PDIF connectivity; shares same LQFP package and AC '97 register map |
| WM8775SEDS/V | I²S/Left-Justified interface (not AC '97); 24-bit DAC/ADC; no integrated headphone amp or jack sense | Used in modern embedded Linux audio subsystems with custom SoC interfaces, not legacy PC platforms | Choose only if migrating from AC '97 to I²S and accepting loss of EAPD, JS, and PC beep functionality |
Compared with AD1985JST-REEL, AD1984JST-REEL offers reduced audio fidelity but identical pinout and firmware compatibility, whereas WM8775SEDS/V requires complete interface redesign and forfeits jack-sense automation and integrated power management.
Availability
AD1985JST-REEL is available at Aetrix Electronics and suitable for desktop motherboard manufacturing, industrial PC audio integration, and legacy embedded system repair requiring stable component supply and long-term obsolescence mitigation.
Supply support for AD1985JST-REEL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with deep expertise in precision audio, converter, and interface technologies.
The AD1985JST-REEL belongs to Analog Devices' SoundMAX® AC '97 codec family, engineered specifically for PC platform audio subsystems requiring AC '97 v2.3 compliance, multichannel surround capability, and robust jack-sense–driven user interaction.
FAQ
What is the maximum supported sample rate for AD1985JST-REEL DAC channels?
The AD1985JST-REEL supports double-rate audio at 96 kHz for all DAC channels (FRONT, SURR, CENTER, LFE). This is configured via dedicated rate registers (e.g., PCM FRONT DAC RATE at 0x2C) and requires appropriate AC '97 slot allocation and host controller support. Standard mode operates up to 48 kHz with 1 Hz resolution.
Does AD1985JST-REEL include integrated headphone amplifiers?
Yes, AD1985JST-REEL integrates stereo headphone amplifiers on pins SURR_OUT_L/HP_OUT_L (39) and SURR_OUT_R/HP_OUT_R (41). These outputs are software-selectable via HPSEL bit in Register 0x76 and deliver 1 Vrms into 32 Ω loads with –75 dB THD, enabling direct connection to headphones without external amplification.
How does jack sensing work on AD1985JST-REEL?
AD1985JST-REEL provides four dedicated jack sense inputs (JS0–JS3) that monitor voltage levels on attached connectors. Combined with the Advanced Jack Sense Register (0x78), it detects plug insertion, identifies jack type (mono/stereo/mic/headphone), and triggers automatic signal routing changes - such as switching CENTER/LFE pins to MIC function when a stereo headset is inserted.
Can AD1985JST-REEL operate with a 14.31818 MHz reference clock?
Yes, AD1985JST-REEL supports 14.31818 MHz as a valid reference clock input on XTL_IN (Pin 2) in "reference clock mode." The internal PLL locks to this frequency and derives the required 12.288 MHz BITCLK and sample timing, maintaining full AC '97 v2.3 compliance without requiring a 24.576 MHz crystal.
What is the purpose of the VREFOUT pin on AD1985JST-REEL?
VREFOUT (Pin 28) delivers a programmable bias voltage (0 V, +2.25 V, or +3.7 V) for stereo microphone inputs. Configured via VREFH/VREFD bits in Register 0x76, it ensures optimal signal-to-noise ratio and minimizes crosstalk - especially critical when sharing MIC and CENTER/LFE jacks, where 0 V setting improves isolation beyond –60 dB at 100 Hz.
AD1985JST-REEL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- SoundMAX®
- Package/Case:
- 48-LQFP
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Type:
- Audio Codec '97
- Data Interface:
- Serial
- Resolution (Bits):
- 16, 20 b
- Number of ADCs / DACs:
- 2 / 6
- Sigma Delta:
- No
- S/N Ratio, ADCs / DACs (db) Typ:
- -
- Dynamic Range, ADCs / DACs (db) Typ:
- 84 / 90
- Voltage - Supply, Analog:
- 4.5V ~ 5.5V
- Voltage - Supply, Digital:
- 2.97V ~ 3.63V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-LQFP (7x7)
AD1985JST-REEL FAQ
1.How can I place an order for AD1985JST-REEL through Aetrix?
Please submit a Request for Quotation (RFQ) for AD1985JST-REEL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD1985JST-REEL reliable?
The price and inventory of AD1985JST-REEL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD1985JST-REEL is usually 5 days.
3.What payment methods are accepted for AD1985JST-REEL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD1985JST-REEL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD1985JST-REEL?
AD1985JST-REEL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD1985JST-REEL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD1985JST-REEL?
For technical support, including AD1985JST-REEL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD1985JST-REEL requirements.
6.How does Aetrix verify that AD1985JST-REEL is sourced from the original manufacturer or authorized distributors?
All AD1985JST-REEL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD1985JST-REEL meets industry standards.
7.What is the process for return or replacement of AD1985JST-REEL?
All AD1985JST-REEL units undergo pre-shipment inspection (PSI). If there is an issue with AD1985JST-REEL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD1985JST-REEL part is unused and in its original packaging.
Return procedure for AD1985JST-REEL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD1985JST-REEL Tags
-
NAU88C22YG
Nuvoton Technology Corporation
-
TLV320AIC3100IRHBR
Texas Instruments
-
DA7212-01UM2
Renesas
-
NAU8810YG
Nuvoton Technology Corporation
-
DA7218-00U32
Renesas
-
CMX655DQ6-TR1K
CML Micro
-
SGTL5000XNLA3
NXP Semiconductors
-
TLV320AIC3104IRHBR
Texas Instruments
-
MAX9867EWV+T
Analog Devices Inc./Maxim Integrated
-
MAX9860ETG+T
Analog Devices Inc./Maxim Integrated
-
TLV320AIC3106IRGZR
Texas Instruments
-
SGTL5000XNLA3R2
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
