Analog Devices Inc. AD4682BCPZ-RL7
- Part No.:
- AD4682BCPZ-RL7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-WFQFN Exposed Pad, CSP
- Datasheet:
-
AD4682BCPZ-RL7.pdf
- Description:
- IC ADC 16BIT SAR 16LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:1,420
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD4682BCPZ-RL7 from Analog Devices is a dual, simultaneous-sampling, 16-bit pseudo-differential SAR ADC with 1 MSPS throughput, 87.5 dB SNR (VREF = 3.3 V), ±2.5 LSB INL max, and integrated 2.5 V reference - designed for high-precision motor current/position feedback and power quality monitoring in industrial control systems.
For engineers reviewing the AD4682BCPZ-RL7 datasheet, AD4682BCPZ-RL7 pinout, AD4682BCPZ-RL7 application, or AD4682BCPZ-RL7 equivalent, this page delivers verified specs, real-world timing behavior, validated dual-channel isolation performance, oversampling configuration impact on dynamic range, and confirmed pin-compatible alternatives for layout-constrained designs.
Technical Context
The AD4682BCPZ-RL7 implements two independent SAR cores sharing a single serial interface with dual SDO outputs (SDOA/SDOB), enabling true simultaneous sampling of two pseudo-differential inputs (AINA±, AINB±) on the falling edge of CS. Its internal 2.5 V buffered reference supports external use via REFIO, while configurable oversampling (OSR up to ×8) and resolution boost (to 18-bit effective) are implemented in dedicated on-chip hardware blocks.
Conversion is controlled by standard SPI-compatible signals (CS, SCLK, SDI) with 1.65–3.6 V logic compatibility, and features alert generation via SDOB/ALERT when conversion results exceed programmable thresholds - all operating across −40°C to +125°C with 3 mm × 3 mm LFCSP packaging and exposed pad thermal management.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit native; supports 18-bit effective via resolution boost mode |
| Throughput Rate | 1 MSPS - defines minimum inter-conversion interval of 1 µs |
| SNR | 87.5 dB at 1 kHz input with 3.3 V external reference - sets usable dynamic range for low-noise signal capture |
| INL Error (max) | ±2.5 LSB - limits absolute accuracy error to ±0.038% of full scale |
| Channel Isolation | −110 dB - ensures minimal crosstalk between simultaneous ADC A and B conversions |
| Reference | Integrated 2.5 V ±10 ppm/°C buffered reference; supports external 2.5–3.3 V reference via REFIO |
| Power Dissipation | 107 mW typical at 1 MSPS - enables thermal design with θJA = 55.4°C/W in standard PCB layouts |
Pinout & Package
AD4682BCPZ-RL7 is housed in a 3 mm × 3 mm, 16-lead LFCSP package with exposed pad (EPAD) that must be soldered to PCB ground for thermal and electrical integrity. Pin 1 and Pin 10 are GND reference points; Pin 16 is SCLK; Pin 12 is active-low CS; Pins 13 and 14 serve as SDOA and SDOB/ALERT respectively.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1, 10) | Ground reference | Low-impedance return path for analog/digital circuitry; must connect to solid ground plane |
| VLOGIC (Pin 2) | Logic supply | 1.65–3.6 V interface voltage; decoupled with 1 µF capacitor to GND |
| REGCAP (Pin 3) | Internal regulator decoupling | 1.9 V internal rail node; requires 1 µF capacitor to GND for stability |
| VCC (Pin 4) | Analog power supply | 3.0–3.6 V main supply; decoupled with 1 µF capacitor to GND |
| AINB−/AINB+ (Pins 5, 6) | Pseudo-differential input B | AINB− typically biased at VREF/2; AINB+ accepts 0–VREF input range |
| AINA−/AINA+ (Pins 7, 8) | Pseudo-differential input A | Identical structure to AINB±; enables simultaneous dual-channel acquisition |
| REFCAP (Pin 9) | Reference decoupling | 2.5 V bandgap node; requires 0.1 µF capacitor to GND |
| REFIO (Pin 11) | Reference I/O | 2.5 V output or 2.5–3.3 V input; 1 µF decoupling required regardless of mode |
| CS (Pin 12) | Chip select | Active-low conversion trigger and SPI frame sync; falling edge initiates sampling |
| SDOA (Pin 13) | Serial data output A | MSB-first twos-complement output for ADC A or register reads |
| SDOB/ALERT (Pin 14) | Dual-function terminal | Configurable as ADC B output or open-drain alert signal on threshold violation |
| SDI (Pin 15) | Serial data input | SPI command/data input for register writes and configuration |
| SCLK (Pin 16) | Serial clock | 25 ns min period; controls data transfer timing on rising/falling edges |
| EPAD | Exposed thermal pad | Must be connected to PCB ground for thermal dissipation and EMI reduction |
Key Features
| Feature | Design Value |
|---|---|
| Dual simultaneous sampling | Enables precise phase-aligned capture of motor current and position signals without time skew |
| Oversampling (OSR up to ×8) | Improves SNR by 5.9 dB (to 93.4 dB) and reduces noise floor for narrowband applications |
| Alert function with programmable thresholds | Hardware-level over/under-range detection eliminates host processor polling overhead |
| Resolution boost to 18-bit effective | Extends usable code count from 65,536 to 262,144 for enhanced small-signal resolution |
| −40°C to +125°C operation | Validated performance across full industrial temperature range without derating |
Applications
| Motor Control Position Feedback | Power Quality Monitoring |
|---|---|
Use Scenario: Real-time angular position tracking of PMSM/BLDC motors using resolver or encoder interface circuits. IC Role / Device Role / Timing Role: Dual-channel simultaneous sampling captures position and commutation signals with <100 ps aperture delay match to preserve rotor angle fidelity. Use Value: Enables field-oriented control (FOC) with sub-degree angular resolution and deterministic latency under 1 µs per sample pair. | Use Scenario: Continuous waveform capture of AC line voltage/current for harmonic distortion (THD), flicker, and sag/swell analysis. IC Role / Device Role / Timing Role: High SNR (87.5 dB) and −110 dB channel isolation support simultaneous voltage and current sensing without cross-coupling artifacts. Use Value: Delivers Class A compliance for IEC 61000-4-30 Ed. 3 with no external averaging required at 1 MSPS sampling rate. |
| Motor Control Current Sense | Erbium-Doped Fiber Amplifier (EDFA) |
Use Scenario: Shunt-based phase current measurement in servo drives with fast transient response requirements. IC Role / Device Role / Timing Role: Pseudo-differential inputs reject common-mode noise from PWM switching; 1 MSPS throughput captures current ripple at 20 kHz switching frequencies. Use Value: Achieves <0.1% gain error match between channels for accurate three-phase current reconstruction. | Use Scenario: Precision bias current control and photodiode monitoring in optical amplifier modules. IC Role / Device Role / Timing Role: Dual ADC channels independently monitor pump laser current and output photodiode voltage with synchronized sampling. Use Value: Maintains <±0.5 mV offset error match across temperature to stabilize optical gain within ±0.05 dB. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual simultaneous-sampling ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD4683BCPZ-RL7 | Same pinout and architecture but rated for 500 kSPS max; lower power (5.6 mA vs. 8.4 mA at VCC) | Targeted at cost-sensitive or thermally constrained systems where 1 MSPS is unnecessary | Select when system sampling requirement ≤500 kSPS and power budget is critical |
| AD7380BCPZ-RL7 | Differential-input 16-bit SAR ADC; 4 MSPS throughput; no integrated reference; requires external REF | Better suited for high-bandwidth applications like ultrasound beamforming where differential signaling is mandatory | Choose when differential input topology and >1 MSPS throughput outweigh need for internal reference and simultaneous dual-channel operation |
Compared with AD4683BCPZ-RL7, the AD4682BCPZ-RL7 delivers 2× higher throughput and 1.5× higher dynamic range at full speed, while AD7380BCPZ-RL7 trades integrated reference and pseudo-differential simplicity for raw speed and differential noise immunity - making AD4682BCPZ-RL7 optimal for industrial motor control where timing determinism, dual-channel correlation, and self-contained reference are prioritized.
Availability
AD4682BCPZ-RL7 is available at Aetrix Electronics and suitable for motor control position feedback, power quality monitoring, and EDFA bias control requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for AD4682BCPZ-RL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.
The AD4682BCPZ-RL7 belongs to Analog Devices' precision SAR ADC portfolio, engineered specifically for deterministic, low-latency, dual-channel acquisition in closed-loop industrial control systems where timing correlation and DC accuracy are non-negotiable.
FAQ
What is the maximum sampling rate supported by the AD4682BCPZ-RL7?
The AD4682BCPZ-RL7 supports a maximum throughput conversion rate of 1 MSPS, corresponding to a minimum inter-conversion interval (tCYC) of 1 µs. This rate is guaranteed across the full operating temperature range (−40°C to +125°C) with VCC = 3.0–3.6 V and no oversampling enabled. The device achieves this performance using dual SAR cores with simultaneous sampling architecture, and timing is synchronized to the falling edge of the CS signal.
Does the AD4682BCPZ-RL7 include an internal voltage reference?
Yes, the AD4682BCPZ-RL7 integrates a buffered 2.5 V internal reference with ±10 ppm/°C temperature coefficient and 7 µV rms noise. This reference is accessible via the REFIO pin and can be used as an output for external circuitry or disabled in favor of an external 2.5–3.3 V reference. When using the internal reference, a 1 µF capacitor must be placed between REFIO and GND, and the REFSEL bit in CONFIGURATION1 must be cleared to 0.
How does the oversampling feature improve performance in the AD4682BCPZ-RL7?
The AD4682BCPZ-RL7 implements on-chip rolling-average oversampling with OSR up to ×8, which improves SNR by up to 5.9 dB - from 87.5 dB to 93.4 dB - and enhances effective resolution to 18 bits when RES = 1. This is achieved through dedicated hardware blocks that average multiple conversions without host processor intervention, reducing noise floor and enabling high-fidelity capture of narrowband signals such as power harmonics or sensor outputs below 100 kHz.
What is the purpose of the SDOB/ALERT pin on the AD4682BCPZ-RL7?
The SDOB/ALERT pin on the AD4682BCPZ-RL7 is a multifunction terminal that operates either as Serial Data Output B (for ADC B conversion results) or as an open-drain Alert indication output. When configured as ALERT, it asserts low when a conversion result exceeds user-defined high/low thresholds stored in ALERT_HIGH_THRESHOLD and ALERT_LOW_THRESHOLD registers. Activation requires setting ALERT_EN = 1 in CONFIGURATION1 and SDO = 1 in CONFIGURATION2.
Can the AD4682BCPZ-RL7 operate with different logic supply voltages?
Yes, the AD4682BCPZ-RL7 supports VLOGIC from 1.65 V to 3.6 V, enabling interoperability with 1.8 V, 2.5 V, and 3.3 V digital interfaces. Input logic thresholds scale proportionally (VIL = 0.2 × VLOGIC, VIH = 0.8 × VLOGIC), and output drive strength adapts accordingly (VOH = VLOGIC − 0.3 V, VOL = 0.4 V). This flexibility allows direct connection to diverse microcontrollers and FPGAs without level-shifting circuitry, provided proper decoupling (1 µF capacitor) is applied to the VLOGIC pin.
AD4682BCPZ-RL7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 1M
- Number of Inputs:
- 2
- Input Type:
- Pseudo-Differential
- Data Interface:
- Serial
- Configuration:
- ADC
- Ratio - S/H:ADC:
- 0:2
- Number of A/D Converters:
- 2
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3V ~ 3.6V
- Voltage - Supply, Digital:
- 1.65V ~ 3.6V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 125°C
- Supplier Device Package:
- 16-LFCSP (3x3)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD4682BCPZ-RL7 FAQ
1.How can I place an order for AD4682BCPZ-RL7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD4682BCPZ-RL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD4682BCPZ-RL7 reliable?
The price and inventory of AD4682BCPZ-RL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD4682BCPZ-RL7 is usually 5 days.
3.What payment methods are accepted for AD4682BCPZ-RL7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD4682BCPZ-RL7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD4682BCPZ-RL7?
AD4682BCPZ-RL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD4682BCPZ-RL7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD4682BCPZ-RL7?
For technical support, including AD4682BCPZ-RL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD4682BCPZ-RL7 requirements.
6.How does Aetrix verify that AD4682BCPZ-RL7 is sourced from the original manufacturer or authorized distributors?
All AD4682BCPZ-RL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD4682BCPZ-RL7 meets industry standards.
7.What is the process for return or replacement of AD4682BCPZ-RL7?
All AD4682BCPZ-RL7 units undergo pre-shipment inspection (PSI). If there is an issue with AD4682BCPZ-RL7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD4682BCPZ-RL7 part is unused and in its original packaging.
Return procedure for AD4682BCPZ-RL7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD4682BCPZ-RL7 Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

