Analog Devices Inc. AD5161BRMZ50

Overview

AD5161BRMZ50 from Analog Devices is a 256-position digital potentiometer in MSOP-10 package, offering pin-selectable SPI/I²C interface, 50 kΩ end-to-end resistance, ±0.25 LSB integral nonlinearity (INL), and 45 ppm/°C temperature coefficient. It replaces mechanical potentiometers in precision biasing, gain control, and sensor calibration circuits operating from 2.7 V to 5.5 V.

For engineers reviewing the AD5161BRMZ50 datasheet, AD5161BRMZ50 pinout, AD5161BRMZ50 application, or AD5161BRMZ50 equivalent, key selection criteria include interface mode selectability (DIS pin), wiper register readback capability, shutdown current <1 µA, midscale power-on preset, and daisy-chain support via SDO in SPI mode.

Technical Context

The AD5161BRMZ50 implements an 8-bit resistor ladder with wiper decoding logic and dual-mode serial interface controlled by the DIS pin: low enables SPI (CS/CLK/SDI/SDO), high enables I²C (SCL/SDA/AD0). Its architecture supports both rheostat (W–B or W–A) and potentiometer divider (A–W–B) configurations with guaranteed monotonicity.

Internal power-on reset loads 0x80 into the wiper register, ensuring midscale output at startup. In I²C mode, AD0 allows two devices on one bus; in SPI mode, SDO's open-drain output enables cascaded programming without additional GPIOs. Shutdown disconnects terminal A and grounds W to B, reducing supply current to ≤1 µA.

Key Specifications

Pinout & Package

AD5161BRMZ50 uses a compact 3 mm × 4.9 mm MSOP-10 package with exposed pad (not electrically connected). Pin numbering follows standard top-view orientation with Pin 1 at bottom-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar digital potentiometer applications.

Compared with AD5160BRMZ50 and MCP41HV51-503, the AD5161BRMZ50 uniquely combines dual-interface selectability, 15 ppm/°C voltage-divider tempco, and sub-1 µA shutdown-making it optimal for space-constrained, battery-powered, and multi-device calibration systems requiring guaranteed monotonicity and ratio accuracy.

Availability

AD5161BRMZ50 is available at Aetrix Electronics and suitable for RF amplifier biasing, sensor offset calibration, programmable gain stages, and optical module temperature compensation requiring stable component supply across automotive, industrial, and medical device production cycles.

Supply support for AD5161BRMZ50 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, communications, and industrial markets since 1965.

The AD5161 product line delivers digitally programmable resistance with enhanced temperature stability and dual-interface flexibility, targeting replacement of mechanical potentiometers in high-reliability, low-maintenance electronic calibration systems.

FAQ

What interface protocols does the AD5161BRMZ50 support?

The AD5161BRMZ50 supports both SPI and I²C protocols, selected by the DIS pin: logic low enables SPI (CS/CLK/SDI/SDO), logic high enables I²C (SCL/SDA/AD0). It does not support UART, SMBus, or other serial protocols. The AD5161BRMZ50 datasheet specifies timing parameters for both modes-including 25 MHz SPI clock and 400 kHz I²C clock-and confirms full read/write access to the wiper register in either configuration.

Does the AD5161BRMZ50 retain its wiper setting after power cycling?

No, the AD5161BRMZ50 does not retain wiper settings after power loss-it lacks nonvolatile memory. Upon power-up, it always defaults to midscale (code 0x80) due to internal power-on preset logic. To restore a specific setting, the host controller must reprogram the AD5161BRMZ50 after each power cycle. This behavior is confirmed in the "Power-Up Sequence" section of the AD5161BRMZ50 datasheet Rev. C.

What is the maximum current rating for the AD5161BRMZ50 terminals?

The AD5161BRMZ50 supports a maximum terminal current of ±20 mA per terminal (A, B, or W), as specified in Absolute Maximum Ratings. Exceeding this limit-even briefly-may degrade the internal CMOS switches. At zero-scale (code 0x00), wiper resistance is ~60 Ω, so applying 5 V across W–B yields ~83 mA, exceeding safe operation. Therefore, external current limiting (e.g., series resistor) is required when driving loads directly from W or operating near zero/full scale.

Can multiple AD5161BRMZ50 devices share the same I²C bus?

Yes, up to two AD5161BRMZ50 devices can share one I²C bus using the AD0 pin to set unique 7-bit slave addresses (0x2C or 0x2D). The AD5161BRMZ50 datasheet explicitly states this capability in the Pin Function Description table and I²C Interface section. Adding more than two requires external I²C multiplexers, as no third address option exists-unlike SPI daisy-chaining, which supports arbitrary counts via SDO–SDI cascading.

How does the AD5161BRMZ50 handle voltage polarity across its resistor terminals?

The AD5161BRMZ50 allows bidirectional voltage application across A–B, A–W, and W–B terminals-polarity is unrestricted per the datasheet's "Terminal Voltage Operating Range" specification. Unlike many digital pots, it imposes no requirement that VA > VB or VW referenced to GND. This enables AC-coupled signal attenuation, bipolar sensor excitation, and floating bias networks, provided terminal voltages remain within GND to VDD and current stays within ±20 mA limits.