Analog Devices Inc. AD5173BRMZ100
- Part No.:
- AD5173BRMZ100
- Manufacturer:
- Analog Devices Inc.
- Category:
- Digital Potentiometers
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
AD5173BRMZ100.pdf
- Description:
- IC DGT POT 100KOHM 256TAP 10MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD5173BRMZ100 from Analog Devices is a dual-channel, 256-position, one-time programmable (OTP) digital potentiometer in a 10-lead MSOP package. It provides nonvolatile resistance setting via fuse-link technology with end-to-end resistance of 100 kΩ per channel, ±20% nominal tolerance, and 35 ppm/°C temperature coefficient. It operates from 2.7 V to 5.5 V and supports I²C interface with AD0/AD1 address pins for multi-device bus configuration - used in permanent factory PCB calibration and RF amplifier biasing.
For engineers reviewing the AD5173BRMZ100 datasheet, AD5173BRMZ100 pinout, AD5173BRMZ100 application, or AD5173BRMZ100 equivalent, key selection considerations include OTP overwrite capability, dual-channel independent control, 100 kΩ end-to-end resistance, 2 µs wiper settling time, and operation across −40°C to +125°C industrial temperature range.
Technical Context
The AD5173BRMZ100 implements fuse-based OTP memory to retain wiper positions after programming, with power-on default to midscale unless OTP is activated. Its I²C interface includes dedicated AD0 and AD1 pins enabling up to four unique device addresses on a shared bus.
It supports both rheostat (A–W or B–W) and potentiometer divider (A–W–B) configurations. In divider mode, voltage output exhibits 15 ppm/°C tempco due to ratio-matched resistor ladder design, while rheostat mode maintains 35 ppm/°C absolute RAB drift. OTP programming requires a separate 5.6–5.8 V supply capable of 100 mA for 400 ms.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| End-to-end resistance | 100 kΩ per channel - defines maximum adjustable resistance range in rheostat mode and sets voltage division ratio in potentiometer mode. |
| Resolution | 256 positions (8-bit) - enables 0.39% step resolution for fine analog tuning and calibration. |
| Wiper settling time | 2 µs (±1 LSB) - ensures rapid response during dynamic gain or offset adjustment in closed-loop systems. |
| Temperature coefficient | 35 ppm/°C (RAB), 15 ppm/°C (VW in divider mode) - guarantees stable resistance and voltage ratio over −40°C to +125°C. |
| Supply voltage range | 2.7 V to 5.5 V - compatible with standard logic rails and low-power embedded systems. |
| I²C address pins | AD0 and AD1 - allow hardware-selectable addressing for up to four AD5173 devices on one bus without software arbitration. |
| OTP supply requirement | 5.6–5.8 V, 100 mA for 400 ms - mandates external high-voltage pulse source; not supported by standard 3.3 V/5 V rails. |
Pinout & Package
AD5173BRMZ100 uses a compact 10-lead MSOP package (3 mm × 4.9 mm) with exposed pad for thermal performance. Pinout is validated per Analog Devices Rev. K datasheet Figure 5 and Table 7.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| B1 | Channel 1 resistor terminal B | Low-side connection point for rheostat or potentiometer; voltage must stay within GND ≤ VB1 ≤ VDD. |
| AD0 | I²C address bit 0 | Hardware-configurable LSB of 2-bit slave address; enables multi-device bus decoding without software overhead. |
| W2 | Channel 2 wiper terminal | Adjustable node for Channel 2; delivers programmable resistance (W2–B2 or W2–A2) or voltage (A2–W2–B2). |
| GND | Digital ground reference | Common return for logic interface and internal circuitry; must be low-impedance and separated from analog ground if noise-sensitive. |
| VDD | Power supply input | Primary supply for logic and analog functions (2.7–5.5 V); also serves as OTP programming rail when raised to 5.6–5.8 V. |
| SCL | I²C clock input | Positive-edge-triggered serial clock; requires external pull-up; VIH ≥ 0.7×VDD for reliable communication. |
| SDA | I²C bidirectional data line | Open-drain interface supporting read/write of wiper registers and OTP status bits; requires pull-up resistor. |
| AD1 | I²C address bit 1 | Hardware-configurable MSB of 2-bit slave address; pairs with AD0 to define full 4-device address space. |
| B2 | Channel 2 resistor terminal B | Low-side connection for Channel 2; electrically isolated from B1; supports independent dual-channel operation. |
| W1 | Channel 1 wiper terminal | Adjustable node for Channel 1; fully independent from W2; allows simultaneous but distinct resistance/voltage settings. |
Key Features
| Feature | Design Value |
|---|---|
| One-time programmable (OTP) memory | Fuse-link technology retains wiper position permanently after single programming event - eliminates need for external EEPROM and reduces BOM cost. |
| OTP overwrite capability | Allows temporary wiper repositioning post-OTP; original OTP setting restores at next power-up - enables field calibration without compromising factory-set baseline. |
| Dual independent channels | Two fully isolated 100 kΩ resistor ladders with separate wipers (W1/W2) and terminals (A1/B1, A2/B2) - supports stereo gain control or dual-sensor trimming in one package. |
| I²C address expansion | AD0 and AD1 pins enable hardware-selectable addresses (0x2C–0x2F) - simplifies multi-potentiometer systems without address conflict or firmware remapping. |
| Low power consumption | 6 µA max IDD at 5 V - suitable for battery-powered instrumentation and always-on calibration circuits. |
| Industrial temperature range | −40°C to +125°C operation - qualified for under-hood automotive modules, industrial PLCs, and harsh-environment sensor interfaces. |
Applications
| Factory Sensor Calibration | RF Power Amplifier Biasing |
|---|---|
|
Use Scenario: Permanent trim of pressure or temperature sensor output during final test to meet accuracy spec before shipment. IC Role / Device Role / Timing Role: Dual-channel AD5173BRMZ100 sets fixed gain and offset resistances in sensor signal conditioning circuitry. Use Value: Replaces mechanical trimpots with guaranteed long-term stability and no field drift; 100 kΩ channels match typical op-amp feedback networks. |
Use Scenario: Setting precise quiescent current in GaAs FET amplifiers for optimal linearity and efficiency in wireless infrastructure. IC Role / Device Role / Timing Role: AD5173BRMZ100 configures gate bias voltage via potentiometer divider mode to establish stable DC operating point. Use Value: 15 ppm/°C voltage divider tempco ensures minimal bias shift over temperature - critical for maintaining EVM and ACLR in 5G base stations. |
| Industrial PLC Analog Output Trimming | Medical Instrument Offset Compensation |
|
Use Scenario: Fine-tuning 4–20 mA transmitter output span and zero during manufacturing to compensate for DAC and op-amp tolerances. IC Role / Device Role / Timing Role: AD5173BRMZ100 acts as programmable precision resistor in current-loop feedback path and reference scaling network. Use Value: 256-step resolution enables <10 µA calibration granularity; OTP lock prevents accidental field modification during maintenance. |
Use Scenario: Compensating input offset voltage in EEG or ECG front-end instrumentation amplifiers to achieve sub-µV baseline stability. IC Role / Device Role / Timing Role: AD5173BRMZ100 provides matched, low-noise resistance in precision op-amp offset null circuitry. Use Value: 35 ppm/°C RAB tempco and 60 pF wiper capacitance minimize drift and high-frequency loading - preserving signal integrity in µV-level bio-potential measurements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5172BRMZ100 | Same OTP architecture and 100 kΩ resistance, but lacks AD0/AD1 pins - fixed I²C address only. | Not suitable for multi-device bus configurations requiring address flexibility. | Select AD5172BRMZ100 only when single-device placement or address simplicity is prioritized over system scalability. |
| MCP45HV51-104E/MS | Nonvolatile (EEPROM-based), 100 kΩ, 256-tap, but requires 5.5 V max supply and has slower 5 µs settling time. | Supports unlimited reprogramming; better for designs needing field updates, but higher power and lower speed than AD5173BRMZ100. | Choose MCP45HV51-104E/MS when recalibration in service is required; avoid where OTP permanence and fast settling are mandatory. |
Compared with AD5173BRMZ100, AD5172BRMZ100 sacrifices bus address flexibility for identical OTP reliability, while MCP45HV51-104E/MS trades fuse-based permanence for EEPROM reprogrammability - making AD5173BRMZ100 optimal for factory-set, multi-node, high-stability applications.
Availability
AD5173BRMZ100 is available at Aetrix Electronics and suitable for factory calibration, RF amplifier biasing, and industrial analog output trimming requiring stable component supply, long-term parameter retention, and multi-device I²C scalability.
Supply support for AD5173BRMZ100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, and communications markets since 1965.
The AD5173BRMZ100 belongs to the AD517x OTP digital potentiometer family, engineered for permanent, tamper-resistant calibration in safety-critical and high-reliability systems where EEPROM wear-out or volatile memory loss is unacceptable.
FAQ
What is the OTP programming voltage requirement for AD5173BRMZ100?
The AD5173BRMZ100 requires a dedicated OTP supply of 5.6 V to 5.8 V, capable of delivering 100 mA for 400 ms, to blow internal fuses and lock the wiper position. This voltage exceeds its normal 2.7–5.5 V operating range and must be applied externally - standard 3.3 V or 5 V rails cannot perform OTP programming.
Does AD5173BRMZ100 support independent control of both channels?
Yes, AD5173BRMZ100 provides fully independent control of Channel 1 (W1, A1, B1) and Channel 2 (W2, A2, B2). Each channel has its own 8-bit wiper register accessible via I²C, allowing simultaneous but distinct resistance or voltage settings - essential for stereo audio, dual-sensor systems, or redundant calibration paths.
How does the AD5173BRMZ100 handle power-on reset behavior?
By default, AD5173BRMZ100 powers up with both wipers at midscale (0x80) unless OTP has been activated. After successful OTP programming, it powers up to the stored wiper position. The device also supports temporary OTP overwrite - allowing runtime wiper changes that revert to the OTP value on next power cycle.
What is the maximum operating temperature range for AD5173BRMZ100?
The AD5173BRMZ100 is rated for continuous operation from −40°C to +125°C, qualified per industrial specifications. Its 35 ppm/°C resistance tempco and 15 ppm/°C voltage divider tempco ensure stable performance across this full range - making it suitable for under-hood automotive, motor drive, and industrial control applications.
Can AD5173BRMZ100 be used in potentiometer divider mode with bipolar signals?
Yes, AD5173BRMZ100 supports bipolar operation in potentiometer divider mode: voltages at A, B, and W terminals may swing between GND and VDD, and polarity across A–B is unrestricted. However, absolute terminal voltages must remain within −0.3 V to VDD + 0.3 V (whichever is less) to avoid forward-biasing internal ESD diodes.
AD5173BRMZ100 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Rheostat
- Number of Circuits:
- 2
- Number of Taps:
- 256
- Resistance (Ohms):
- 100k
- Interface:
- I2C
- Memory Type:
- OTP
- Voltage - Supply:
- 2.7V ~ 5.5V
- Features:
- Selectable Address
- Tolerance:
- ±20%
- Temperature Coefficient (Typ):
- 35ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 10-MSOP
- Operating Temperature:
- -40°C ~ 125°C
- Resistance - Wiper (Ohms) (Typ):
- 160
AD5173BRMZ100 FAQ
1.How can I place an order for AD5173BRMZ100 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD5173BRMZ100 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD5173BRMZ100 reliable?
The price and inventory of AD5173BRMZ100 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD5173BRMZ100 is usually 5 days.
3.What payment methods are accepted for AD5173BRMZ100?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD5173BRMZ100 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD5173BRMZ100?
AD5173BRMZ100 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD5173BRMZ100 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD5173BRMZ100?
For technical support, including AD5173BRMZ100 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD5173BRMZ100 requirements.
6.How does Aetrix verify that AD5173BRMZ100 is sourced from the original manufacturer or authorized distributors?
All AD5173BRMZ100 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD5173BRMZ100 meets industry standards.
7.What is the process for return or replacement of AD5173BRMZ100?
All AD5173BRMZ100 units undergo pre-shipment inspection (PSI). If there is an issue with AD5173BRMZ100, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD5173BRMZ100 part is unused and in its original packaging.
Return procedure for AD5173BRMZ100:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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