Analog Devices Inc. AD5204BN50

Overview

AD5204BN50 from Analog Devices is a 4-channel, 256-position digital potentiometer with 50 kΩ end-to-end resistance, SPI-compatible 3-wire interface, ±2.7 V dual-supply or +2.7 V to +5.5 V single-supply operation, and midscale power-on reset-used for precision gain/offset adjustment in instrumentation amplifiers and programmable filter tuning.

For engineers reviewing the AD5204BN50 datasheet, AD5204BN50 pinout, AD5204BN50 application, or AD5204BN50 equivalent, this page delivers verified channel count, terminal resistance, supply range, wiper settling time (9 μs at 50 kΩ), and SPI timing compliance-key selection criteria for analog signal conditioning and voltage divider replacement designs.

Technical Context

The AD5204BN50 implements four independent, monotonic 8-bit digitally controlled variable resistors, each with a fixed A–B resistance of 50 kΩ and a nominal temperature coefficient of 700 ppm/°C. Each channel features its own latch updated via an 11-bit serial word (3 address + 8 data bits) decoded on CS high transition.

It supports both rheostat (A–W or B–W) and potentiometer divider (A–W–B) configurations. In divider mode, output voltage drift is reduced to 15 ppm/°C due to ratio-based operation; wiper resistance is 50–100 Ω, and full-scale error is −2 to 0 LSB.

Key Specifications

Pinout & Package

AD5204BN50 is packaged in a 24-lead SOIC (Small Outline Integrated Circuit) surface-mount package with standard 0.3-inch body width and 1.27 mm pitch. Pin 1 is marked by a notch or dot; pins 1, 2, and 12 are NC (not connected).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar digital potentiometer applications.

Compared with AD5204BRU50 and AD8402ARZ50, the AD5204BN50 uniquely combines quad-channel density, midscale preset (PR), shutdown capability (SHDN), and daisy-chain support (SDO) in a standard SOIC package-making it optimal for multi-parameter calibration systems requiring deterministic startup and low-power sleep modes.

Availability

AD5204BN50 is available at Aetrix Electronics and suitable for instrumentation gain control, programmable filter tuning, and line impedance matching requiring stable component supply across extended industrial temperature ranges.

Supply support for AD5204BN50 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.

The AD5204BN50 belongs to Analog Devices' precision digital potentiometer product line, engineered specifically for replacing mechanical trimmers in automated calibration, sensor signal conditioning, and programmable analog front ends where repeatability, temperature stability, and digital control are essential.

FAQ

What is the terminal resistance tolerance and temperature coefficient of the AD5204BN50?

The AD5204BN50 has a nominal terminal resistance of 50 kΩ with a tolerance of ±30% at 25°C. Its resistance temperature coefficient is 700 ppm/°C, measured across the A–B terminals with the wiper unconnected. This spec applies directly to the AD5204BN50 and is confirmed in Table 1 of the Rev. G datasheet under "Resistance Temperature Coefficient."

Does the AD5204BN50 support dual-supply operation, and what are the valid voltage ranges?

Yes, the AD5204BN50 supports dual-supply operation with VDD ranging from +2.3 V to +2.7 V and VSS from −2.7 V to −2.3 V, provided |VDD| + |VSS| ≤ 5.5 V. It also operates on single supplies from +2.7 V to +5.5 V. These ranges are explicitly specified in the "Power Dual-Supply Range" and "Power Single-Supply Range" rows of Table 1 in the AD5204/AD5206 datasheet Rev. G.

How does the PR (Preset) pin function on the AD5204BN50?

The PR pin on the AD5204BN50 is an active-low input that forces all four wiper positions to the midscale code (0x80) when asserted. This provides deterministic recovery from fault conditions or power cycling. The PR function is documented in Table 5 (SOIC/TSSOP pin descriptions) and Figure 5 (AD5204 Preset Timing Diagram) of the Rev. G datasheet.

Can the AD5204BN50 be daisy-chained, and what is required to implement this?

Yes, the AD5204BN50 supports daisy-chaining via its open-drain SDO pin (Pin 10), which connects to the SDI of the next device. A pull-up resistor is required on SDO; the datasheet confirms compatibility with pull-up voltages higher than VDD (e.g., 5 V pull-up with 3.3 V VDD). This feature is unique to the AD5204 family and is detailed in the "Digital Interfacing" section of Rev. G.

What is the maximum continuous current rating for the AD5204BN50 wiper terminals?

The AD5204BN50 wiper terminals support a maximum continuous current of ±2.5 mA when configured with 50 kΩ or 100 kΩ end-to-end resistance, as stated in Table 2 ("Absolute Maximum Ratings") under "IA, IB, IW" for "50 kΩ and 100 kΩ End-to-End Resistance." Exceeding this may cause switch degradation.