Analog Devices Inc. AD524BDZ
- Part No.:
- AD524BDZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-CDIP (0.300", 7.62mm)
- Datasheet:
-
AD524BDZ.pdf
- Description:
- IC INST AMP 1 CIRCUIT 16CDIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD524BDZ from Analog Devices is a precision monolithic instrumentation amplifier designed for high-accuracy data acquisition in demanding environments. It delivers 0.003% nonlinearity at G = 1, 120 dB CMRR at G = 1000, and 0.3 µV p-p low-frequency noise (0.1 Hz to 10 Hz), operating across −25°C to +85°C with pin-selectable gains of 1, 10, 100, or 1000 - used in strain gauge signal conditioning, medical ECG front-ends, and precision sensor interfaces.
For engineers reviewing the AD524BDZ datasheet, AD524BDZ pinout, AD524BDZ application, or AD524BDZ equivalent, key selection considerations include input offset voltage drift (0.5 µV/°C), gain bandwidth product (25 MHz at G = 1), output slew rate (5 V/µs), and internal compensation eliminating external components for standard gains.
Technical Context
The AD524BDZ implements a classic three-op-amp architecture with monolithically matched components to maximize common-mode rejection and linearity. Its input stage uses precision thin-film resistors for pin-programmable gain settings and incorporates bidirectional FET-based input protection limiting current to ≤3 mA over ±36 V differential input range.
It features separate input and output offset nulling terminals, enabling high-precision calibration across gain ranges. The sense and reference terminals support remote sensing and precise output offset injection up to ±10 V, while maintaining full ±10 V output swing into 2 kΩ loads.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Offset Voltage | 50 µV max - sets baseline DC error before trimming; enables <0.003% nonlinearity at unity gain |
| CMRR | 120 dB at G = 1000 - rejects >99.9999% of common-mode interference in noisy industrial environments |
| Low-Frequency Noise | 0.3 µV p-p (0.1 Hz–10 Hz) at G = 100/1000 - supports sub-microvolt resolution in DC-coupled sensor systems |
| Slew Rate | 5 V/µs - ensures 15 µs settling to 0.01% for 20 V step at G = 1–100, suitable for medium-speed data acquisition |
| Gain Bandwidth Product | 25 MHz - enables stable operation at G = 1 with 1 MHz small-signal bandwidth, critical for anti-alias filtering |
| Operating Temperature | −25°C to +85°C - qualified for commercial/industrial applications without extended-range derating |
| Supply Range | ±6 V to ±18 V - supports flexible rail selection while maintaining specified performance across full range |
Pinout & Package
AD524BDZ is supplied in a 16-lead SOIC wide-body package (RW-16), measuring 10.3 mm × 7.5 mm × 2.35 mm, with standard JEDEC MS-013AC footprint and gull-wing leads.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 | Differential Inputs (IN−, IN+) | High-impedance (1 GΩ) inputs with bidirectional FET protection; accept ±10 V linear differential range at G = 1 |
| 3 | RG (Gain Set) | Connects to Pin 16 to set external gain per RG = 40 kΩ/(G − 1); open for G = 1 |
| 4 | V− (Negative Supply) | Accepts −6 V to −18 V; powers all internal amplifiers and protection circuitry |
| 5 | REF (Reference) | DC offset injection point; drives output relative to this potential (±10 V range); requires low-impedance source |
| 6 | SENSE | Output feedback node; enables remote sensing to eliminate lead-drop errors in high-current load configurations |
| 7 | OUT (Output) | Delivers ±10 V into 2 kΩ; slew-limited to 5 V/µs; supports external current boosters via SENSE/REF loop |
| 8 | NC | No connect - internally unused; must remain unconnected per datasheet |
| 9 | OFFSET NULL (−) | Input offset trim terminal; used with Pin 10 to null RTI offset voltage at highest selected gain |
| 10 | OFFSET NULL (+) | Input offset trim terminal; paired with Pin 9 for precision calibration of input-stage mismatch |
| 11 | OUTPUT NULL (−) | Output offset trim terminal; used with Pin 12 to null RTO offset at G = 1 after input nulling |
| 12 | OUTPUT NULL (+) | Output offset trim terminal; completes two-point calibration for minimal total output error across gain steps |
| 13 | GAIN SELECT (G1000) | Strap to Pin 16 for G = 1000; high-impedance when unused; part of 4-pin gain-select matrix |
| 14 | GAIN SELECT (G100) | Strap to Pin 16 for G = 100; shares RG connection; enables discrete gain switching without external logic |
| 15 | GAIN SELECT (G10) | Strap to Pin 16 for G = 10; forms pin-strapped interface compatible with DIP-switch or reed-relay control |
| 16 | RG / GAIN COMMON | Common node for all gain-select straps and external RG resistor; defines gain configuration topology |
Key Features
| Feature | Design Value |
|---|---|
| Pin-programmable fixed gains | 1, 10, 100, 1000 - eliminates external resistors and layout sensitivity for standard configurations |
| Input protection architecture | Bidirectional FET limiter holds input current ≤3 mA across ±36 V differential fault range - no external clamps needed |
| Separate input/output offset nulling | Dual trim networks (Pins 9/10 and 11/12) enable independent correction of RTI and RTO errors across gain changes |
| Reference and sense terminals | Enable floating-load interfacing, remote sensing, and precision output offset injection without sacrificing CMRR or linearity |
| Internally compensated | Stable at all gains without external compensation capacitors - reduces BOM count and layout risk |
Applications
| Strain Gauge Bridge Interface | Medical ECG Signal Conditioning |
|---|---|
|
Use Scenario: Amplifying mV-level differential output from quarter-bridge or full-bridge strain gauges in structural health monitoring systems. IC Role / Device Role / Timing Role: Precision instrumentation amplifier providing programmable gain (G = 100–1000), high CMRR (>110 dB), and low drift (0.5 µV/°C) to resolve microstrain-level signals. Use Value: Enables 16-bit+ effective resolution in 24-bit ADC systems by suppressing thermal and supply-induced errors in bridge excitation paths. |
Use Scenario: Front-end amplification of low-amplitude, high-impedance biopotential signals from dry or gel electrodes in portable ECG monitors. IC Role / Device Role / Timing Role: Differential signal conditioner rejecting 50/60 Hz mains interference and electrode half-cell DC offsets while preserving ST-segment fidelity. Use Value: Delivers 0.3 µV p-p noise floor and 120 dB CMRR to support diagnostic-grade waveform capture without active shielding or driven-right-leg circuits. |
| Industrial Thermocouple Measurement | High-Accuracy Data Acquisition Module |
|
Use Scenario: Cold-junction compensation and linear amplification of Type K/J thermocouple outputs in PLC analog input modules. IC Role / Device Role / Timing Role: Precision gain block with REF terminal used for programmable cold-junction offset and SENSE terminal for remote ADC driver compensation. Use Value: Achieves ±0.5°C accuracy over −25°C to +85°C ambient by minimizing input offset drift and enabling two-point calibration via dedicated null pins. |
Use Scenario: Core signal chain component in modular DAQ systems requiring configurable gain, low noise, and robust input protection against field wiring faults. IC Role / Device Role / Timing Role: Monolithic instrumentation amplifier supporting software-selectable gains (via relays on Pins 13–16) and integrated power-on/power-off fault tolerance. Use Value: Reduces system-level validation effort by guaranteeing 0.003% nonlinearity and 15 µs settling time across all four factory-trimmed gains. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar instrumentation amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD8429ARZ | Lower input noise (0.19 µV p-p), higher CMRR (140 dB), but only G = 1000 fixed; no pin-programmable gains or offset null pins | Optimized for ultra-low-noise, single-gain medical imaging; lacks flexibility for multi-range industrial sensors | Select AD8429ARZ when maximum SNR at fixed gain outweighs need for gain switching or field calibration |
| INA128UA | Wider supply range (±2.25 V to ±18 V), lower quiescent current (700 µA), but higher offset drift (2 µV/°C) and lower CMRR (110 dB at G = 1000) | Better suited for battery-powered portable instruments where power efficiency trumps ultimate precision | Select INA128UA when operating from single-supply rails or constrained by power budget, accepting moderate drift trade-off |
Compared with AD524BDZ, AD8429ARZ offers superior noise and CMRR but sacrifices configurability and calibration capability, while INA128UA provides broader supply flexibility and lower power at the expense of guaranteed low-drift performance across temperature.
Availability
AD524BDZ is available at Aetrix Electronics and suitable for strain gauge interfaces, medical biopotential acquisition, industrial thermocouple measurement, and modular data acquisition systems requiring stable component supply with long-term manufacturability assurance.
Supply support for AD524BDZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.
The AD524 series belongs to Analog Devices' precision instrumentation amplifier product line, engineered specifically for high-accuracy, low-drift signal conditioning in data acquisition systems operating under worst-case thermal and electromagnetic conditions.
FAQ
What is the maximum guaranteed input offset voltage for AD524BDZ?
The AD524BDZ (B-grade) has a maximum input offset voltage of 100 µV at +25°C, with typical value of 50 µV. This specification is fully tested and guaranteed across the −25°C to +85°C operating range, and the device includes dedicated offset null pins (Pins 9 and 10) to reduce residual error in final system calibration.
Does AD524BDZ require external compensation components?
No, AD524BDZ is internally compensated and stable at all pin-programmable gains (1, 10, 100, 1000) without external capacitors. The internal compensation network ensures phase margin >45° across temperature and supply variations, eliminating layout-dependent stability risks associated with external compensation.
Can AD524BDZ drive heavy loads directly, or is an external buffer required?
AD524BDZ delivers ±10 V into 2 kΩ (5 mA) but supports heavier loads via its SENSE and REF terminals. By connecting SENSE to the load return and using REF for offset control, the internal feedback loop compensates for I×R drops - enabling direct drive of loads down to ~500 Ω without external buffers in many cases.
How does the input protection on AD524BDZ handle overvoltage conditions?
AD524BDZ uses a proprietary bidirectional FET protection structure that limits input current to ≤3 mA across ±36 V differential input range - covering both powered and unpowered fault scenarios. This eliminates need for external series resistors or clamps while adding <10 nV/√Hz noise, unlike discrete protection solutions.
Is AD524BDZ pin-compatible with other AD524 variants like AD524CDZ or AD524SDZ?
Yes, AD524BDZ shares identical pinout, package (16-lead SOIC RW-16), and terminal functions with AD524CDZ and AD524SDZ. Differences lie solely in guaranteed specifications: AD524BDZ specifies 0.5 µV/°C input offset drift and 0.003% nonlinearity, while C-grade tightens drift to 0.2 µV/°C and S-grade extends temperature range to −55°C to +125°C.
AD524BDZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-CDIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Instrumentation
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 5V/µs
- Gain Bandwidth Product:
- 1 MHz
- -3db Bandwidth:
- 1 MHz
- Current - Input Bias:
- 25 nA
- Voltage - Input Offset:
- 100 µV
- Current - Supply:
- 3.5mA
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 12 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -25°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-CDIP
AD524BDZ FAQ
1.How can I place an order for AD524BDZ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD524BDZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD524BDZ reliable?
The price and inventory of AD524BDZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD524BDZ is usually 5 days.
3.What payment methods are accepted for AD524BDZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD524BDZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD524BDZ?
AD524BDZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD524BDZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD524BDZ?
For technical support, including AD524BDZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD524BDZ requirements.
6.How does Aetrix verify that AD524BDZ is sourced from the original manufacturer or authorized distributors?
All AD524BDZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD524BDZ meets industry standards.
7.What is the process for return or replacement of AD524BDZ?
All AD524BDZ units undergo pre-shipment inspection (PSI). If there is an issue with AD524BDZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD524BDZ part is unused and in its original packaging.
Return procedure for AD524BDZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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