Analog Devices Inc. AD5262BRU50-REEL7
- Part No.:
- AD5262BRU50-REEL7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Digital Potentiometers
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AD5262BRU50-REEL7.pdf
- Description:
- IC DGT POT 50KOHM 256TAP 16TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD5262BRU50-REEL7 from Analog Devices is a dual-channel, 256-position, SPI-compatible digital potentiometer with 50 kΩ end-to-end resistance, ±5.5 V dual-supply or +15 V single-supply operation, and 35 ppm/°C temperature coefficient-designed for precision gain/offset adjustment in instrumentation and stereo audio level control.
For engineers reviewing the AD5262BRU50-REEL7 datasheet, AD5262BRU50-REEL7 pinout, AD5262BRU50-REEL7 application, or AD5262BRU50-REEL7 equivalent, this page delivers verified electrical specs, terminal-level design meaning, dual-RDAC timing behavior, and real-world implementation constraints including voltage divider tempco (5 ppm/°C), 5 μs wiper settling time, and daisy-chain-capable SDO output.
Technical Context
The AD5262BRU50-REEL7 implements two independent 256-step RDAC channels in a single 16-lead TSSOP package, each controlled via a 9-bit SPI frame (1 address bit + 8 data bits) with positive-edge clocking and active-low CS strobe. Its architecture includes separate VR latches, power-on midscale preset (0x80), and PR pin forcing wiper to mid-resistance regardless of supply state.
It supports rheostat and potentiometer modes with guaranteed monotonicity, operates across −40°C to +85°C, and maintains channel resistance matching within 0.1% at midscale. Unlike most digital pots, it tolerates up to ±5.5 V dual supplies or +15 V single supply while delivering <1 LSB DNL and ±½ LSB INL in potentiometer mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Dual independent RDACs-enables stereo audio balance or matched gain/offset tuning without inter-channel drift. |
| End-to-End Resistance | 50 kΩ ±30%-sets maximum current handling (±5 mA continuous) and defines resolution granularity in voltage divider applications. |
| Resolution | 8-bit (256 positions)-provides 0.39% step resolution; sufficient for 12-bit system calibration but not high-precision DAC replacement. |
| Tempco (RAB) | 35 ppm/°C-ensures stable resistance over industrial temperature range; critical for sensor signal conditioning where thermal drift must be minimized. |
| Voltage Range | +4.5 V to +16.5 V single-supply or ±4.5 V to ±5.5 V dual-supply-supports legacy ±5 V systems and modern 12–15 V analog rails without level-shifting. |
| Settling Time | 5 μs to ±1 LSB-enables dynamic reconfiguration in closed-loop control loops operating below 100 kHz update rates. |
| Interface | 4-wire SPI (CS, CLK, SDI, SDO)-allows daisy-chaining multiple AD5262 units using single MCU SPI port with no external decoding logic. |
Pinout & Package
AD5262BRU50-REEL7 is housed in a 16-lead thin shrink small-outline package (TSSOP), 4.4 mm × 5.0 mm × 1.2 mm body height, lead pitch 0.65 mm, RoHS-compliant matte tin finish. Pin 1 marked by dot; pin 11 is GND, pin 5 is VDD, pin 12 is VSS, pin 13 is VL.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SDO) | Serial Data Output | Open-drain output requiring external pull-up; enables daisy-chain configuration without additional logic-critical for multi-pot systems. |
| 2 (A1), 16 (A2) | Channel 1 & 2 Terminal A | Fixed end of resistor ladder; connects to high-side reference or signal source-must remain within VSS to VDD voltage limits. |
| 3 (W1), 15 (W2) | Channel 1 & 2 Wiper | Programmable tap point; output impedance varies with code; wiper resistance ≤150 Ω affects low-voltage accuracy in bufferless designs. |
| 4 (B1), 14 (B2) | Channel 1 & 2 Terminal B | Fixed end opposite A; tied to ground or low-side reference; forms complete resistive path with A and W terminals. |
| 5 (VDD) | Positive Supply | Accepts +4.5 V to +16.5 V; sum |VDD| + |VSS| ≤ 15 V-enables use in 12 V industrial systems with −5 V bias rails. |
| 6 (SHDN) | Active-Low Shutdown | Puts A terminals open-circuit and W→B-reduces supply current to 5 μA while preserving latch state for instant wake-up. |
| 7 (CLK) | Serial Clock Input | Positive-edge triggered; supports up to 25 MHz clock-permits fast programming but requires clean edges to avoid bit errors. |
| 8 (SDI) | Serial Data Input | MSB-first 9-bit frame (A0 + D7–D0); A0 selects RDAC1 (0) or RDAC2 (1)-enables per-channel updates without global reset. |
| 9 (CS) | Chip Select | Active-low; rising edge loads serial register into target RDAC latch-timing-critical for reliable communication in noisy environments. |
| 10 (PR) | Active-Low Preset | Forces both RDACs to 0x80 (midscale) regardless of supply state-used for fail-safe recovery or initialization without MCU intervention. |
| 11 (GND) | Ground Reference | Analog/digital common return; must be low-impedance and separated from noisy digital planes to minimize crosstalk in precision circuits. |
| 12 (VSS) | Negative Supply | Accepts 0 V or −5 V; sets lower rail for bipolar operation-required for true AC-coupled signal attenuation or bidirectional current sources. |
| 13 (VL) | Logic Supply | 2.7 V to 5.5 V; must match host MCU I/O voltage-decouples digital interface from analog supply noise, improving PSRR. |
Key Features
| Feature | Design Value |
|---|---|
| 256-step resolution with monotonicity guarantee | Ensures predictable, glitch-free resistance transitions-essential for closed-loop feedback stability and avoiding output jumps during calibration. |
| 35 ppm/°C end-to-end tempco | Maintains resistance accuracy across −40°C to +85°C without external compensation-reduces need for software-based thermal correction in field-deployed equipment. |
| Dual independent RDACs with addressable SPI | Enables simultaneous but separate programming of left/right audio channels or gain/offset paths-eliminates inter-channel coupling in matched filter designs. |
| 5 μs wiper settling time (±1 LSB) | Supports real-time parameter adjustment in servo control or adaptive filtering applications updating at ≤100 kHz without visible transients. |
| Power-on midscale preset + PR pin override | Guarantees known startup state (0x80) without MCU firmware dependency-critical for safety-critical instrumentation and unattended systems. |
| ±5.5 V dual-supply or +15 V single-supply operation | Interfaces directly with legacy op-amp rails and industrial PLC analog modules-avoids level shifters, reducing BOM count and layout complexity. |
Applications
| Instrumentation Gain Calibration | Stereo Audio Level Control |
|---|---|
|
Use Scenario: Precision DC offset and gain trimming in 16-bit data acquisition front-ends with programmable PGA stages. IC Role / Device Role / Timing Role: Dual-channel potentiometer divider setting feedback ratio of instrumentation amplifier; updated once per sensor calibration cycle. Use Value: Eliminates manual trimpots, enabling remote recalibration; 0.1% channel matching ensures differential signal integrity across dual ADC inputs. |
Use Scenario: Independent left/right volume control in professional audio mixers with digital recall capability. IC Role / Device Role / Timing Role: Two independent rheostats configured as variable attenuators in analog signal path; updated via rotary encoder + MCU. Use Value: Maintains channel balance within 0.1% across full volume range; 35 ppm/°C tempco prevents audible drift during long studio sessions. |
| Programmable Voltage-to-Current Conversion | Line Impedance Matching |
|
Use Scenario: Configurable 4 mA–20 mA transmitter output stage adapting to varying load impedances in industrial sensors. IC Role / Device Role / Timing Role: Rheostat-mode RDAC setting gain of current-output op-amp; value updated only on commissioning or range change. Use Value: Enables single hardware design supporting multiple current ranges; shutdown mode reduces quiescent current to 5 μA during sleep states. |
Use Scenario: Adaptive termination of RS-485 or CAN bus lines in modular industrial controllers with variable cable lengths. IC Role / Device Role / Timing Role: Potentiometer-mode RDAC acting as adjustable parallel termination resistor; value set at boot based on detected topology. Use Value: Reduces signal reflections across 100–120 Ω range without mechanical switches; 256-step resolution allows fine-tuning for EMI compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital potentiometer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD5262BRU20-REEL7 | Same dual-channel architecture and pinout, but 20 kΩ end-to-end resistance instead of 50 kΩ. | Better suited for higher-current rheostat applications (e.g., >10 mA load) and lower-impedance voltage dividers where 50 kΩ causes excessive loading. | Select when circuit requires lower resistance for improved bandwidth or higher current drive-verify wiper resistance (60–150 Ω) remains acceptable. |
| AD5262BRU200-REEL7 | Same dual-channel architecture and pinout, but 200 kΩ end-to-end resistance instead of 50 kΩ. | Optimized for ultra-low-power bias networks and high-impedance sensor interfaces where leakage current dominates error budget. | Select when minimizing supply current (<1 μA) or maximizing input impedance (>1 MΩ) is critical-note reduced bandwidth (30 kHz vs. 130 kHz). |
Compared with AD5262BRU20-REEL7 and AD5262BRU200-REEL7, the AD5262BRU50-REEL7 strikes a balanced trade-off between current handling, thermal drift, and signal bandwidth-making it optimal for general-purpose instrumentation and audio where 50 kΩ matches typical op-amp feedback network conventions.
Availability
AD5262BRU50-REEL7 is available at Aetrix Electronics and suitable for instrumentation calibration, stereo audio systems, programmable current sources, and line impedance matching requiring stable component supply across extended temperature and voltage ranges.
Supply support for AD5262BRU50-REEL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, serving industrial, automotive, communications, and healthcare markets.
The AD5262 is part of Analog Devices' precision digital potentiometer family, engineered for replacing mechanical trimmers in applications demanding long-term stability, low tempco, and robust SPI interfacing under wide supply conditions.
FAQ
What is the maximum supply voltage the AD5262BRU50-REEL7 can tolerate?
The AD5262BRU50-REEL7 supports a single-supply range of +4.5 V to +16.5 V (VSS = 0 V) or dual-supply operation from ±4.5 V to ±5.5 V. Absolute maximum ratings specify VDD to GND ≤ +17 V and VDD to VSS ≤ 17 V-so +15 V / −5 V is the highest functional dual-rail combination. Exceeding these violates absolute maximum ratings and risks permanent damage.
Does the AD5262BRU50-REEL7 retain its wiper position after power cycling?
Yes-the AD5262BRU50-REEL7 retains its programmed wiper position in nonvolatile latch registers across power cycles. It features an internal power-on preset that defaults both channels to midscale (0x80) at initial power-up, but subsequent settings persist until rewritten via SPI or forced by the PR pin.
Can the AD5262BRU50-REEL7 operate in rheostat mode with only two terminals?
Yes-the AD5262BRU50-REEL7 supports rheostat mode by connecting either Terminal A or B to the wiper (W), leaving the other terminal unconnected. In this configuration, resistance varies between W and the connected terminal (e.g., A–W or W–B), with guaranteed monotonicity and 35 ppm/°C tempco across the 256-step range.
What is the purpose of the VL pin on the AD5262BRU50-REEL7?
The VL pin supplies the logic interface voltage (2.7 V to 5.5 V) independently from analog supplies (VDD/VSS). This decouples digital noise from sensitive analog terminals, improving PSRR and preventing logic-level mismatch when interfacing with 3.3 V MCUs while operating analog sections at ±5 V or +15 V.
How does the PR (Preset) pin function on the AD5262BRU50-REEL7?
The PR pin is an active-low input that forces both RDAC channels to midscale (0x80) regardless of current supply state or latch contents. It provides hardware-level fail-safe recovery-useful during brown-out conditions or system reset sequences where deterministic startup behavior is required without MCU involvement.
AD5262BRU50-REEL7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Taper:
- Linear
- Configuration:
- Potentiometer
- Number of Circuits:
- 2
- Number of Taps:
- 256
- Resistance (Ohms):
- 50k
- Interface:
- SPI
- Memory Type:
- Volatile
- Voltage - Supply:
- 4.5V ~ 16.5V, ±5V
- Features:
- Cascade Pin
- Tolerance:
- ±30%
- Temperature Coefficient (Typ):
- 35ppm/°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 16-TSSOP
- Operating Temperature:
- -40°C ~ 85°C
- Resistance - Wiper (Ohms) (Typ):
- 60
AD5262BRU50-REEL7 FAQ
1.How can I place an order for AD5262BRU50-REEL7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD5262BRU50-REEL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD5262BRU50-REEL7 reliable?
The price and inventory of AD5262BRU50-REEL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD5262BRU50-REEL7 is usually 5 days.
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Once your AD5262BRU50-REEL7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD5262BRU50-REEL7?
For technical support, including AD5262BRU50-REEL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD5262BRU50-REEL7 requirements.
6.How does Aetrix verify that AD5262BRU50-REEL7 is sourced from the original manufacturer or authorized distributors?
All AD5262BRU50-REEL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD5262BRU50-REEL7 meets industry standards.
7.What is the process for return or replacement of AD5262BRU50-REEL7?
All AD5262BRU50-REEL7 units undergo pre-shipment inspection (PSI). If there is an issue with AD5262BRU50-REEL7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD5262BRU50-REEL7 part is unused and in its original packaging.
Return procedure for AD5262BRU50-REEL7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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