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Analog Devices Inc. AD526JNZ
- Part No.:
- AD526JNZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
AD526JNZ.pdf
- Description:
- IC OPAMP PGA 1 CIRCUIT 16DIP
- Quantity:
- Payment:
- Shipping:
Inventory:382
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Product details
Overview
AD526JNZ from Analog Devices is a single-ended, monolithic software programmable gain amplifier (SPGA) providing binary gains of 1, 2, 4, 8, and 16. It integrates amplifier, laser-trimmed resistor network, and TTL-compatible latched inputs - requiring no external components. With 0.05% max gain error at G=1 (J grade), 0.005% FSR nonlinearity, and 350 kHz small-signal bandwidth at G=16, it serves precision instrumentation, ADC front-end gain ranging, and dynamic range extension systems.
For engineers reviewing the AD526JNZ datasheet, AD526JNZ pinout, AD526JNZ application, or AD526JNZ equivalent, key selection considerations include its J-grade commercial temperature range (0°C to +70°C), 16-lead plastic DIP package, force/sense output configuration for remote load accuracy, and transparent/latched digital control modes with A0–A2/B/CLK/CS interface.
Technical Context
The AD526JNZ implements a BiFET amplifier with laser-trimmed thin-film resistors and JFET analog switches, enabling precise binary gain selection via 3-bit address (A0–A2) and mode control (B). Its internal compensation dynamically adjusts for gains ≥8, boosting bandwidth and slew rate while maintaining stability into 2 kΩ loads.
It supports two operational modes: transparent (B=1, CS/CLK low) for direct gain-code response, and latched (CS or CLK high) for stored gain state retention. The force/sense architecture isolates output voltage sensing from load-induced IR drops, preserving gain accuracy under low-impedance or remote-load conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Range | Digitally selectable binary values: 1, 2, 4, 8, 16 - enables precise signal scaling without external resistors. |
| Gain Error (G=1, J grade) | 0.05% max - ensures <±1 mV absolute error in 20 V full-scale systems at unity gain. |
| Nonlinearity (G=1) | 0.005% FSR max - supports 16-bit+ system linearity when used with 12-bit ADCs. |
| Small-Signal BW (G=16) | 350 kHz - sufficient for multiplexed sensor data acquisition up to ~10 kSPS with settling margin. |
| Input Offset Voltage (J) | 1.5 mV max - minimized by laser trimming; enables sub-mV DC-coupled measurement after nulling at G=16. |
| Settling Time (0.01%, ∆VOUT=±10 V, G=16) | 4.5 ms - defines minimum inter-channel delay in gain-switched multichannel DAQ systems. |
| Supply Voltage Range | ±4.5 V to ±16.5 V - compatible with standard ±5 V, ±12 V, and ±15 V rails without regulation overhead. |
Pinout & Package
AD526JNZ is supplied in a 16-lead plastic DIP (N-16) package with 0.300-inch width and standard through-hole footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DIG GND (Pin 1) | Digital ground reference | Isolates logic switching noise from analog signal path; must be connected separately from analog grounds per layout guidelines. |
| A1 (Pin 2) | Gain address bit 1 | Part of 3-bit binary code (A2/A1/A0) selecting gain; tied low/high to set gain 1–16 per truth table. |
| NULL (Pin 3) | Offset null adjustment | Connects to external potentiometer or DAC for input offset trimming - most effective at G=16. |
| A0 (Pin 4) | Gain address bit 0 | LSB of gain select code; determines gain step resolution in both transparent and latched modes. |
| VIN (Pin 5) | Analog input | Single-ended input node; accepts ±10 V linear range with 5 pF capacitance and 50 pA bias current. |
| CS (Pin 6) | Chip select / latch enable | When high, latches A0–A2/B; functionally identical to CLK - either may be used for edge-triggered loading. |
| NULL (Pin 7) | Offset null adjustment (second terminal) | Completes nulling circuit with Pin 3; differential connection minimizes thermal EMF effects. |
| CLK (Pin 8) | Clock input / latch enable | Rising edge captures gain code; tied low with CS for transparent operation or used as clock in latched mode. |
| ANALOG GND 2 (Pin 9) | Analog ground return | Second dedicated analog ground pin; connects locally to source ground to preserve gain accuracy. |
| A2 (Pin 10) | Gain address bit 2 | MSB of gain code; '1' selects G=16 regardless of A1/A0 when B=1 (transparent) or latched. |
| ANALOG GND 1 (Pin 11) | Analog ground return | Primary analog ground; must be star-connected near Pins 5 and 9 to avoid ground loop errors. |
| B (Pin 12) | Mode control | High = transparent mode; low = unity-gain bypass (for cascading); controls functional behavior beyond gain selection. |
| –VS (Pin 13) | Negative supply | Accepts –4.5 V to –16.5 V; powers internal amplifier and switches; requires 0.1 µF local bypass. |
| +VS (Pin 14) | Positive supply | Accepts +4.5 V to +16.5 V; supplies amplifier core and logic; 0.1 µF bypass mandatory. |
| VOUT SENSE (Pin 15) | Remote output sense | Feedback point for force/sense configuration; eliminates voltage drop error across PCB traces to low-Z loads. |
| VOUT FORCE (Pin 16) | Output drive | Delivers amplified signal; rated for ±10 V into 2 kΩ; short-circuit current limited to 15–30 mA. |
Key Features
| Feature | Design Value |
|---|---|
| Laser-trimmed resistor network | Enables 0.05% max gain error at G=1 (J grade) and <0.005% FSR nonlinearity - critical for calibrated instrumentation. |
| Force/sense output architecture | Separates drive (VOUT FORCE) and feedback (VOUT SENSE) paths to maintain gain accuracy with remote or low-impedance loads. |
| Two-mode digital control (latched/transparent) | Supports synchronous gain updates (latched) or real-time code tracking (transparent), simplifying microcontroller interface design. |
| Gains ≥8 use dynamic compensation | Switches out part of internal C1 capacitor to increase bandwidth (350 kHz at G=16) and slew rate (18–24 V/µs) without instability. |
| FET-input stage (50 pA IB) | Minimizes RTI offset errors from source resistance - essential for high-Z sensor interfaces like piezoelectric or pH electrodes. |
Applications
| Dynamic Range Extension for ADC Systems | Gain Ranging Preamps |
|---|---|
Use Scenario: A 12-bit ADC paired with AD526JNZ achieves 96 dB dynamic range by scaling weak signals to full-scale before digitization. IC Role / Device Role / Timing Role: Programmable gain amplifier acting as auto-ranging front-end; gain selected based on prior sample or comparator output. Use Value: Eliminates manual gain switching; enables single ADC to resolve µV-level signals and 10 V full-scale inputs within same system. | Use Scenario: Industrial sensor signal conditioning where input amplitude varies across orders of magnitude (e.g., thermocouple, strain gauge). IC Role / Device Role / Timing Role: Digitally controlled preamplifier with binary gain steps; gain updated between measurements or triggered by host MCU. Use Value: Maintains optimal SNR across input ranges; avoids ADC clipping or quantization noise dominance in low-amplitude readings. |
| Cascaded High-Gain Instrumentation | Offset-Calibrated Precision Measurement |
Use Scenario: Two AD526JNZ devices cascaded to achieve gains up to 256 for ultra-low-level signal amplification (e.g., photodiode current detection). IC Role / Device Role / Timing Role: First-stage PGA sets coarse gain; second-stage refines resolution; B pin enables unity-gain bypass for flexible staging. Use Value: Extends usable gain range beyond single-device limits while retaining monotonicity and low drift (<0.5 ppm/°C). | Use Scenario: Laboratory-grade voltmeter or calibration source requiring <10 µV RTI offset after factory trim. IC Role / Device Role / Timing Role: Precision SPGA with dedicated NULL pins; offset trimmed at G=16 to amplify residual error for accurate correction. Use Value: Achieves <3 µV RTI offset variation across all gains - meets 16-bit DC accuracy requirements without external chopper. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable gain amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD8251ARMZ | Wider gain range (1–100 in 4 decades), lower gain error (0.04% typ at G=1), but requires external resistors for some gains and lacks force/sense outputs. | Preferred for multi-decade analog front-ends needing >16× gain; unsuitable where trace-length-induced voltage drop must be rejected. | Select AD8251ARMZ when higher gain flexibility and lower typical error outweigh need for integrated force/sense and zero-external-component operation. |
| LTC6910-1CMS8#PBF | 6-bit SPI interface, rail-to-rail output, smaller 8-pin MSOP package, but only 1–100 gain range with ±0.1% gain error (max) and no laser trimming. | Better for space-constrained, low-power, or SPI-based embedded systems; not suitable for metrology-grade DC accuracy or high-voltage ±15 V operation. | Choose LTC6910-1CMS8#PBF for compact, low-voltage designs where 12-bit linearity suffices and SPI control is preferred over parallel TTL inputs. |
Compared with AD8251ARMZ and LTC6910-1CMS8#PBF, the AD526JNZ uniquely combines laser-trimmed precision, force/sense outputs, and true zero-external-component integration in a through-hole DIP - making it optimal for legacy test equipment, calibration hardware, and industrial DAQ where long-term stability and layout simplicity are prioritized over density or digital interface modernity.
Availability
AD526JNZ is available at Aetrix Electronics and suitable for precision instrumentation, automated test equipment, and industrial data acquisition systems requiring stable component supply across extended production lifecycles.
Supply support for AD526JNZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing ICs, serving precision measurement, industrial automation, and communications markets since 1965.
The AD526JNZ belongs to Analog Devices' precision programmable gain amplifier product line, designed specifically for high-accuracy, low-drift signal conditioning in instrumentation-grade data acquisition and calibration systems.
FAQ
What is the operating temperature range for the AD526JNZ?
The AD526JNZ is specified for commercial operation from 0°C to +70°C. This J-grade variant uses a 16-lead plastic DIP package and is optimized for lab equipment, benchtop instruments, and non-extended-environment industrial applications where ambient temperatures remain within this range. Its gain error, nonlinearity, and offset specifications are guaranteed across this interval.
Does the AD526JNZ require external components to operate?
No, the AD526JNZ requires no external components for basic operation. It integrates the amplifier core, laser-trimmed resistor network, TTL-compatible latches, and JFET switches on a single monolithic die. Only 0.1 µF bypass capacitors on +VS and –VS pins are mandatory for stability; offset nulling is optional and implemented externally only if sub-mV DC accuracy is required.
How does the force/sense configuration improve accuracy in the AD526JNZ?
The AD526JNZ's force/sense configuration separates the output drive path (VOUT FORCE) from the feedback sensing path (VOUT SENSE), eliminating voltage drop errors across PCB traces or cables to low-impedance or remote loads. This preserves gain accuracy even when driving heavy loads or long interconnects - a capability not found in standard op-amp-based PGAs and critical for calibrated measurement systems using the AD526JNZ.
Can the AD526JNZ be cascaded with another AD526JNZ for higher gain?
Yes, two AD526JNZ devices can be cascaded to achieve binary gains up to 256. Using the B pin to configure the first stage as unity-gain buffer or direct gain selector, combined with proper timing and decoupling, enables precise high-gain signal chains. The datasheet confirms this topology supports gains of 32, 64, 128, and 256 with verified settling and linearity performance - a validated capability of the AD526JNZ itself.
What digital interface standards does the AD526JNZ support?
The AD526JNZ supports TTL-compatible parallel digital control via five inputs: A0, A1, A2 (3-bit gain code), B (mode), and CLK or CS (latch enable). It does not support I²C, SPI, or other serial protocols. All logic thresholds are defined at 0.8 V (low) and 2.0 V (high), ensuring interoperability with standard 5 V TTL and CMOS logic families without level-shifting.
AD526JNZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Programmable Gain
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 24V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 4 MHz
- Current - Input Bias:
- 50 pA
- Voltage - Input Offset:
- 400 µV
- Current - Supply:
- 10mA
- Current - Output / Channel:
- 10 mA
- Voltage - Supply Span (Min):
- 9 V
- Voltage - Supply Span (Max):
- 33 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
AD526JNZ FAQ
1.How can I place an order for AD526JNZ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD526JNZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD526JNZ reliable?
The price and inventory of AD526JNZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD526JNZ is usually 5 days.
3.What payment methods are accepted for AD526JNZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD526JNZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD526JNZ?
AD526JNZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD526JNZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD526JNZ?
For technical support, including AD526JNZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD526JNZ requirements.
6.How does Aetrix verify that AD526JNZ is sourced from the original manufacturer or authorized distributors?
All AD526JNZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD526JNZ meets industry standards.
7.What is the process for return or replacement of AD526JNZ?
All AD526JNZ units undergo pre-shipment inspection (PSI). If there is an issue with AD526JNZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD526JNZ part is unused and in its original packaging.
Return procedure for AD526JNZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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