Analog Devices Inc. AD6140ARS

Overview

AD6140ARS from Analog Devices is a bandpass Σ∆ IF subsystem IC designed for high-dynamic-range digital radio receivers. It integrates a variable-gain preamplifier (16–29.5 dB), mixer, AGC detector, 6.144 MHz bandpass Σ∆ modulator, ECL-to-CMOS clock translator, and LNA bias amplifier - all in a single 20-lead SSOP package operating at 2.7 V with 4.8 mA supply current. It targets FLEX™/ReFLEX™ multimode receiver front-ends requiring precise 192 kHz IF digitization.

For engineers reviewing the AD6140ARS datasheet, AD6140ARS pinout, AD6140ARS application, or AD6140ARS equivalent, key selection criteria include its 83 dB dynamic range at 6.25 kHz BW, –27 dBm input IP3, 10.5 dB noise figure, AGC time constant selectability (2.8 µA / 50 nA), and CMOS-level D_DATA_OUT/D_CLOCK_OUT interface compatibility with external decimation filters.

Technical Context

The AD6140ARS implements a fixed-frequency bandpass Σ∆ architecture centered at 192 kHz with a 6.144 MHz master clock, requiring strict adherence to the 49.6 MHz IF input and 49.792/49.408 MHz LO injection plan. Its internal AGC loop adjusts preamplifier gain over 13 dB using a voltage-controlled capacitor integrator on Pin 13.

Signal flow includes differential IF input (Pin 19, 2.5 kΩ || 12 pF), LO-coupled mixer (Pins 14/15), post-mixer amplification (+5 dB total), and Σ∆ modulation with –0.77 dB signal gain. The ECL-to-CMOS level shifter (Pins 3/4/5/8) converts 800 mV p-p differential clock to 2.6 V p-p CMOS output (Pin 7), while the LNA bias amplifier (Pins 1/2) delivers 0–2.7 V force voltage with VDD-referenced sense input.

Key Specifications

Pinout & Package

AD6140ARS is housed in a 20-lead Shrink Small Outline Package (SSOP, RS-20), 0.311" × 0.205", with 0.0256" pitch and exposed thermal pad not connected internally.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar bandpass IF digitization applications.

Compared with AD6140ARS, AD6141ARS retains identical packaging and AGC functionality but shifts the bandpass center to 455 kHz - requiring full revalidation of LO synthesis and decimation filter coefficients. MAX2102ETM+ replaces the entire IF digitization paradigm with zero-IF, eliminating the need for crystal filters but introducing I/Q mismatch sensitivity and demanding new baseband processing.

Availability

AD6140ARS is available at Aetrix Electronics and suitable for FLEX™ infrastructure upgrades, ReFLEX™ subscriber unit production, and legacy paging system modernization requiring stable component supply and long-term lifecycle support.

Supply support for AD6140ARS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving communications, industrial, and instrumentation markets since 1965.

The AD6140ARS belongs to Analog Devices' legacy IF subsystem product line, specifically engineered for Motorola ReFLEX™ and FLEX™ digital radio standards - emphasizing ultralow-power, high-dynamic-range bandpass digitization in licensed 900 MHz spectrum applications.

FAQ

What is the primary function of the AD6140ARS in a ReFLEX™ receiver?

The AD6140ARS serves as the complete IF-to-digital conversion subsystem in Motorola ReFLEX™ receivers, accepting a 49.6 MHz IF signal, downconverting it to 192 kHz via internal mixer, applying AGC-controlled gain, and outputting a 6.144 MHz Σ∆ bitstream (D_DATA_OUT) and synchronized CMOS clock (D_CLOCK_OUT) for external decimation. Its design directly supports the ReFLEX™ chipset solution's signal chain requirements.

Can the AD6140ARS operate with a different IF frequency than 49.6 MHz?

No - the AD6140ARS is strictly designed for a 49.6 MHz first IF input paired with either 49.792 MHz or 49.408 MHz LO injection to produce a 192 kHz bandpass Σ∆ output. Deviation from this frequency plan invalidates all published specifications, including dynamic range, noise figure, and IP3, as confirmed in the "Frequency Plan" section of the datasheet.

How does the AGC_TC_SELECT pin affect system performance in the AD6140ARS?

The AGC_TC_SELECT pin (Pin 10) switches the AGC integrator charging current between 2.8 µA (fast mode, LOW) and 50 nA (slow mode, HIGH), yielding a 56:1 time constant ratio. Fast mode enables rapid gain adjustment for bursty signals in FLEX™ paging, while slow mode minimizes AGC-induced distortion in sustained ReFLEX™ voice channels - both modes maintain the full 13 dB AGC range of the AD6140ARS.

What is the role of the LNA_FORCE and LNA_SENSE pins on the AD6140ARS?

LNA_FORCE (Pin 1) provides a 0–2.7 V bias voltage to control the gate of an external discrete LNA, while LNA_SENSE (Pin 2) monitors the LNA's source/drain voltage to close the bias loop. Together, they form a dedicated auxiliary amplifier that stabilizes LNA operating current independent of supply variations - a critical feature for maintaining consistent noise figure across temperature in the AD6140ARS-based receiver front-end.

Is the AD6140ARS still recommended for new designs?

The AD6140ARS is marked OBSOLETE in its official documentation, indicating Analog Devices no longer recommends it for new designs. However, Aetrix Electronics maintains active supply and lifecycle coordination for existing production programs, including FLEX™/ReFLEX™ infrastructure maintenance, legacy paging upgrades, and repair spares where functional equivalence and long-term availability are prioritized over newest-generation features.