Analog Devices Inc. AD6640ASTZ

Overview

AD6640ASTZ from Analog Devices is a monolithic 12-bit, 65 MSPS IF sampling analog-to-digital converter (ADC) with on-chip track-and-hold and 2.4 V reference, designed for high-dynamic-range digitization of intermediate frequency signals up to 70 MHz in multichannel receivers. It delivers 80 dB spurious-free dynamic range (SFDR), 68 dB typical SNR at 2.2 MHz, and operates from a single 5 V analog supply with 3.3 V or 5 V CMOS-compatible digital outputs.

For engineers reviewing the AD6640ASTZ datasheet, AD6640ASTZ pinout, AD6640ASTZ application, or AD6640ASTZ equivalent, this page provides verified technical context, real-world interface constraints, validated timing behavior, and confirmed alternative options for cellular base station, GPS anti-jamming, and phased array receiver designs.

Technical Context

The AD6640ASTZ employs a two-stage subrange architecture with differential analog input stage (AIN/AIN), internal 6-bit coarse ADC, 6-bit DAC, and 7-bit residue ADC, all corrected by on-chip digital error correction logic to achieve guaranteed 12-bit accuracy without laser trimming. Its fully differential input supports ±0.5 V swing around 2.4 V common-mode, enabling direct IF sampling with 300 MHz small-signal analog bandwidth.

Timing is governed by differential ENCODE/ENCODE inputs with 400 ps aperture delay and 0.3 ps rms jitter; output data (D0–D11, twos complement) propagates with 8.5–12.5 ns delay depending on DVCC voltage. Power delivery separates AVCC (5 V, 135–160 mA) and DVCC (3.3 V or 5 V, 10–20 mA) rails to minimize noise coupling between analog and digital domains.

Key Specifications

Pinout & Package

AD6640ASTZ is housed in a 44-lead plastic LQFP (ST-44 package), surface-mount compatible, rated for –40°C to +85°C ambient operation. Thermal impedance θ_JA = 55°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed IF sampling ADC applications.

Compared with AD9246BCPZ-80 and ADS5463IPFP, the AD6640ASTZ uniquely balances 65 MSPS throughput, 70 MHz IF capability, 80 dB SFDR, and full integration - making it the most cost-effective and layout-efficient solution for mid-band IF digitization in communications infrastructure.

Availability

AD6640ASTZ is available at Aetrix Electronics and suitable for cellular base station development, GPS anti-jamming receiver prototyping, and phased array radar system integration requiring stable component supply and long-term production continuity.

Supply support for AD6640ASTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and aerospace markets since 1965.

The AD6640ASTZ belongs to Analog Devices' high-speed data converter product line, specifically engineered for IF sampling in multichannel, multimode wireless receivers where dynamic range, power efficiency, and integration are critical.

FAQ

What is the maximum analog input frequency supported by the AD6640ASTZ?

The AD6640ASTZ supports analog input frequencies up to 70 MHz for IF sampling applications, with a specified small-signal analog bandwidth of 300 MHz. Its 80 dB SFDR is guaranteed over a 25 MHz bandwidth centered at any IF within that range, and performance remains robust up to 69 MHz as verified in TPC 4–6 of the official datasheet. This makes the AD6640ASTZ suitable for first- and second-Nyquist zone digitization in cellular and GPS receivers.

Does the AD6640ASTZ require an external reference voltage?

No, the AD6640ASTZ does not require an external reference voltage. It integrates a precise 2.4 V internal reference (VREF, Pin 9) that powers the analog core and sets the full-scale input range. The datasheet explicitly states "on-chip reference" as a key feature, and VREF must be bypassed with 0.1 µF + 0.01 µF microwave capacitors to ground - no external reference IC or resistor network is needed for standard operation of the AD6640ASTZ.

Can the AD6640ASTZ operate with a 5 V digital supply (DVCC = 5 V)?

Yes, the AD6640ASTZ supports DVCC = 5 V operation per its digital specifications table: Logic "1" voltage is specified as 4.5 V to DVCC – 0.3 V, and Logic "0" voltage as 0.35 V to 0.5 V under full temperature range. However, DVCC = 3.3 V is recommended to reduce digital switching noise coupling into the analog section and to align with modern FPGA/ASIC I/O standards - both configurations are fully validated for the AD6640ASTZ.

What is the significance of the C1 pin (Pin 10) on the AD6640ASTZ?

Pin 10 (C1) on the AD6640ASTZ is an internal bias compensation node requiring a 0.01 µF capacitor to ground for stability, as defined in the Pin Function Descriptions and Figure 4 of the datasheet. It is not a user-configurable control pin nor a test point; omitting the capacitor risks gain error drift and reduced SFDR. This requirement is specific to the AD6640ASTZ's XFCB process and multipass architecture, and must be implemented exactly as specified.

Is the AD6640ASTZ pin-compatible with other members of the AD66xx family?

No, the AD6640ASTZ is not pin-compatible with other AD66xx-series converters such as AD6645 or AD6655. Its 44-lead LQFP (ST-44) package has a unique pinout optimized for differential analog inputs (AIN/AIN), dual-supply digital I/O (DVCC), and integrated reference (VREF), as shown in the Pin Configuration diagram. Substituting another AD66xx part would require PCB redesign - the AD6640ASTZ must be treated as a standalone solution in layout and routing.