Analog Devices Inc. AD6643-250EBZ

Overview

AD6643-250EBZ from Analog Devices is a high-speed dual-channel 11-bit analog-to-digital converter evaluation board designed for the AD6643-250 ADC, supporting 250 MSPS sampling rate, JESD204B serial interface, and 1.8 V/3.3 V mixed-supply operation in RF receiver and communications test applications.

For engineers reviewing the AD6643-250EBZ datasheet, AD6643-250EBZ pinout, AD6643-250EBZ application, or AD6643-250EBZ equivalent, this page provides verified board-level specifications, FPGA capture integration details, clock/signal interface requirements, power sequencing guidance, and VisualAnalog/SPIController software configuration notes specific to the AD6643-250EBZ hardware revision.

Technical Context

The AD6643-250EBZ implements the AD6643-250 (dual 11-bit, 250 MSPS) ADC in a fully populated, impedance-matched layout with differential analog inputs (J301/J303), single-ended clock input (J506), and JESD204B-compatible FPGA interface via HSC-ADC-EVALCZ. It supports 10 dBm–14 dBm clock drive level and 8 dBm–12 dBm analog input level at 50 Ω.

Board-level timing alignment is achieved through configurable DCO clock delay (600 ps step) and FPGA I/O voltage set to 2.5 V via jumper J9. Power is supplied by two independent 6 V, 2 A switching supplies-one per board-with default jumper settings (P103–P108) enabling standard evaluation mode.

Key Specifications

Availability

AD6643-250EBZ is available at Aetrix Electronics and suitable for RF receiver prototyping, high-speed data acquisition system validation, and JESD204B interface development requiring stable component supply and full evaluation infrastructure support.

Supply support for AD6643-250EBZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA.

The AD6643-250EBZ belongs to Analog Devices' high-speed ADC evaluation platform family, engineered specifically to accelerate design-in of JESD204B-based receivers in communications infrastructure, radar, and instrumentation systems.

FAQ

What is the primary function of the AD6643-250EBZ?

The AD6643-250EBZ is an evaluation board for the AD6643-250 dual 11-bit, 250 MSPS analog-to-digital converter. It enables functional verification, performance characterization, and JESD204B interface validation of the AD6643-250 in real-world RF receiver signal chains. The AD6643-250EBZ requires pairing with the HSC-ADC-EVALCZ FPGA capture board for data streaming and analysis.

Which software tools are required to operate the AD6643-250EBZ?

Operation of the AD6643-250EBZ requires VisualAnalog (for FFT analysis and canvas-based signal processing) and SPIController (for register-level configuration of the AD6643-250). The correct configuration file-AD6643spiR03.cfg-must be loaded into SPIController to ensure proper initialization of the AD6643-250 on the AD6643-250EBZ.

What clock and analog input signal levels does the AD6643-250EBZ require?

The AD6643-250EBZ requires a clean, low-jitter clock signal of 10–14 dBm into 50 Ω at connector J506, and analog input signals of 8–12 dBm into 50 Ω at J301 (Channel A) or J303 (Channel B). Band-pass filtering is recommended to suppress out-of-band noise before the AD6643-250 input stage on the AD6643-250EBZ.

How is FPGA communication configured between the AD6643-250EBZ and HSC-ADC-EVALCZ?

The AD6643-250EBZ interfaces with the HSC-ADC-EVALCZ FPGA board via a dedicated interconnect. FPGA I/O voltage must be set to 2.5 V using jumper J9 on the HSC-ADC-EVALCZ. Timing alignment is achieved by enabling DCO clock delay (600 ps) in the SPIController FLEXOUTPUT DELAY(17) panel for the AD6643-250EBZ.

What power supplies are needed for the AD6643-250EBZ evaluation setup?

The AD6643-250EBZ requires one 6 V, 2 A switching power supply (e.g., CUI EPS060250UH-PHP-SZ), while the companion HSC-ADC-EVALCZ board requires a separate identical supply. Both boards must be powered independently; shared supply or under-specification causes unstable ADC operation or FPGA programming failure on the AD6643-250EBZ setup.