Analog Devices Inc. AD671SD-500
- Part No.:
- AD671SD-500
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-CDIP (0.300", 7.62mm)
- Datasheet:
-
AD671SD-500.pdf
- Description:
- 12-BIT FLASH ADC
- Quantity:
- Payment:

- Shipping:

Inventory:308
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Product details
Overview
AD671SD-500 from Analog Devices is a monolithic 12-bit, 2 MHz analog-to-digital converter in a 24-pin ceramic DIP package, featuring 500 ns max conversion time, ±4 LSB integral nonlinearity over –55°C to +125°C, unipolar (0 V to +5 V / 0 V to +10 V) and bipolar (–5 V to +5 V) input range selection via pin strapping, and out-of-range (OTR) flag output. It serves high-speed data acquisition in military-grade instrumentation and avionics signal conditioning systems.
For engineers reviewing the AD671SD-500 datasheet, AD671SD-500 pinout, AD671SD-500 application, or AD671SD-500 equivalent, key selection criteria include guaranteed no missing codes to 11 bits, subranging flash architecture with digital error correction, dual ground separation (ACOM/DCOM), laser-trimmed thin-film resistor accuracy, and MIL-STD-883-compliant temperature performance.
Technical Context
The AD671SD-500 employs a four-stage subranging flash architecture: first 3-bit flash generates residue, second 3-bit flash feeds a gain-of-four differential amplifier, and final 8-bit backend uses coarse/fine 4-bit flash with DAC overlap for error tolerance. Digital correction logic compensates for interstage errors using on-chip latches and segmented current-output DACs.
Input range configuration is determined by BPO/UPO pin connection-tied to AIN for 0 V to +5 V, ACOM for 0 V to +10 V, or REF IN for –5 V to +5 V-enabling single-supply reference use with 1.5 kΩ input resistance at 10 V range. Timing is fully internal; only one ENCODE rising edge initiates conversion, with DAV strobe signaling data validity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit-supports full-scale quantization of 4096 discrete levels with monotonic transfer function. |
| Conversion Time | 500 ns max-enables sustained 2 MHz sampling rate without pipeline latency or dead time. |
| Integral Nonlinearity | ±4 LSB (TMIN to TMAX)-guarantees linearity error within ±0.1% FSR across full military temperature range. |
| Input Ranges | 0 V to +5 V, 0 V to +10 V, or –5 V to +5 V-selected by external pin strapping, no configuration register required. |
| Power Consumption | 475 mW typical-achieved via ABCMOS-1 process combining high-speed bipolar analog and low-power CMOS logic sections. |
| Out-of-Range Flag | OTR output active HIGH-provides immediate hardware-level saturation detection without software polling. |
| Supply Voltages | +5 V (VCC/VLOGIC), –5 V (VEE)-dual-rail analog supply enables true bipolar operation and noise isolation. |
Pinout & Package
AD671SD-500 is housed in a 0.300-inch-wide 24-pin ceramic dual in-line package (D-24A), compliant with MIL-STD-883 screening requirements for extended temperature operation (–55°C to +125°C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (BIT12) | Digital Output (LSB) | Least significant bit of 12-bit parallel output bus; synchronized to DAV falling edge. |
| 12 (BIT1) | Digital Output (MSB) | Most significant bit; used with MSB pin (13) to support twos complement or offset binary format selection. |
| 13 (MSB) | Digital Output | Inverted MSB-enables direct twos complement output without external logic inversion. |
| 14 (OTR) | Digital Output | Active-HIGH out-of-range indicator; asserts when input exceeds selected span (e.g., >+5.001 V in 0–5 V mode). |
| 15 (DAV) | Digital Output | Data Available strobe-rising edge marks end of conversion; falling edge latches previous data in external registers. |
| 16 (ENCODE) | Digital Input | Rising-edge-triggered start command; pulse width ≥20 ns ensures reliable conversion initiation. |
| 19 (REF IN) | Analog Input | +5 V reference input-requires external 6.8 µF capacitor to maintain stable voltage under dynamic DAC switching currents. |
| 20 (AIN) | Analog Input | Main analog signal input-driven by low-impedance source (e.g., AD841 buffer) to settle within 1/2 LSB before third flash stage (~200 ns). |
| 21 (BPO/UPO) | Analog Input | Range select pin-connection to AIN, ACOM, or REF IN configures unipolar/bipolar mode without external logic. |
| 22 (ACOM) | Power (Analog Ground) | Isolated analog reference node-separated from DCOM to minimize ground bounce coupling into sensitive analog front-end. |
| 23 (VCC) | Power (+5 V) | Analog supply rail-powers high-speed bipolar circuitry; requires local 0.1 µF + 10 µF decoupling per grounding guidelines. |
| 24 (VEE) | Power (–5 V) | Negative analog supply-carries majority of analog current return path, reducing ACOM current dependency. |
Key Features
| Feature | Design Value |
|---|---|
| Subranging Flash Architecture | Four-stage conversion (3+3+4+2 bits) with DAC overlap and digital error correction ensures 12-bit accuracy without trimming. |
| Laser-Trimmed Thin-Film Resistors | Provides factory-calibrated gain/offset stability and <±20 ppm/°C temperature coefficient over full operating range. |
| Dual Ground Separation (ACOM/DCOM) | Minimizes code-dependent analog ground shifts and digital switching noise coupling into analog signal path. |
| Pin-Strapped Input Range Selection | Eliminates need for configuration registers or I²C/SPI interface-reduces BOM count and firmware complexity. |
| MIL-STD-883 Compliant Screening | Qualified for high-reliability applications including aerospace, defense, and downhole instrumentation. |
Applications
| Avionics Data Acquisition | Military Radar Signal Processing |
|---|---|
Use Scenario: Digitizing IF signals from radar receivers operating at 1–2 MHz sample rates under extreme thermal cycling (-55°C to +125°C). IC Role / Device Role / Timing Role: Primary ADC capturing baseband or intermediate frequency waveforms with deterministic 500 ns conversion latency. Use Value: Guaranteed no missing codes to 11 bits and ±4 LSB INL ensure amplitude fidelity in pulse-Doppler processing without calibration drift. |
Use Scenario: High-speed telemetry channel in guided munitions where radiation tolerance and thermal survivability are critical. IC Role / Device Role / Timing Role: Standalone ADC interfacing directly to sensor front-ends without FPGA or microcontroller intervention. Use Value: Ceramic DIP package and MIL-STD-883 screening provide mechanical robustness and long-term parameter stability in vibration-prone environments. |
| Industrial Process Control Loop | Test & Measurement Equipment |
Use Scenario: Closed-loop feedback in high-precision servo drives requiring real-time analog monitoring of motor phase currents. IC Role / Device Role / Timing Role: Bipolar (±5 V) input mode digitizes bidirectional current sense signals with zero-crossing accuracy. Use Value: Bipolar zero error <±10 LSB and <±15 ppm/°C coefficient enable accurate torque estimation across ambient temperature swings. |
Use Scenario: Modular digitizer module in automated test equipment (ATE) platforms needing plug-and-play ADC replacement. IC Role / Device Role / Timing Role: Pin-compatible drop-in upgrade for legacy AD670/AD671J/K designs requiring extended temperature support. Use Value: Identical pinout and timing interface to AD671J/K-500 allows board reuse while extending operational envelope to –55°C. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed 12-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD671JD-500 | Same architecture and pinout; rated for 0°C to +70°C only; ±4 LSB INL spec identical but not validated over military range. | Suitable for commercial industrial controllers where extended temperature is not required. | Select AD671SD-500 when operation below –40°C or above +85°C is mandatory; AD671JD-500 offers lower cost for benign environments. |
| AD671KD-500 | Same package and timing; tighter ±2 LSB INL spec at 25°C, but only guaranteed over 0°C to +70°C; no MIL-STD-883 qualification. | Preferred in high-accuracy lab instruments where calibration is performed at room temperature. | Choose AD671SD-500 when system-level accuracy must be maintained across full military temperature extremes without recalibration. |
Compared with AD671JD-500 and AD671KD-500, the AD671SD-500 uniquely guarantees its ±4 LSB INL, power supply rejection, and OTR functionality across –55°C to +125°C-making it the sole option for uncalibrated, wide-temperature embedded systems.
Availability
AD671SD-500 is available at Aetrix Electronics and suitable for avionics data acquisition, military radar signal processing, industrial process control loops, and test & measurement equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for AD671SD-500 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.
The AD671 product line delivers monolithic, high-speed ADCs optimized for military, aerospace, and industrial applications demanding guaranteed performance across extreme temperatures without external calibration.
FAQ
What is the guaranteed integral nonlinearity specification for AD671SD-500 over its full operating temperature range?
The AD671SD-500 guarantees ±4 LSB integral nonlinearity (INL) from –55°C to +125°C, as specified in the DC specifications table for the S-grade device. This value is tested and guaranteed across the full military temperature range-not just at 25°C-and reflects worst-case deviation from the ideal transfer curve under all specified supply and reference conditions.
Does AD671SD-500 require an external clock signal to operate?
No, the AD671SD-500 does not require an external clock. It uses an internal timing generator controlled solely by the ENCODE input pulse. A single rising edge on ENCODE (Pin 16) initiates the entire 4-stage conversion sequence, and DAV (Pin 15) provides the data-valid strobe-eliminating clock distribution complexity and jitter sensitivity.
How is bipolar versus unipolar input range selected on AD671SD-500?
Bipolar versus unipolar input range on the AD671SD-500 is selected by hardwiring the BPO/UPO pin (Pin 21): connect to AIN (Pin 20) for 0 V to +5 V, to ACOM (Pin 22) for 0 V to +10 V, or to REF IN (Pin 19) for –5 V to +5 V. No registers, configuration pins, or external logic are needed-range selection is purely analog and static.
What is the purpose of the MSB pin (Pin 13) on AD671SD-500?
The MSB pin (Pin 13) on AD671SD-500 outputs the inverted most significant bit, enabling direct twos complement output format without external inverters. When used with BIT1 (Pin 12), it allows seamless interface to DSPs or FPGAs expecting signed binary data-reducing PCB routing and logic gate count compared to offset binary implementations.
Can AD671SD-500 operate with a single +5 V supply?
No, the AD671SD-500 requires three separate supplies: +5 V on VCC (Pin 23), –5 V on VEE (Pin 24), and +5 V on VLOGIC (Pin 17). The dual analog rails (±5 V) are essential for bipolar input operation and internal DAC headroom; removing VEE will prevent proper function and may damage the device per absolute maximum ratings.
AD671SD-500 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- AD671
- Package/Case:
- 24-CDIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 2M
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- -
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- -
- Architecture:
- Flash
- Reference Type:
- External
- Voltage - Supply, Analog:
- 4.75V ~ 5.25V
- Voltage - Supply, Digital:
- 4.75V ~ 5.25V
- Features:
- -
- Operating Temperature:
- -55°C ~ 125°C
- Supplier Device Package:
- 24-CDIP
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
AD671SD-500 FAQ
1.How can I place an order for AD671SD-500 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD671SD-500 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD671SD-500 reliable?
The price and inventory of AD671SD-500 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD671SD-500 is usually 5 days.
3.What payment methods are accepted for AD671SD-500?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD671SD-500 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD671SD-500?
AD671SD-500 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD671SD-500 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD671SD-500?
For technical support, including AD671SD-500 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD671SD-500 requirements.
6.How does Aetrix verify that AD671SD-500 is sourced from the original manufacturer or authorized distributors?
All AD671SD-500 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD671SD-500 meets industry standards.
7.What is the process for return or replacement of AD671SD-500?
All AD671SD-500 units undergo pre-shipment inspection (PSI). If there is an issue with AD671SD-500, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD671SD-500 part is unused and in its original packaging.
Return procedure for AD671SD-500:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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