Analog Devices Inc. AD673SD

Overview

AD673SD from Analog Devices is a complete 8-bit successive approximation analog-to-digital converter (ADC) with integrated buried Zener reference, on-chip clock, comparator, SAR register, and 3-state digital outputs. It delivers ±1/2 LSB relative accuracy, supports unipolar (0 V to +10 V) and bipolar (–5 V to +5 V) input ranges, and achieves conversion in 10–30 µs - used in precision data acquisition systems requiring MIL-STD-883-compliant operation across –55°C to +125°C.

For engineers reviewing the AD673SD datasheet, AD673SD pinout, AD673SD application, or AD673SD equivalent, key selection considerations include its hermetic ceramic DIP-20 package, dual-supply operation (+5 V / –12 V to –15 V), no-missing-codes guarantee over full temperature range, and direct microprocessor bus interface without external buffers.

Technical Context

The AD673SD implements successive approximation using integrated injection logic (I2L) and an 8-bit current-output DAC referenced to a temperature-compensated buried Zener. Its SAR sequences from MSB to LSB to balance input current through a laser-trimmed 5 kΩ thin-film resistor, achieving 0.05% full-scale accuracy.

It features separate analog and digital commons, bipolar offset control via Pin 16 (open = bipolar, grounded = unipolar), and DATA READY (DR) signaling with 1.5 µs reset delay and 10–30 µs conversion time. Output coding is positive true binary (unipolar) or positive true offset binary (bipolar).

Key Specifications

Pinout & Package

AD673SD is housed in a 20-pin hermetically sealed ceramic DIP (D-20) package, rated for extended military temperature range and high-reliability applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 8-bit successive approximation ADC applications.

Compared with AD673SD, AD673JD sacrifices military-grade reliability and temperature range for lower cost and plastic packaging, while MAX160BCNG+ trades integrated reference and dual-supply simplicity for single-supply convenience and higher external component count.

Availability

AD673SD is available at Aetrix Electronics and suitable for aerospace telemetry acquisition, industrial process monitoring, military data loggers, and high-reliability test equipment requiring stable component supply across extended temperature and long lifecycle programs.

Supply support for AD673SD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, and defense markets since 1965.

The AD673SD belongs to Analog Devices' legacy high-reliability data conversion product line, designed specifically for applications demanding guaranteed monotonicity, hermetic packaging, and operation across –55°C to +125°C without performance degradation.

FAQ

What is the guaranteed operating temperature range for the AD673SD?

The AD673SD is specified and tested over –55°C to +125°C, with guaranteed ±1/2 LSB relative accuracy and no missing codes across this full range. This rating is validated per MIL-STD-883 methods and applies to the hermetic ceramic DIP package. The AD673SD's buried Zener reference and laser-trimmed resistor network maintain stability under thermal stress, making it suitable for aerospace and downhole applications where ambient extremes are routine. Unlike commercial variants such as AD673JN, the AD673SD does not require derating or additional thermal margining.

Does the AD673SD require external components to perform a full-accuracy conversion?

No, the AD673SD requires no external components for full-accuracy 8-bit conversion. It integrates a buried Zener voltage reference, on-chip clock generator, comparator, 8-bit current-output DAC, successive approximation register, and 3-state output buffers on a single die. Only power supplies (+5 V and –12 V to –15 V), analog input signal, CONVERT trigger, and DATA ENABLE control are needed. The laser-trimmed 5 kΩ input resistor and calibrated reference eliminate need for external trimming potentiometers in most applications - though optional 200 Ω full-scale calibration is supported if sub-LSB precision is required.

How does the AD673SD support both unipolar and bipolar input ranges?

The AD673SD selects input range via Pin 13 (BIPOLAR OFFSET): grounding it to DIGITAL COMMON configures unipolar mode (0 V to +10 V), while leaving it open enables bipolar mode (–5 V to +5 V). Internally, an offset current equal to MSB – 1/2 LSB is injected into the comparator summing node to shift the transfer function. In bipolar mode, output coding uses positive true offset binary (00000000 = –5.00 V, 10000000 = 0.00 V, 11111111 = +4.961 V), with code transitions centered on nominal input voltages. This pin-driven flexibility avoids PCB redesign when adapting to different sensor signal types.

What is the role of the ANALOG COMMON and DIGITAL COMMON pins on the AD673SD?

The AD673SD provides separate ANALOG COMMON (Pin 12) and DIGITAL COMMON (Pin 17) returns to minimize noise coupling between analog signal paths and digital switching transients. ANALOG COMMON carries up to 2 mA of transient current during conversion and ~2 mA static current post-conversion, while DIGITAL COMMON serves as the reference for V+, logic inputs, and DB0–DB7 outputs. The datasheet permits up to ±200 mV common-mode voltage between them, enabling flexible system grounding - but absolute maximum rating is ±1 V, so back-to-back protection diodes are recommended if local bonding isn't feasible. Proper separation preserves ±1/2 LSB accuracy in noisy industrial environments.

Can the AD673SD interface directly to an 8-bit microprocessor bus without additional logic?

Yes, the AD673SD supports direct memory-mapped or isolated I/O interfacing to 8-bit microprocessors such as the 8085 or Z80. Its 3-state DB0–DB7 outputs, DATA READY (DR) flag, and DATA ENABLE (DE) control allow clean handshaking: a decoded address + WR pulse generates CONVERT, and RD + address enables DE to read data. DR going low signals completion, eliminating need for fixed delays in most cases. The device tolerates standard TTL logic levels, sinks 3.2 mA per output, and features 150 ns typical access time - all verified across –55°C to +125°C. No bus transceivers, latches, or level shifters are required for basic operation.