Analog Devices Inc. AD676JDZ

Overview

AD676JDZ from Analog Devices is a 16-bit successive-approximation analog-to-digital converter (SAR ADC) with on-chip sample-hold, autocalibration, and parallel digital output. It delivers 100 kSPS conversion rate (10 µs total time), ±1 LSB INL (J-grade), –97 dB THD, and 90 dB S/(N+D) at 100 kSPS - enabling precision data acquisition in test instrumentation and industrial control systems.

For engineers reviewing the AD676JDZ datasheet, AD676JDZ pinout, AD676JDZ application, or AD676JDZ equivalent, key selection considerations include its dual-chip BiMOS II + DSP CMOS architecture, ±12 V / +5 V triple-supply operation, 1 MHz full-power bandwidth, and requirement for external 5–10 V reference voltage.

Technical Context

The AD676JDZ implements a capacitor-array charge redistribution SAR architecture - eliminating laser-trimmed resistor ladders and minimizing temperature-induced linearity drift. Its two-die construction separates analog signal processing (BiMOS II) from digital control (DSP CMOS), reducing crosstalk and enabling on-chip autocalibration.

Autocalibration corrects capacitor mismatch errors via an embedded microcontroller and calibration DAC, storing correction values in on-chip RAM. Calibration requires 85,530 clock cycles and supports power-up initialization only - uncalibrated operation degrades accuracy to ~10 bits.

Key Specifications

Pinout & Package

AD676JDZ is housed in a 28-pin side-brazed ceramic DIP (package option D-28), with pin 17 connected internally to the package lid and tied to VEE.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit SAR ADC applications.

Compared with AD7606BSTZ and ADS8860IDRCT, AD676JDZ uniquely combines dual-die isolation, on-chip autocalibration, and 1 MHz full-power bandwidth - making it optimal for high-accuracy, single-channel, wide-bandwidth applications demanding long-term stability without recalibration.

Availability

AD676JDZ is available at Aetrix Electronics and suitable for automated test equipment, industrial process monitoring, and medical instrumentation requiring stable component supply, long-lifecycle support, and traceable sourcing for Class III medical and MIL-qualified programs.

Supply support for AD676JDZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA.

The AD676JDZ belongs to Analog Devices' precision SAR ADC product line, engineered for metrology-grade accuracy in demanding test, measurement, and control applications where dc precision and ac fidelity must coexist.

FAQ

What is the maximum recommended conversion time for AD676JDZ to maintain specified accuracy?

The AD676JDZ specifies a maximum conversion time (tC) of 1000 µs - measured from SAMPLE going HIGH to completion of the 17th CLK pulse. Exceeding this interval risks degraded INL and THD due to capacitor leakage in the internal calibration storage. This limit applies per conversion, not between conversions. For reliable operation, ensure tC ≤ 1000 µs in all AD676JDZ designs.

Does AD676JDZ require an external voltage reference, and what are the acceptable voltage ranges?

Yes, AD676JDZ requires an external voltage reference applied to the VREF pin. The supported range is 5 V to 10 V - with full-scale input range set to ±VREF. Using 10 V yields ±10 V analog input capability and minimizes gain error contribution (0.005% FSR typical). Reference stability and low noise are critical; the datasheet recommends buffered references with <10 µV p-p noise.

How does the autocalibration function of AD676JDZ impact system-level accuracy and calibration frequency?

AD676JDZ autocalibration corrects capacitor mismatch and offset errors by storing correction values in on-chip RAM. Once performed at power-up (after supplies stabilize), it maintains ±1 LSB INL over 0°C to +70°C without further intervention. Uncalibrated operation degrades accuracy to ~10 bits. No periodic recalibration is needed - the stored corrections remain valid until power cycle or explicit CAL command.

Can AD676JDZ operate with only +5 V supply, or are ±12 V rails mandatory?

±12 V analog supplies (VCC = +12 V, VEE = –12 V) are mandatory for AD676JDZ operation. The +5 V (VDD) digital supply is also required. These three independent rails are architecturally essential: VCC/VEE power the BiMOS II analog die (SHA, ADC core), while VDD powers the DSP CMOS digital die. Omitting either ±12 V rail will prevent functional operation and may damage the device.

What is the purpose of the AGND SENSE pin on AD676JDZ, and how should it be connected?

The AGND SENSE pin provides a Kelvin connection to the analog ground plane, enabling precise sensing of AGND potential at the IC bond pad - compensating for PCB trace resistance and voltage drop. It must be connected directly to the AGND pin (Pin 13) via a dedicated low-impedance trace, not shared with other ground returns. This configuration ensures accurate bipolar zero error (<0.005% FSR) and stable reference point for VIN and VREF.