Analog Devices Inc. AD676KD
- Part No.:
- AD676KD
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-CDIP (0.600", 15.24mm)
- Datasheet:
-
AD676KD.pdf
- Description:
- IC ADC 16BIT SAR 28CDIP
- Quantity:
- Payment:

- Shipping:

Inventory:4,462
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD676KD from Analog Devices is a 16-bit successive-approximation analog-to-digital converter (SAR ADC) with on-chip sample-hold, autocalibration, and parallel digital output. It delivers 100 kSPS conversion rate, ±1.5 LSB integral nonlinearity, 87 dB S/(N+D), and operates from +5 V, +12 V, and –12 V supplies. It targets precision data acquisition in industrial instrumentation and automated test equipment.
For engineers reviewing the AD676KD datasheet, AD676KD pinout, AD676KD application, or AD676KD equivalent, key selection considerations include its 28-pin ceramic DIP package, bipolar input range up to ±10 V, 1 MHz full-power bandwidth, autocalibration timing (85,530 clock cycles), and twos-complement output coding for direct DSP interfacing.
Technical Context
The AD676KD implements a switched-capacitor charge-redistribution SAR architecture segmented across two monolithic chips-an analog BiMOS II ADC die and a digital DSP CMOS controller die-housed in one ceramic DIP package. Its autocalibration uses an on-chip microcontroller and calibration DAC to measure and correct capacitor mismatch errors for all top nine bits, storing correction values in RAM.
Conversion control relies on asynchronous SAMPLE and synchronous CLK signals: SAMPLE initiates acquisition (with 2 µs settling time), and 17 CLK edges execute the 16-bit approximation. BUSY asserts high during conversion or calibration, and output data (BIT 1–BIT 16) becomes valid on the falling edge of BUSY after the 17th CLK cycle.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit - guarantees no missing codes and supports 1:65,536 dynamic range |
| Conversion Rate | 100 kSPS - enables real-time sampling of signals up to 50 kHz Nyquist frequency |
| INL (Max) | ±1.5 LSB - ensures linearity error ≤ 0.0023% FSR for high-accuracy measurement systems |
| S/(N+D) | 87 dB - provides >90 dB effective resolution for low-noise signal chain design |
| Full-Power Bandwidth | 1 MHz - supports accurate digitization of fast-rising transients without amplitude loss |
| Supply Voltages | +5 V (VDD), +12 V (VCC), –12 V (VEE) - separates logic and analog domains to minimize digital crosstalk |
| Input Range | ±VREF (up to ±10 V) - enables direct interface with industrial sensors and signal conditioners |
Pinout & Package
The AD676KD is housed in a 28-pin side-brazed ceramic DIP (package option D-28), with separate analog/digital grounds, dedicated AGND sense, and isolated power pins for optimal noise immunity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1–6, 19–28 | Digital Output (BIT 11–16, BIT 1–10) | 16-bit parallel twos-complement data bus; BIT 1 = MSB, BIT 16 = LSB |
| 7 | Digital Output (BUSY) | Active-high status flag indicating ongoing conversion or calibration; must be buffered under >10 pF load |
| 8 | Digital Input (CAL) | Asynchronous calibration trigger; rising edge resets internal state, falling edge starts 85,530-cycle autocalibration |
| 9 | Digital Input (SAMPLE) | Acquisition control; HIGH enables track mode, falling edge initiates conversion and freezes VIN |
| 10 | Digital Input (CLK) | Master clock input; 17 rising edges required per conversion; minimum period 480 ns |
| 11 | Power (DGND) | Digital ground reference for VDD and output drivers; must be isolated from AGND except at single-point connection |
| 12, 17 | Power (VCC, VEE) | +12 V and –12 V analog supplies for ADC core and sample-hold amplifier; lid internally tied to VEE |
| 13, 14 | Analog Input (AGND, AGND SENSE) | Primary analog ground and Kelvin sense point for minimizing ground loop errors in precision layouts |
| 15 | Analog Input (VIN) | Differential-input-capable analog signal node; 50 pF capacitance during sample, 2 µs settling time |
| 16 | Analog Input (VREF) | External reference input (5–10 V); defines full-scale range and directly impacts gain accuracy and THD |
| 18 | Power (VDD) | +5 V logic supply for digital controller and output buffers; decoupling to DGND essential |
Key Features
| Feature | Design Value |
|---|---|
| On-chip autocalibration | Eliminates need for external trims by correcting capacitor mismatch errors in real time using stored RAM coefficients |
| Integrated sample-hold | Removes requirement for external SHA circuitry; achieves 2 µs input settling with 100 ps aperture jitter |
| Separate analog/digital supplies | VCC/VEE (+12 V/–12 V) and VDD (+5 V) isolation reduces digital switching noise coupling into analog path |
| Twos-complement output coding | Direct compatibility with DSPs and microprocessors; simplifies arithmetic operations without software sign extension |
| AGND sense terminal | Enables 4-wire Kelvin sensing to reject voltage drop errors in high-current analog ground traces |
Applications
| Industrial Process Monitoring | Automated Test Equipment (ATE) |
|---|---|
Use Scenario: Continuous monitoring of temperature, pressure, and flow sensor outputs in PLC-based control cabinets with ambient temperatures up to +70°C. IC Role / Device Role / Timing Role: Primary ADC capturing 16-bit sensor data at 100 kSPS with autocalibration ensuring long-term drift stability over 10-year deployments. Use Value: ±1.5 LSB INL and 87 dB S/(N+D) enable sub-0.01% measurement accuracy without periodic field recalibration. | Use Scenario: Digitizing stimulus-response waveforms in benchtop ATE systems verifying mixed-signal ICs under production test conditions. IC Role / Device Role / Timing Role: High-fidelity acquisition engine synchronized to system clock via SAMPLE/CLK interface; BUSY used for DMA handshaking with FPGA controller. Use Value: 1 MHz full-power bandwidth and –97 dB THD support accurate characterization of wideband device outputs up to 500 kHz. |
| Medical Diagnostic Instrumentation | High-Accuracy Data Loggers |
Use Scenario: Signal conditioning front-end in portable ECG and EEG analyzers requiring low-noise, DC-coupled acquisition of biopotential signals. IC Role / Device Role / Timing Role: Bipolar-input ADC accepting ±5 V electrode inputs referenced to AGND SENSE; calibrated at power-up to meet IEC 60601 leakage current limits. Use Value: Bipolar zero error ≤ 0.005% FSR and <100 ps aperture jitter preserve waveform fidelity critical for arrhythmia detection algorithms. | Use Scenario: Battery-powered environmental sensor node logging vibration, acoustic emission, and strain gauge data over extended field deployments. IC Role / Device Role / Timing Role: Low-drift ADC operating from regulated ±12 V/5 V rails; autocalibration invoked on wake-up to maintain accuracy after sleep-mode power cycling. Use Value: 360 mW typical power consumption and ±1 LSB INL post-calibration enable >1-year operation on AA-cell batteries while retaining metrology-grade linearity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7606BSTZ | 8-channel simultaneous-sampling, integrated PGA and reference; requires external ±15 V supplies for same input range | Multi-channel data acquisition vs. single-channel high-precision; higher channel density but lower per-channel S/(N+D) (86 dB) | Select AD7606BSTZ when multi-sensor synchronization is required; AD676KD remains preferred for single-channel 87 dB performance with simpler supply scheme |
| ADS8860IDRCT | 16-bit, 1 MSPS, SPI interface, single-supply (2.5–5 V); no internal sample-hold or autocalibration | High-speed serial interfacing vs. parallel bus; demands external precision SHA and calibration routine | Select ADS8860IDRCT for space-constrained designs needing >10× speed; AD676KD suits systems prioritizing ease of use and guaranteed dc accuracy without firmware overhead |
Compared with AD7606BSTZ and ADS8860IDRCT, the AD676KD uniquely combines single-channel 87 dB S/(N+D), on-chip autocalibration, and parallel output in a through-hole ceramic package-making it optimal for legacy industrial controllers and repair-replacement scenarios where layout compatibility and minimal firmware integration are critical.
Availability
AD676KD is available at Aetrix Electronics and suitable for industrial process monitoring, automated test equipment, medical diagnostic instrumentation, and high-accuracy data loggers requiring stable component supply and long-lifecycle support.
Supply support for AD676KD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA.
The AD676 family was designed specifically for precision DC- and AC-coupled data acquisition systems demanding guaranteed 16-bit linearity without user calibration-targeting industrial, medical, and test equipment markets.
FAQ
What is the maximum recommended conversion time for AD676KD to maintain specified performance?
The AD676KD specifies a maximum conversion time (tC) of 1000 µs-from SAMPLE going HIGH to completion of the 17th CLK pulse. Exceeding this interval risks degraded INL and S/(N+D) due to capacitor charge leakage in the internal sample-hold and calibration storage elements. This limit applies per conversion, not between conversions.
Does AD676KD require external components for basic operation?
Yes, the AD676KD requires external bypass capacitors (0.1 µF ceramic per supply pin), a stable external voltage reference (5–10 V at VREF), and proper PCB layout with separated analog/digital ground planes. It does not require external sample-hold amplifiers or calibration circuitry due to its integrated autocalibration and on-chip SHA function.
How does the AGND SENSE pin improve measurement accuracy in AD676KD?
The AGND SENSE pin provides a Kelvin sense connection to the analog ground plane, allowing the AD676KD to reject voltage drops caused by return current flowing through PCB trace resistance. This ensures the internal analog circuitry references the true local ground potential at the ADC, reducing zero-error drift and improving common-mode rejection-especially critical in high-current industrial environments.
Can AD676KD operate with a 5 V-only supply configuration?
No. The AD676KD requires three independent supplies: +5 V (VDD), +12 V (VCC), and –12 V (VEE). The analog core-including the SAR array, sample-hold amplifier, and reference buffer-depends on the ±12 V rails for full-scale input range and distortion performance. Operating outside these specifications voids all ac and dc parameter guarantees.
What happens if the CAL pin is asserted during an active conversion of AD676KD?
Asserting CAL (driving it HIGH) during an active conversion performs an asynchronous hardware reset: BUSY immediately goes HIGH, the current conversion is aborted, and internal state registers are cleared. Calibration begins only upon the subsequent falling edge of CAL. This behavior allows safe reinitialization but discards any partially completed conversion result.
AD676KD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-CDIP (0.600", 15.24mm)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 100k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- ±12V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 28-CDIP
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
AD676KD FAQ
1.How can I place an order for AD676KD through Aetrix?
Please submit a Request for Quotation (RFQ) for AD676KD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD676KD reliable?
The price and inventory of AD676KD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD676KD is usually 5 days.
3.What payment methods are accepted for AD676KD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD676KD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD676KD?
AD676KD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD676KD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD676KD?
For technical support, including AD676KD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD676KD requirements.
6.How does Aetrix verify that AD676KD is sourced from the original manufacturer or authorized distributors?
All AD676KD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD676KD meets industry standards.
7.What is the process for return or replacement of AD676KD?
All AD676KD units undergo pre-shipment inspection (PSI). If there is an issue with AD676KD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD676KD part is unused and in its original packaging.
Return procedure for AD676KD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD676KD Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

