Analog Devices Inc. AD678JD

Overview

AD678JD from Analog Devices is a complete 12-bit monolithic sampling analog-to-digital converter (ADC) integrating sample-hold amplifier, voltage reference, clock generation, and microprocessor-compatible bus interface. It delivers 200 kSPS throughput, 1 MHz full-power bandwidth, 70 dB S/N+D (J-grade), ±1 LSB INL, and operates from +5 V and ±12 V supplies in a 28-lead ceramic DIP package for industrial data acquisition systems.

For engineers reviewing the AD678JD datasheet, AD678JD pinout, AD678JD application, or AD678JD equivalent, this page provides verified technical context, validated pin functions, confirmed AC/DC specifications per J-grade, real-world timing constraints (tC = 3.0–4.4 µs, tCR = 5 µs), and precise interface behavior for 8-bit/12-bit bus modes with bipolar/unipolar coding support.

Technical Context

The AD678JD employs a recursive subranging architecture with integrated 4-bit flash ADC and 12-bit DAC for error correction, enabling high-speed 12-bit resolution without external calibration. Its on-chip 5 V reference (±2 mV accuracy) and internal clock generator eliminate external timing components.

It supports dual digital interface modes: 12-bit parallel output via DB11–DB0 (12/8 = HIGH) or 8-bit multiplexed output with R/L and HBE control (12/8 = LOW), delivering straight binary (unipolar) or twos complement (bipolar) data formats. Input settling time is ≤1 µs, aperture jitter is 150 ps, and input impedance is 10 MΩ - enabling direct connection to high-impedance sources.

Key Specifications

Pinout & Package

AD678JD is housed in a 28-lead ceramic dual-in-line package (DIP), with analog and digital pins physically segregated to reduce crosstalk. AGND (Pin 7) and DGND (Pin 14) are separate ground returns; VCC (Pin 11), VEE (Pin 5), and VDD (Pin 28) require local decoupling.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 12-bit sampling ADC applications.

Compared with AD678KN, AD678JD trades slightly relaxed DC specs (±1 LSB INL vs. ±0.7) for ceramic reliability and extended temperature capability; versus AD7874KN, it delivers double the speed and full integration - eliminating four external components (SHA, ref, clock, DAC) at the cost of higher power (560 mW vs. ~120 mW).

Availability

AD678JD is available at Aetrix Electronics and suitable for industrial data acquisition, test equipment design, avionics sensor interfaces, and medical instrumentation requiring stable component supply across extended lifecycle programs.

Supply support for AD678JD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.

The AD678 product line was designed as a complete, single-chip sampling ADC solution for embedded instrumentation - integrating precision analog front-end, reference, clock, and digital interface to replace multi-component discrete designs.

FAQ

What is the maximum sampling rate supported by the AD678JD?

The AD678JD supports a maximum conversion rate of 200 kSPS, with a minimum conversion cycle time (tCR) of 5 µs. This rate is guaranteed across its specified 0°C to +70°C operating range and requires adherence to the SC pulse timing (tCP ≥ 97 ns) and inter-conversion delay constraints to maintain accuracy. The AD678JD achieves this performance using its internal recursive subranging architecture without external clocking components.

Does the AD678JD require external calibration for J-grade operation?

No, the AD678JD does not require external calibration for J-grade operation. It is factory trimmed for linearity, offset, and gain errors, delivering ±1 LSB integral nonlinearity and ±4 LSB gain error over 0°C to +70°C. External trimming resistors (R1/R2) are optional and only needed if application-specific accuracy tighter than J-grade specifications is required - for example, in metrology-grade instruments.

How does the AD678JD handle unipolar versus bipolar input configurations?

AD678JD selects input mode via the BIPOFF pin: tied to AGND for 0–10 V unipolar input with straight binary output coding; tied to REFOUT through a 50 Ω resistor for ±5 V bipolar input with twos complement output coding. The 12/8 pin determines data format - HIGH enables 12-bit parallel output on DB11–DB0; LOW enables 8-bit multiplexed reads with R/L and HBE control. Both modes are fully supported in hardware without firmware reconfiguration.

What are the critical power supply requirements for stable AD678JD operation?

The AD678JD requires three independent supplies: +5 V (VDD, Pin 28), +12 V (VCC, Pin 11), and –12 V (VEE, Pin 5). Each must be well-regulated (<±5% for VCC/VEE, <±10% for VDD) and locally decoupled with a 10 µF tantalum capacitor in parallel with a 0.1 µF ceramic capacitor directly to AGND (Pin 7) or DGND (Pin 14). Switching supplies are discouraged due to noise coupling into the analog path, which degrades S/N+D ratio.

Can the AD678JD be used with an 8-bit microcontroller bus?

Yes, the AD678JD natively supports 8-bit microcontroller buses via its 8-bit multiplexed interface mode. When 12/8 (Pin 12) is pulled LOW, DB11–DB4 become the sole active data outputs; DB1 (R/L) and DB0 (HBE) become inputs controlling byte order and justification. Two consecutive reads retrieve the full 12-bit result - first the high byte (HBE = LOW), then the low byte (HBE = HIGH) - with timing governed by tBA (10–100 ns access) and tFD (10–80 ns float delay).